TPSM53602/3/4
Step-Down DC/DC Power ModuleThe TPSM53602/3/4 is a step-down dc/dc power module from Texas Instruments. View the full TPSM53602/3/4 datasheet below including key specifications, electrical characteristics, absolute maximum ratings.
TPSM53602/3/4 shares its datasheet with TPSM53602, whose page lists every part number it covers.
Official TPSM53602/3/4 datasheet (PDF) — the source this page was extracted from.
TPSM53602/3/4 Key Specifications
| Parameter | Value |
|---|---|
| Efficiency | up to 95% |
| Output Power | up to 14 W at 85°C ambient, no airflow |
| Output Current | 2A (TPSM53602); 3A (TPSM53603); 4A (TPSM53604) |
| Package Dimensions | 5.0mm × 5.5mm × 4mm |
| Input Voltage Range | 3.8V to 36V |
| Switching Frequency | 1.4 MHz nominal (PWM) |
| Output Voltage Range | 1V to 7V |
| Ambient Temperature Range | -40°C to +105°C |
| Junction Temperature Range | -40°C to +125°C |
| Thermal Shutdown Threshold | 165°C typical |
TPSM53602/3/4 Overview
Part: TPSM53602 (TPSM53602RDAR) — Texas Instruments
Type: Step-Down DC/DC Power Module (Buck Converter with Integrated Inductor)
Description: 3.8–36 V input, 1–7 V output, 2 A power module with integrated MOSFETs and shielded inductor in a 5 mm × 5.5 mm × 4 mm Enhanced HotRod QFN package, with efficiency up to 95%.
Operating Conditions:
- Supply voltage: 3.8–36 V (minimum is 3.8 V or VOUT + 1 V, whichever is greater)
- Operating ambient temperature: -40 to 105 °C
- Output voltage: 1–7 V
- Output current: 0–2 A
- Minimum ceramic input capacitance: 20 μF
Absolute Maximum Ratings:
- Max input voltage (VIN to PGND): 38 V
- Max junction temperature: 150 °C
- Storage temperature: -55 to 150 °C
- Peak reflow case temperature: 245 °C
Key Specs:
- Feedback voltage: 0.985 / 1 / 1.015 V (min/typ/max, -40°C ≤ TJ ≤ 125°C, IOUT = 0.75 A)
- Quiescent current: 24 μA typ (non-switching, VFB = 1.2 V)
- Shutdown supply current: 5 μA typ, 10 μA max (VEN = 0 V)
- Efficiency: 91% typ (IOUT = 2 A, TA = 25°C, VIN = 12 V, VOUT = 3.3 V)
- Over-current threshold: 3.5 A typ
- Max switching frequency: 1.4 MHz typ (IOUT = 2 A, TA = 25°C)
- Internal soft-start time: 4 ms typ
- EN rising threshold: 1.2 / 1.23 / 1.26 V (min/typ/max), with 100 mV hysteresis
- VIN turn-on / turn-off: 3.55 V / 3.05 V typ
- Thermal resistance RθJA: 19.5 °C/W; thermal shutdown 165 °C
Features:
- Enhanced HotRod QFN package with single large thermal pad and all pins accessible from the perimeter
- Approx. 85 mm² single-sided solution size; low EMI, meets CISPR11 radiated emissions
- Up to 14 W output power at 85°C with no airflow
- Power-good flag and precision enable with programmable UVLO
- Hiccup-mode short-circuit protection, overtemperature protection, pre-bias start-up, soft start
- Shock and vibration tested to Mil-STD-883D
- Pin compatible with 3-A TPSM53603 and 4-A TPSM53604
- Functional safety-capable documentation available
Applications:
- General purpose wide VIN power supplies
- Factory automation and control
- Test and measurement
- Aerospace and defense
- Negative output voltage applications
Package:
- B3QFN (RDA), 15 pins, 5.0 mm × 5.5 mm (4 mm height)
TPSM53602/3/4 Features
- Functional Safety-Capable
- -Documentation available to aid functional safety system design
- 5-mm × 5.5-mm × 4-mm Enhanced HotRod ™ QFN package
- -85-mm 2 solution size (single sided)
- -Low EMI: meets CISPR11 radiated emissions
- -Excellent thermal performance: Up to 14 W output power at 85°C, no airflow
- -Standard footprint: single large thermal pad and all pins accessible from perimeter
- Input voltage range: 3.8 V to 36 V
- Output voltage range: 1 V to 7 V
- Efficiency up to 95%
- Power-good flag
- Precision enable
- Built-in hiccup-mode short-circuit protection, overtemperature protection, start-up into pre-bias output, soft start, and UVLO
- Operating IC junction range: -40°C to +125°C
- Operating ambient range: -40°C to +105°C
- Shock and vibration tested to Mil-STD-883D
- Pin compatible with: 3-A TPSM53603 and 4-A TPSM53604
- Create a custom design using the TPSM53602 with the WEBENCH ® Power Designer
- Download the EVM Design Files for fast board design
TPSM53602/3/4 Applications
TPSM53602/3/4 Pin Configuration
Figure 5-1. RDA Package 15-Pin QFN Top View
Table 5-1. Pin Functions
| PIN - NO. | PIN - NAME | TYPE | DESCRIPTION |
|---|---|---|---|
| 12 | AGND | G | Analog ground. Zero voltage reference for internal references and logic. All electrical parameters are measured with respect to this pin. This pin must be connected to PGND at a single point. See Section 10 for a recommended layout. |
| 4, 5 | DNC | - | Do not connect. Do not connect these pins to ground, to another DNC pin, or to any other voltage. These pins are connected to internal circuitry. Each pin must be soldered to an isolated pad. |
| 2 | EN | I | Enable pin. This pin turns the converter on when pulled high and turns off the converter when pulled low. This pin can be connected directly to VIN. Do not float. This pin can be used to set the input under voltage lockout with two resistors. See Section 7.3.6 . |
| 9 | FB | I | Feedback input. Connect the mid-point of the feedback resistor divider to this pin. Connect the upper resistor (R FBT ) of the feedback divider to V OUT at the desired point of regulation. Connect the lower resistor (R FBB ) of the feedback divider to AGND. |
| 3, 10, 11 | NC | - | Not connected. These pins are not connected to any circuitry within the module. It is recommended that these pins be connected to the PGND plane on the application board to enhance shielding and thermal performance. |
| 15 | PGND | G | Power ground. This is the return current path for the power stage of the device. Connect this pad to the input supply return, the load return, and the capacitors associated with the VIN and VOUT pins. See Section 10 for a recommended layout. |
| 6 | PGOOD | O | Power-good pin. Open-drain output that asserts low if the feedback voltage is not within the specified window thresholds. A 10-kΩ to 100-kΩ pullup resistor is required and can be tied to the V5V pin or other DC voltage less than 22 V. If not used, this pin can be left open or connected to PGND. |
| 1, 14 | VIN | I | Input supply voltage. Connect the input supply to these pins. Connect input capacitors between these pins and PGND in close proximity to the device. |
| 7, 8 | VOUT | O | Output voltage. These pins are connected to the internal output inductor. Connect these pins to the output load and connect external output capacitors between these pins and PGND. |
| 13 | V5V | O | Internal 5-V LDO output. Supplies internal control circuits. Do not connect to external loads. This pin can be used as logic supply for PGOOD pin. |
TPSM53602/3/4 Electrical Characteristics
Limits apply over T A = -40°C to +105°C, VIN = 12 V, VOUT = 3.3 V, I OUT = IOUT maximum, (unless otherwise noted); CIN1 = 2x10 μF, 50-V, 1206 ceramic; CIN2 = 100 nF, 50-V, 0603 ceramic; COUT = 3x22 μF, 25-V, 1210 ceramic. Minimum and maximum limits are specified through production test or by design. Typical values represent the most likely parametric norm and are provided for reference only.
| PARAMETER | PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT |
|---|---|---|---|---|---|---|
| INPUT VOLTAGE (V IN ) | INPUT VOLTAGE (V IN ) | INPUT VOLTAGE (V IN ) | INPUT VOLTAGE (V IN ) | INPUT VOLTAGE (V IN ) | INPUT VOLTAGE (V IN ) | INPUT VOLTAGE (V IN ) |
| V IN | Input voltage range | Over I OUT range | 3.8 (1) | 36 | V | |
| V IN turn on | V IN increasing, I OUT = 0 A | 3.55 | V | |||
| V IN turn off | V IN decreasing, I OUT = 0 A | 3.05 | V | |||
| I Q | Quiescient current | Non-switching, V FB = 1.2 V | 24 | μA | ||
| I SHDN | Shutdown supply current | V EN = 0 V, I OUT = 0 A | 5 | 10 | μA | |
| INTERNAL LDO (V5V) | INTERNAL LDO (V5V) | INTERNAL LDO (V5V) | INTERNAL LDO (V5V) | INTERNAL LDO (V5V) | INTERNAL LDO (V5V) | INTERNAL LDO (V5V) |
| V5V | Internal LDO output voltage appearing at the V5V pin | 6 V ≤ V IN ≤ 36 V | 4.75 | 5 | 5.25 | V |
| FEEDBACK | FEEDBACK | FEEDBACK | FEEDBACK | FEEDBACK | FEEDBACK | FEEDBACK |
| V FB | Feedback voltage (2) | -40°C ≤ T J ≤ +125°C, I OUT = 0.75 A | 0.985 | 1 | 1.015 | V |
| V FB | Load regulation | T A = +25°C, 0.5 A ≤ I OUT ≤ 2 A | 0.06 | % | ||
| V FB | Line regulation | T A = +25°C, I OUT = 0.75 A, Over V IN range | 0.15 | % | ||
| I FB | Current into FB pin | FB = 1 V | 0.2 | 50 | nA | |
| CURRENT | CURRENT | CURRENT | CURRENT | CURRENT | CURRENT | CURRENT |
| I OUT | Output current | T A = 25°C | 0 | 2 | A | |
| I OUT | Over-current threshold | 3.5 | A | |||
| V HC | FB pin voltage required to trip short- circuit hiccup mode | 0.4 | V | |||
| t HC | Time between current-limit hiccup burst | 94 | ms | |||
| ENABLE (EN PIN) | ENABLE (EN PIN) | ENABLE (EN PIN) | ENABLE (EN PIN) | ENABLE (EN PIN) | ENABLE (EN PIN) | ENABLE (EN PIN) |
| V EN-VCC-H | EN input level required to turn on internal LDO | Rising threshold | 1 | V | ||
| V EN-VCC-L | EN input level required to turn off internal LDO | Falling threshold | 0.3 | V | ||
| V EN-H | EN input level required to start switching | Rising threshold | 1.2 | 1.23 | 1.26 | V |
| V EN-HYS | Hysteresis below V EN-H | Falling | 100 | mV | ||
| I LKG-EN | Enable input leakage current | V EN = 3.3 V | 0.2 | nA |
Limits apply over T A = -40°C to +105°C, VIN = 12 V, VOUT = 3.3 V, I OUT = IOUT maximum, (unless otherwise noted); CIN1 = 2x10 μF, 50-V, 1206 ceramic; CIN2 = 100 nF, 50-V, 0603 ceramic; COUT = 3x22 μF, 25-V, 1210 ceramic. Minimum and maximum limits are specified through production test or by design. Typical values represent the most likely parametric norm and are provided for reference only.
| PARAMETER | PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT |
|---|---|---|---|---|---|---|
| POWER GOOD (PGOOD PIN) | POWER GOOD (PGOOD PIN) | POWER GOOD (PGOOD PIN) | POWER GOOD (PGOOD PIN) | POWER GOOD (PGOOD PIN) | POWER GOOD (PGOOD PIN) | POWER GOOD (PGOOD PIN) |
| V PG-HIGH-UP | V OUT rising (fault) | %of FB voltage | 107 | % | ||
| V PG-HIGH-DN | V OUT falling (good) | %of FB voltage | 105 | % | ||
| V PG-LOW-UP | V OUT rising (good) | %of FB voltage | 94 | % | ||
| V PG-LOW-DN | V OUT falling (fault) | %of FB voltage | 92 | % | ||
| R PG | Power-good flag R DSON | V EN = 0 V | 35 | Ω | ||
| V IN-PG | Minimum input voltage for proper PGOOD function | 50-μA, EN = 0 V | 2 | V | ||
| V PG | PGOOD logic low output | 50-μA, EN = 0 V, V IN = 2 V | 0.2 | V | ||
| PERFORMANCE | PERFORMANCE | PERFORMANCE | PERFORMANCE | PERFORMANCE | PERFORMANCE | PERFORMANCE |
| η | Efficiency | I OUT = 2 A, T A = 25°C | 91 | % | ||
| SOFT START | SOFT START | SOFT START | SOFT START | SOFT START | SOFT START | SOFT START |
| t SS | Internal soft-start time | 4 | ms | |||
| SWITCHING FREQUENCY | SWITCHING FREQUENCY | SWITCHING FREQUENCY | SWITCHING FREQUENCY | SWITCHING FREQUENCY | SWITCHING FREQUENCY | SWITCHING FREQUENCY |
| ƒ SW-MAX | Max switching frequency | I OUT = 2 A, T A = 25°C | 1.4 (3) | MHz |
TPSM53602/3/4 Absolute Maximum Ratings
Over the recommended operating junction temperature range (1)
| PARAMETER | PARAMETER | MIN | MAX | UNIT |
|---|---|---|---|---|
| Input voltage | VIN to PGND | -0.3 | 38 | V |
| Input voltage | EN to AGND (2) | -0.3 | V IN + 0.3 | V |
| Input voltage | PGOOD to AGND (2) | -0.3 | 22 | V |
| Input voltage | FB to AGND | -0.3 | 5.5 | V |
| Input voltage | AGND to PGND | -0.3 | 0.3 | V |
| Output voltage | VOUT to PGND (2) | -0.3 | V IN + 0.3 | V |
| Output voltage | V5V to AGND | 0 | 5.5 | V |
| Operating IC junction temperature, T J (3) | Operating IC junction temperature, T J (3) | -40 | 150 | °C |
| Storage temperature, T stg | Storage temperature, T stg | -55 | 150 | °C |
| Peak reflow case temperature | Peak reflow case temperature | 245 | °C | |
| Maximum number or reflows allowed | Maximum number or reflows allowed | 3 | ||
| Mechanical vibration | Mil-STD-883D, Method 2007.2, 20 to 2000 Hz | 20 | G | |
| Mechanical shock | Mil-STD-883D, Method 2002.3, 1 msec, 1/2 sine, mounted | 500 | G |
- (1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions . Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
- (2) The voltage on this pin must not exceed the voltage on the VIN pin by more than 0.3 V.
- (3) The ambient temperature is the air temperature of the surrounding environment. The junction temperature is the temperature of the internal power IC when the device is powered. Operating below the maximum ambient temperature, as shown in the safe operating area (SOA) curves in the typical characteristics sections, ensures that the maximum junction temperature of any component inside the module is never exceeded.
TPSM53602/3/4 Recommended Operating Conditions
Over operating ambient temperature range (unless otherwise noted) (1)
| MIN | MAX | UNIT | |
|---|---|---|---|
| Input voltage, V IN | 3.8 (3) | 36 | V |
| Output voltage, V OUT | 1 | 7 (4) | V |
| Output current, I OUT | 0 | 2 | A |
| EN voltage, V EN (2) | 0 | V IN | V |
| PGOOD pullup voltage, V PGOOD (2) | 0 | 18 | V |
| PGOOD sink current | 3 | mA | |
| Operating ambient temperature, T A | -40 | 105 | °C |
| Input capacitance, C IN (5) | 20 | μF | |
| Output capacitance, C OUT | min (6) | 1000 | μF |
- (3) The recommended minimum VIN is 3.8 V or (VOUT + 1 V), whichever is greater. See the Section 7.3.9 section for more information.
(4) The recommended maximum output voltage varies depending input voltage. See the Section 7.3.9 section for more information.
- (5) Minimum CIN of 20 μF must be ceramic type.
- (6) The minimum amount of required output capacitance varies depending on the output voltage. See Table 7-1.
TPSM53602/3/4 Thermal Information
| THERMAL METRIC (1) | THERMAL METRIC (1) | TPSM53602 RDA (QFN) 15 PINS | UNIT |
|---|---|---|---|
| R θJA | Junction-to-ambient thermal resistance (2) | 19.5 | °C/W |
| ψ JT | Junction-to-top characterization parameter (3) | 1.0 | °C/W |
| ψ JB | Junction-to-board characterization parameter (4) | 5.5 | °C/W |
| T SHDN | Thermal shutdown temperature | 165 | °C |
| Recovery temperaure | 148 | °C |
TPSM53602/3/4 Typical Application
The TPSM53602 is a synchronous, step-down, DC/DC power module. It is used to convert a higher DC voltage to a lower DC voltage with a maximum output current of 2 A. The TPSM53602 can be configured in a negative output voltage, inverting buck-boost (IBB) topology. For more details, see the Negative Output Voltage using the TPSM53602/3/4 application note. The following design procedure can be used to select components for the TPSM53602. Alternately, the WEBENCH ® software can be used to generate complete designs. When generating a design, the WEBENCH ® software uses an iterative design procedure and accesses comprehensive databases of components. See www.ti.com for more details.
Variants on the same datasheet
These parts have exact links to the same datasheet. They are candidates to compare, not verified drop-in replacements; check package, pinout and electrical limits.
| Part Number | Manufacturer | Package |
|---|---|---|
| TPSM53602 | Texas Instruments | B3QFN-15 |
| TPSM53602RDAR | Texas Instruments | 15-PowerBQFN Module |
More datasheets
Ask your AI agent about the TPSM53602/3/4
Connect SheetsData to Claude, Cursor, Codex or any MCP client and your agent reads this datasheet for you: pinout, limits, register maps and design checks, with the numbers taken from the PDF.
claude mcp add --transport http sheetsdata https://mcp.sheetsdata.com/mcp
Then ask: "Can the TPSM53602/3/4 run from my 12 V rail? Check it against the datasheet limits."
Create a free account $2 of usage every month, no card needed.