TPS7A4701RGWT
Low-Dropout (LDO) Voltage RegulatorThe TPS7A4701RGWT is a low-dropout (ldo) voltage regulator from Texas Instruments. View the full TPS7A4701RGWT datasheet below including key specifications, electrical characteristics, absolute maximum ratings.
Manufacturer
Texas Instruments
Category
Low-Dropout (LDO) Voltage Regulator
Package
VQFN-20-EP(5x5)
Lifecycle
Active
Key Specifications
| Parameter | Value |
|---|---|
| Control Features | Enable |
| Output Current | 1A |
| Quiescent Current | 1 mA |
| Supply Current (Max) | 6.1 mA |
| Mounting Type | Surface Mount |
| Number of Regulators | 1 |
| Operating Temperature | -40°C ~ 125°C |
| Output Configuration | Positive |
| Output Type | Adjustable |
| Package / Case | 20-VQFN Exposed Pad |
| Protection Features | Over Current, Over Temperature, Under Voltage Lockout (UVLO) |
| PSRR | 78dB (1kHz) |
| Supplier Device Package | 20-VQFN (5x5) |
| Input Voltage (Max) | 35V |
| Output Voltage (Max) | 34V |
| Output Voltage | 1.4V |
| Dropout Voltage | 0.45V @ 1A |
Overview
Part: TPS7A4700, TPS7A4701 — Texas Instruments
Type: Low-Dropout (LDO) Voltage Regulator
Description: A 36V, 1A, ultra-low-noise (4μVRMS) positive-voltage low-dropout linear regulator with an input voltage range of +3V to +36V and an operating temperature range of -40°C to 125°C.
Operating Conditions:
- Supply voltage: +3V to +36V
- Operating temperature: -40 to 125 °C
- Output current: 1A
- Output voltage range: +1.4V to +34V (TPS7A4701 adjustable version)
Absolute Maximum Ratings:
- Max supply voltage: +36 V (IN pin to GND)
- Max junction/storage temperature: 125 °C (Operating virtual junction), 150 °C (Storage)
Key Specs:
- Output Voltage Noise: 4μVRMS (10Hz, 100Hz)
- Power-Supply Ripple Rejection: -82dB (100Hz)
- Dropout Voltage: 307mV at 1A
- Output Current: 1A
- Input Voltage Range: +3V to +36V
- Output Voltage Range (ANY-OUT): +1.4V to +20.5V
- Output Voltage Range (Adjustable, TPS7A4701): +1.4V to +34V
- ESD HBM (TPS7A4701): 2500 V
Features:
- Two Output Voltage Modes: ANY-OUT (PCB layout routing) and Adjustable (external resistors for TPS7A4701)
- No external feedback resistors or feed-forward capacitors required for ANY-OUT version
- CMOS-Logic-Level-Compatible Enable Pin
- Built-In Fixed Current Limit and Thermal Shutdown
- High-Performance Thermal Package
Applications:
- Voltage-Controlled Oscillators (VCOs)
- Frequency Synthesizers
- Test and Measurement
- Instrumentation, Medical, and Audio
- RX, TX, and PA Circuits
- Power Rails for Operational Amplifiers, DACs, ADCs, and Other High-Precision Analog Circuits
- Post DC/DC Converter Regulation and Ripple Filtering
- Base Stations and Telecommunications Infrastructure
- +12V and +24V Industrial Buses
Package:
- VQFN (20) 5mm x 5mm
Features
- Input Voltage Range: +3V to +36V
- Output Voltage Noise: 4μVRMS (10Hz, 100Hz)
- Power-Supply Ripple Rejection:
- -82dB (100Hz)
- -≥ 55dB (10Hz, 10MHz)
- Two Output Voltage Modes:
- -ANY-OUT™ Version (User-Adjustable Output via Printed Circuit Board (PCB) Layout Routing):
- -No External Feedback Resistors or Feed-Forward Capacitors Required
- -Output Voltage Range: +1.4V to +20.5V
- -Adjustable Version (TPS7A4701 Only):
- -Output Voltage Range: +1.4V to +34V
- Output Current: 1A
- Dropout Voltage: 307mV at 1A
- CMOS-Logic-Level-Compatible Enable Pin
- Built-In Fixed Current Limit and Thermal Shutdown
- High-Performance Thermal Package: 5mm × 5mm Quad Flat No-Lead (QFN)
- Operating Temperature Range: -40°C to 125°C
Applications
- Voltage-Controlled Oscillators (VCOs)
- Frequency Synthesizers
- Test and Measurement
- Instrumentation, Medical, and Audio
- RX, TX, and PA Circuits
- Power Rails for Operational Amplifiers, Digital-to-Analog Converters (DACs), Analog-to-Digital Converters (ADCs), and Other High-Precision Analog Circuits
- Post DC/DC Converter Regulation and Ripple Filtering
- Base Stations and Telecommunications Infrastructure
- +12V and +24V Industrial Buses
1
Pin Configuration
Pin Functions
Pin Functions
| PIN | PIN | I/O | DESCRIPTION |
|---|---|---|---|
| NAME | NO. | I/O | DESCRIPTION |
| 0P1V | 12 | I | When connected to GND, this pin adds 0.1 V to the nominal output voltage of the regulator. Do not connect any voltage other than GND to this pin. If not used, leave this pin floating. |
| 0P2V | 11 | I | When connected to GND, this pin adds 0.2 V to the nominal output voltage of the regulator. Do not connect any voltage other than GND to this pin. If not used, leave this pin floating. |
| 0P4V | 10 | I | When connected to GND, this pin adds 0.4 V to the nominal output voltage of the regulator. Do not connect any voltage other than GND to this pin. If not used, leave this pin floating. |
| 0P8V | 9 | I | When connected to GND, this pin adds 0.8 V to the nominal output voltage of the regulator. Do not connect any voltage other than GND to this pin. If not used, leave this pin floating. |
| 1P6V | 8 | I | When connected to GND, this pin adds 1.6 V to the nominal output voltage of the regulator. Do not connect any voltage other than GND to this pin. If not used, leave this pin floating. |
| 3P2V | 6 | I | When connected to GND, this pin adds 3.2 V to the nominal output voltage of the regulator. Do not connect any voltage other than GND to this pin. If not used, leave this pin floating. |
| 6P4V1 | 5 | I | When connected to GND, this pin adds 6.4 V to the nominal output voltage of the regulator. Do not connect any voltage other than GND to this pin. If not used, leave this pin floating. |
| 6P4V2 | 4 | I | When connected to GND, this pin adds 6.4 V to the nominal output voltage of the regulator. Do not connect any voltage other than GND to this pin. If not used, leave this pin floating. |
| EN | 13 | I | Enable pin. The device is enabled when the voltage on this pin exceeds the maximum enable voltage, V EN(HI) . If enable is not required, tie EN to IN. |
| GND | 7 | - | Ground |
| IN | 15, 16 | I | Input supply. A capacitor greater than or equal to 1 μF must be tied from this pin to ground to assure stability. A 10-μF capacitor is recommended to be connected from IN to GND (as close to the device as possible) to reduce circuit sensitivity to printed circuit board (PCB) layout, especially when long input traces or high source impedances are encountered. |
| NC | 2, 17-19 | - | This pin can be left open or tied to any voltage between GND and IN. |
| NR | 14 | - | Noise reduction pin. When a capacitor is connected from this pin to GND, RMS noise can be reduced to very low levels. A capacitor greater than or equal to 10 nF must be tied from this pin to ground to assure stability. A 1-μF capacitor is recommended to be connected from NR to GND (as close to the device as possible) to maximize ac performance and minimize noise. |
Pin Functions
Electrical Characteristics
At -40°C ≤ TJ ≤ 125°C; VI = VO(nom) + 1.0 V or VI = 3.0 V (whichever is greater); VEN = VI ; IO = 0 mA; CIN =10 μF; COUT = 10 μF; CNR = 10 nF; SENSE/FB tied to OUT; and 0P1V, 0P2V, 0P4V, 0P8V, 1P6V, 3P2V, 6P4V1, 6P4V2 pins OPEN, unless otherwise noted.
| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | ||
|---|---|---|---|---|---|---|---|
| V I | Input voltage range | 3 | 35 | V | |||
| V UVLO | Under-voltage lockout threshold | V I rising V I falling V (REF) = V (FB) , TPS7A4701 | 2.67 2.5 | V V | |||
| V (REF) | Reference voltage | only | 1.4 | V | |||
| V UVLO(HYS) V NR | Under-voltage lockout hysteresis Noise reduction pin voltage | TPS7A4700, TPS7A4701 using ANY-OUT option | 177 | mV V | |||
| V UVLO(HYS) V NR | Under-voltage lockout hysteresis Noise reduction pin voltage | TPS7A4701 in adjustable mode | only | V OUT 1.4 | V | ||
| V O | Output voltage range | V I ≥ V O(nom) + 1.0 V or 3 V (whichever is greater), C OUT = 20 μF | TPS7A4700, TPS7A4701 using ANY- OUT option | 1.4 | 20.5 | V | |
| V O | Output voltage range | V I ≥ V O(nom) + 1.0 V or 3 V (whichever is greater), C OUT = 20 μF | TPS7A4701 using adjustable option | 1.4 | 34 | V | |
| V O | Nominal accuracy | T J = 25°C, C OUT = 20 μF | -1 | 1.0 | %V O | ||
| V O | Overall accuracy | V O(nom) + 1.0 V ≤ V I ≤ 35 V, 0 mA ≤ I O ≤ 1 A, C OUT = 20 μF | -2.5 | 2.5 | %V O | ||
| Δ V O( Δ VI) | Line regulation | V O(nom) + 1.0 V ≤ V I ≤ 35 V | 0.092 | %V O | |||
| Δ V O( Δ IO) | Load regulation | 0 mA ≤ I O ≤ 1 A | 0.3 | %V O | |||
| V (DO) | Dropout voltage | V I = 95% V O(nom) , I O = 0.5 A | 216 | mV | |||
| V I = 95% V O(nom) , I O = 1 A | 307 | 450 | mV | ||||
| I (CL) | Current limit | V O = 90% V O(nom) | 1 | 1.26 | A | ||
| I (GND) | Ground pin current | I O = 0 mA | 0.58 | 1.0 | mA | ||
| I (GND) | Ground pin current | I O = 1 A | 6.1 | mA | |||
| I (EN) | Enable pin current | V EN = V I | 0.78 | 2 | μA | ||
| I (EN) | Enable pin current | V I = V EN = 35 V | 0.81 | 2 | μA | ||
| I (SHDN) | Shutdown supply current | V EN = 0.4 V | 2.55 | 8 | μA | ||
| I (SHDN) | Shutdown supply current | V EN = 0.4 V, V I = 35 V | 3.04 | 60 | μA | ||
| V +EN(HI) | Enable high-level voltage | 2 | V I | V | |||
| V +EN(LO) | Enable low-level voltage | 0 | 0.4 | V | |||
| I (FB) | Feedback pin current | 350 | nA | ||||
| PSRR | Power-supply rejection ratio | V I = 16 V, V O(nom) = 15 V, C OUT = 50 I O = 500 mA, C NR = 1 μF, f = 1 kHz | μF, | 78 | dB | ||
| V n | Output noise voltage | V I = 3 V, V O(nom) = 1.4 V, C OUT = 50 μF, C NR = 1 μF, BW = 10 Hz to 100 kHz | 4.17 | μV RMS | |||
| V n | Output noise voltage | V IN = 6 V, V O(nom) = 5 V, C OUT = 50 μF, C NR = 1 μF, BW = 10 Hz to 100 kHz | 4.67 | μV RMS | |||
| T sd | Thermal shutdown temperature | Shutdown, temperature increasing | 170 | °C | |||
| T sd | Thermal shutdown temperature | Reset, temperature decreasing | 150 | °C | |||
| T J | Operating junction temperature | -40 | 125 | °C |
Absolute Maximum Ratings
Over junction temperature range, unless otherwise noted. (1)
| MIN | MAX | UNIT | ||
|---|---|---|---|---|
| Voltage (2) | IN pin to GND pin | -0.4 | +36 | V |
| Voltage (2) | EN pin to GND pin | -0.4 | +36 | V |
| Voltage (2) | EN pin to IN pin | -36 | +0.4 | V |
| Voltage (2) | OUT pin to GND pin | -0.4 | +36 | V |
| Voltage (2) | NR pin to GND pin | -0.4 | +36 | V |
| Voltage (2) | SENSE/FB pin to GND pin | -0.4 | +36 | V |
| Voltage (2) | 0P1V pin to GND pin | -0.4 | +36 | V |
| Voltage (2) | 0P2V pin to GND pin | -0.4 | +36 | V |
| Voltage (2) | 0P4V pin to GND pin | -0.4 | +36 | V |
| Voltage (2) | 0P8V pin to GND pin | -0.4 | +36 | V |
| Voltage (2) | 1P6V pin to GND pin | -0.4 | +36 | V |
| Voltage (2) | 3P2V pin to GND pin | -0.4 | +36 | V |
| Voltage (2) | 6P4V1 pin to GND pin | -0.4 | +36 | V |
| Voltage (2) | 6P4V2 pin to GND pin | -0.4 | +36 | V |
| Current | Peak output | Internally limited | Internally limited | Internally limited |
| Temperature | Operating virtual junction, T J | -40 | 125 | °C |
Recommended Operating Conditions
over junction temperature range (unless otherwise noted)
| MIN | NOM | MAX | UNIT | |
|---|---|---|---|---|
| V I | 3 | 35.0 | V | |
| V O | 1.4 | 34.0 | V | |
| V EN | 0 | V IN | V | |
| I O | 0 | 1.0 | A |
Thermal Information
| THERMAL METRIC | (1) | TPS7A47xx RGW | UNIT |
|---|---|---|---|
| 20 PINS | |||
| R θ JA | Junction-to-ambient thermal resistance | 32.5 | °C/W |
| R θ JC(top) | Junction-to-case (top) thermal resistance | 27 | °C/W |
| R θ JB | Junction-to-board thermal resistance | 11.9 | °C/W |
| ψ JT | Junction-to-top characterization parameter | 0.3 | °C/W |
| ψ JB | Junction-to-board characterization parameter | 11.9 | °C/W |
| R θ JC(bot) | Junction-to-case (bottom) thermal resistance | 1.7 | °C/W |
Typical Application
The TPS7A740x is a high-voltage, low-noise, 1-A LDO. Low-noise performance makes this LDO ideal for providing rail voltages to noise-sensitive loads, such as PLLs, oscillators, and high-speed ADCs.
Related Variants
The following components are covered by the same datasheet.
| Part Number | Manufacturer | Package |
|---|---|---|
| TPS7A4700 | Texas Instruments | — |
| TPS7A4701 | Texas Instruments | — |
| TPS7A4701RGWR | Texas Instruments | — |
| TPS7A47XX | Texas Instruments | — |
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