TLV320AIC3204IRHBT
Stereo Audio CodecThe TLV320AIC3204IRHBT is a stereo audio codec from Texas Instruments. View the full TLV320AIC3204IRHBT datasheet below including key specifications, electrical characteristics, absolute maximum ratings.
TLV320AIC3204IRHBT shares its datasheet with TLV320AIC3204, whose page lists every part number it covers.
Official TLV320AIC3204IRHBT datasheet (PDF) — the source this page was extracted from.
TLV320AIC3204IRHBT Key Specifications
| Parameter | Value |
|---|---|
| Data Interface | Serial |
| Dynamic Range, ADCs / DACs (db) Typ | 92 / 100 |
| Mounting Type | Surface Mount |
| Number of ADCs / DACs | 2 / 2 |
| Operating Temperature | -40°C ~ 85°C |
| Package / Case | 32-VFQFN Exposed Pad |
| Resolution (Bits) | 32 b |
| S/N Ratio, ADCs / DACs (db) Typ | 93 / 100 |
| Sigma Delta | Yes |
| Supplier Device Package | 32-VQFN (5x5) |
| Type | Stereo Audio |
| Analog Supply Voltage | 1.5V ~ 1.95V |
| Voltage - Supply, Digital | 1.26V ~ 1.95V |
TLV320AIC3204IRHBT Overview
Part: TLV320AIC3204 — Texas Instruments
Type: Ultra Low Power Stereo Audio Codec
Description: Low-power, low-voltage stereo audio codec with a 100 dB SNR DAC and 93 dB SNR ADC, 4.1 mW stereo 48 ksps playback, 6.1 mW stereo 48 ksps record, integrated PLL and LDOs, in a 5 mm × 5 mm 32-pin VQFN.
Operating Conditions:
- Supply voltage: AVDD 1.5–1.95 V; DVDD 1.26–1.95 V; IOVDD 1.1–3.6 V; LDOIN 1.9–3.6 V
- Operating temperature: -40 to 85 °C
- Master clock (MCLK): up to 50 MHz (DVDD ≥ 1.65 V), up to 25 MHz (DVDD ≥ 1.26 V)
- PLL input frequency: 10–20 MHz (fractional divide), 0.512–20 MHz (integer divide)
- SCL clock frequency: up to 400 kHz
Absolute Maximum Ratings:
- AVDD to AVSS: -0.3 to 2.2 V
- DVDD to DVSS: -0.3 to 2.2 V
- IOVDD to IOVSS: -0.3 to 3.9 V
- LDOIN to AVSS: -0.3 to 3.9 V
- Digital input voltage: -0.3 V to IOVDD + 0.3 V
- Analog input voltage: -0.3 V to AVDD + 0.3 V
- Max junction temperature: 105 °C
- Storage temperature: -55 to 125 °C
- ESD: ±2000 V (HBM), ±750 V (CDM)
Key Specs:
- ADC SNR (A-weighted, inputs ac-shorted, CM = 0.9 V, 25 °C, AVDD = 1.8 V): 93 dB typ
- ADC dynamic range (-60 dB full-scale, 1 kHz): 92 dB typ
- ADC THD+N (-3 dB full-scale, 1 kHz): -85 dB typ
- ADC SNR at CM = 0.75 V, AVDD = 1.5 V: 91 dB typ
- ADC input signal level (0 dB), CM = 0.9 V: 0.5 VRMS
- Stereo line output load resistance: 0.6 kΩ min, 10 kΩ nom
- Headphone load: 14.4 Ω min single-ended, 24.4 Ω min differential
- Thermal resistance RθJA: 31.4 °C/W (RHB, 32-pin)
Features:
- Stereo audio DAC with 100 dB SNR
- Stereo audio ADC with 93 dB SNR
- PowerTune
- Extensive signal processing options
- Six single-ended or three fully-differential analog inputs
- Stereo analog and digital microphone inputs
- Stereo headphone and line outputs
- Very low-noise PGA
- Low-power analog bypass mode
- Programmable microphone bias
- Programmable PLL
- Integrated LDO
- I²C and SPI control interfaces
Applications:
- Portable navigation devices (PND)
- Portable media players (PMP)
- Mobile handsets
- Communication
- Portable computing
Package:
- VQFN-32 (RHB), 5.00 mm × 5.00 mm
TLV320AIC3204IRHBT Features
- 1 · Stereo Audio DAC with 100dB SNR
- 4.1mW Stereo 48ksps DAC Playback
- Stereo Audio ADC with 93dB SNR
- 6.1mW Stereo 48ksps ADC Record
- PowerTune™
- Extensive Signal Processing Options
- Six Single-Ended or 3 Fully-Differential Analog Inputs
- Stereo Analog and Digital Microphone Inputs
- Stereo Headphone Outputs
- Stereo Line Outputs
- Very Low-Noise PGA
- Low Power Analog Bypass Mode
- Programmable Microphone Bias
- Programmable PLL
- Integrated LDO
- 5-mm × 5-mm, 32-Pin VQFN Package
TLV320AIC3204IRHBT Applications
- Portable Navigation Devices (PND)
- Portable Media Player (PMP)
- Mobile Handsets
- Communication
- Portable Computing
TLV320AIC3204IRHBT Pin Configuration
This document describes signals that take on different names depending on how they are configured. In such cases, the different names are placed together and separated by slash (/) characters. For example, "SCL/SS". Active low signals are represented by overbars.
TLV320AIC3204IRHBT Electrical Characteristics
At 25°C, AVDD, DVDD, IOVDD = 1.8V, LDOIN = 3.3V, AVDD and DVDD LDO disabled, fs (Audio) = 48kHz, Cref = 10μF on REF pin, PLL disabled unless otherwise noted.
| PARAMETER | PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT |
|---|---|---|---|---|---|---|
| AUDIO ADC (1) (2) | AUDIO ADC (1) (2) | AUDIO ADC (1) (2) | AUDIO ADC (1) (2) | AUDIO ADC (1) (2) | AUDIO ADC (1) (2) | AUDIO ADC (1) (2) |
| Input signal level (0dB) Device Setup | Single-ended, CM = 0.9V 1kHz sine wave input , Single-ended Configuration IN1_R to Right ADC and IN1_L to Left ADC, R in = 20K, f s = 48kHz, AOSR = 128, MCLK = 256 x f s , PLL Disabled; AGC = OFF, Channel Gain = 0dB, Processing Block = PRB_R1, Power Tune = PTM_R4 Inputs ac-shorted to ground | 80 | 0.5 93 | V RMS | ||
| SNR | Signal-to-noise ratio, A-weighted (1)(2) | IN2_R, IN3_R routed to Right ADC and ac-shorted to ground IN2_L, IN3_L routed to Left ADC and ac-shorted to ground | 93 | dB | ||
| DR | Dynamic range A-weighted (1)(2) | -60dB full-scale, 1-kHz input signal -3 dB full-scale, 1-kHz input signal | 92 -85 | -70 | dB | |
| THD+N | Total Harmonic Distortion plus Noise | IN2_R, IN3_R routed to Right ADC IN2_L, IN3_L routed to Left ADC -3dB full-scale, 1-kHz input signal | -85 | dB | ||
| AUDIO ADC | AUDIO ADC | AUDIO ADC | AUDIO ADC | AUDIO ADC | AUDIO ADC | AUDIO ADC |
| Input signal level (0dB) Device Setup | Single-ended, CM = 0.75V, AV DD = 1.5V 1kHz sine wave input, Single-ended Configuration IN1_R, IN2_R, IN3_R routed to Right ADC IN1_L, IN2_L, IN3_L routed to Left ADC R in = 20k Ω , f s = 48kHz, AOSR = 128, MCLK = 256 x f s , PLL Disabled, AGC = OFF, Channel Gain = 0dB, Processing Block = PRB_R1 Power Tune = PTM_R4 | 0.375 | V RMS | |||
| SNR | Signal-to-noise ratio, A-weighted (1)(2) | Inputs ac-shorted to ground | 91 | dB | ||
| DR | Dynamic range A-weighted (1)(2) | -60dB full-scale, 1-kHz input signal | 90 | dB | ||
| THD+N | Total Harmonic Distortion plus Noise | -3dB full-scale, 1-kHz input signal | -80 | dB |
TLV320AIC3204IRHBT Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted) (1)
| MIN | MAX | UNIT | ||
|---|---|---|---|---|
| Input voltage | AV DD to AV SS | -0.3 | 2.2 | V |
| Input voltage | DV DD to DV SS | -0.3 | 2.2 | V |
| Input voltage | IOV DD to IOV SS | -0.3 | 3.9 | V |
| Input voltage | LDOIN to AV SS | -0.3 | 3.9 | V |
| Digital Input voltage to ground | Digital Input voltage to ground | -0.3 | IOV DD + 0.3 | V |
| Analog input voltage to ground | Analog input voltage to ground | -0.3 | AV DD + 0.3 | V |
| Operating temperature range | Operating temperature range | -40 | 85 | °C |
| Junction temperature (T J Max) | Junction temperature (T J Max) | 105 | °C | |
| Storage temperature, T stg | Storage temperature, T stg | -55 | 125 | °C |
TLV320AIC3204IRHBT Recommended Operating Conditions
| MIN | NOM | MAX | UNIT | |||
|---|---|---|---|---|---|---|
| LDOIN | Referenced to AV SS (1) | 1.9 | 3.6 | V | ||
| AV DD | Referenced to AV SS (1) | 1.5 | 1.8 | 1.95 | V | |
| IOV DD | Power Supply Voltage Range | Referenced to IOV SS (1) | 1.1 | 3.6 | V | |
| DV DD (2) | Referenced to DV SS (1) | 1.26 | 1.8 | 1.95 | V | |
| PLL Input Frequency | Clock divider uses fractional divide (D > 0), P = 1, DV DD ≥ 1.65V (Refer to the table in SLAA557, Maximum TLV320AIC3204 Clock Frequencies ) | 10 | 20 | MHz | ||
| Clock divider uses integer divide (D = 0), P = 1, DV DD ≥ 1.65V (Refer to the table in SLAA557, Maximum TLV320AIC3204 Clock Frequencies ) | 0.512 | 20 | MHz | |||
| MCLK | Master Clock Frequency | MCLK; Master Clock Frequency; DV DD ≥ 1.65V MCLK; Master Clock Frequency; DV DD ≥ 1.26V | 50 25 | MHz MHz | ||
| SCL | SCL Clock Frequency | 400 | kHz | |||
| Audio input max ac signal swing (IN1_L, IN1_R, IN2_L, IN2_R, IN3_L, IN3_R) | CM = 0.75 V | 0 | 0.530 | 0.75 or AVDD-0.75 (3) | Vpeak | |
| CM = 0.9 V | 0 | 0.707 | 0.9 or AVDD-0.9 (3) | Vpeak | ||
| LOL, LOR | Stereo line output load resistance | 0.6 | 10 | k Ω | ||
| HPL, HPR | Stereo headphone output load resistance | Single-ended configuration | 14.4 | 16 | Ω | |
| HPL, HPR | Headphone output load resistance | Differential configuration | 24.4 | 32 | Ω | |
| C Lout | Digital output load capacitance | 10 | pF | |||
| T OPR | Operating Temperature Range | -40 | 85 | °C |
TLV320AIC3204IRHBT Thermal Information
| THERMAL METRIC (1) | THERMAL METRIC (1) | TLV320AIC3204 RHB (32 PINS) | UNIT |
|---|---|---|---|
| R θ JA | Junction-to-ambient thermal resistance | 31.4 | °C/W |
| R θ JCtop | Junction-to-case (top) thermal resistance | 21.4 | °C/W |
| R θ JB | Junction-to-board thermal resistance | 5.4 | °C/W |
| ψ JT | Junction-to-top characterization parameter | 0.2 | °C/W |
| ψ JB | Junction-to-board characterization parameter | 5.4 | °C/W |
| R θ JCbot | Junction-to-case (bottom) thermal resistance | 0.9 | °C/W |
TLV320AIC3204IRHBT Typical Application
The TLV320AIC3204 is a highly integrated stereo audio codec with integrated processing blocks and flexible digital audio interface options. It enables many different types of audio platforms having a need for stereo audio record and playback and needing to interface with other devices in the system over a digital audio interface.
Variants on the same datasheet
These parts have exact links to the same datasheet. They are candidates to compare, not verified drop-in replacements; check package, pinout and electrical limits.
| Part Number | Manufacturer | Package |
|---|---|---|
| TLV320AIC3204 | Texas Instruments | QFN-32 5x5mm |
| TLV320AIC3204IRHBR | Texas Instruments | 32-VFQFN Exposed Pad |
| TLV320AIC3204S | Texas Instruments | QFN-32 5x5mm |
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