Overview

Part: STM32WB55xx STM32WB35xx from STMicroelectronics

Type: Multiprotocol wireless 32-bit MCU Arm®-based Cortex®-M4 with FPU, Bluetooth® 5.4 and 802.15.4 radio solution

Key Specs:

Radio Frequency: 2.4 GHz
Bluetooth® Low Energy RX Sensitivity: -96 dBm (at 1 Mbps)
802.15.4 RX Sensitivity: -100 dBm
Programmable Output Power: up to +6 dBm
Power Supply: 1.71 to 3.6 V
Operating Temperature: – 40 °C to 85 / 105 °C
CPU Core: Arm® 32-bit Cortex®-M4 with FPU
CPU Frequency: up to 64 MHz
Flash Memory: Up to 1 MB
SRAM: Up to 256 KB
ADC Resolution: 12-bit
ADC Sample Rate: 4.26 Msps
Shutdown Mode Current: 13 nA
Standby Mode Current: 600 nA (with RTC + 32 KB RAM)
Stop Mode Current: 2.1 µA (with RTC + 256 KB RAM)
Active Mode MCU Current: < 53 µA / MHz (RF and SMPS on)
Radio RX Current: 4.5 mA
Radio TX Current: 5.2 mA (at 0 dBm)

Features:

RF transceiver supporting Bluetooth® 5.4 specification, IEEE 802.15.4-2011 PHY and MAC (supporting Thread 1.3 and Zigbee® 3.0)
Integrated balun to reduce BOM
Dedicated Arm® 32-bit Cortex® M0+ CPU for real-time Radio layer
Support for 2 Mbps, GATT caching, EATT, advertising extension

Features

Include ST state-of-the-art patented technology
Radio
- 2.4 GHz
- RF transceiver supporting Bluetooth® 5.4 specification, IEEE 802.15.4-2011 PHY and MAC, supporting Thread 1.3 and Zigbee® 3.0
- RX sensitivity: -96 dBm (Bluetooth® Low Energy at 1 Mbps), -100 dBm (802.15.4)
- Programmable output power up to +6 dBm with 1 dB steps
- Integrated balun to reduce BOM
- Support for 2 Mbps
- Support GATT caching
- Support EATT (enhanced ATT)
- Support advertising extension
- Dedicated Arm® 32-bit Cortex® M0+ CPU for real-time Radio layer
- Accurate RSSI to enable power control
- Suitable for systems requiring compliance with radio frequency regulations ETSI EN 300 328, EN 300 440, FCC CFR47 Part 15 and ARIB STD-T66
- Support for external PA
- Available integrated passive device (IPD) companion chip for optimized matching solution (MLPF-WB-01E3, or MLPF-WB55-02E3, or MLPF-WB-02D3)
Ultra-low-power platform
- 1.71 to 3.6 V power supply
- – 40 °C to 85 / 105 °C temperature ranges
- 13 nA shutdown mode
- 600 nA Standby mode + RTC + 32 KB RAM
- 2.1 µA Stop mode + RTC + 256 KB RAM
- Active-mode MCU: < 53 µA / MHz when RF and SMPS on

Radio: Rx 4.5 mA / Tx at 0 dBm 5.2 mA
Core: Arm® 32-bit Cortex®-M4 CPU with FPU, adaptive real-time accelerator (ART Accelerator) allowing 0-wait-state execution from flash memory, frequency up to 64 MHz, MPU, 80 DMIPS, and DSP instructions
Performance benchmark
- 1.25 DMIPS/MHz (Drystone 2.1)
- 219.48 CoreMark® (3.43 CoreMark/MHz at 64 MHz)
Energy benckmark
- 303 ULPMark™ CP score
Supply and reset management
- High efficiency embedded SMPS step-down converter with intelligent bypass mode
- Ultra-safe, low-power BOR (brownout reset) with five selectable thresholds
- Ultra-low-power POR/PDR
- Programmable voltage detector (PVD)
- VBAT mode with RTC and backup registers
Clock sources
- 32 MHz crystal oscillator with integrated trimming capacitors (Radio and CPU clock)
- 32 kHz crystal oscillator for RTC (LSE)
- Internal low-power 32 kHz (±5%) RC (LSI1)
Internal low-power 32 kHz (stability ±500 ppm) RC (LSI2)
Internal multispeed 100 kHz to 48 MHz oscillator, auto-trimmed by LSE (better than ±0.25% accuracy)
High speed internal 16 MHz factory trimmed RC (±1%)
2x PLL for system clock, USB, SAI, ADC

• Memories

Up to 1 MB flash memory with sector protection (PCROP) against R/W operations, enabling radio stack and application
Up to 256 KB SRAM, including 64 KB with hardware parity check
20x 32-bit backup register
Boot loader supporting USART, SPI, I2C and USB interfaces
OTA (over the air) Bluetooth® Low Energy and 802.15.4 update
Quad SPI memory interface with XIP
1 Kbyte (128 double words) OTP
Rich analog peripherals (down to 1.62 V)
- 12-bit ADC 4.26 Msps, up to 16-bit with hardware oversampling, 200 µA/Msps
- 2x ultra-low-power comparator
- Accurate 2.5 V or 2.048 V reference voltage buffered output

• System peripherals

Inter processor communication controller (IPCC) for communication with Bluetooth® Low Energy and 802.15.4
HW semaphores for resource sharing between CPUs
2x DMA controllers (7x channels each) supporting ADC, SPI, I2C, USART, QSPI, SAI, AES, timers
1x USART (ISO 7816, IrDA, SPI Master, Modbus, and Smartcard mode)
1x LPUART (low power)
2x SPI 32 Mbit/s
2x I2C (SMBus/PMBus®)
1x SAI (dual channel high quality audio)
1x USB 2.0 FS device, crystal-less, BCD and LPM
Touch sensing controller, up to 18 sensors
LCD 8x40 with step-up converter
1x 16-bit, four channels advanced timer
2x 16-bit, two channels timer
1x 32-bit, four channels timer
2x 16-bit ultra-low-power timer
1x independent Systick
1x independent watchdog
1x window watchdog

• Security and ID

Secure firmware installation (SFI) for Bluetooth® Low Energy and 802.15.4 SW stack
3x hardware encryption AES maximum 256-bit for the application, the Bluetooth® Low Energy and IEEE802.15.4
Customer key storage/manager services
HW public key authority (PKA)
Cryptographic algorithms: RSA, Diffie-Helman, ECC over GF(p)
True random number generator (RNG)
Sector protection against R/W operation (PCROP)
CRC calculation unit
Die information: 96-bit unique ID
IEEE 64-bit unique ID, possibility to derive 802.15.4 64-bit and Bluetooth® Low Energy 48-bit EUI
Up to 72 fast I/Os, 70 of them 5 V-tolerant
Development support
- Serial wire debug (SWD), JTAG for the application processor
- Application cross trigger with input / output
- Embedded Trace Macrocell™ for application
ECOPACK2 compliant packages

Table 1. Device summary

| Reference | Part numbers | |-------------|-------------------------------------------------------------------------------------------------------------------------------------|--|--|--|--|--|--| | STM32WB55xx | STM32WB55CC, STM32WB55CE, STM32WB55CG, STM32WB55RC, STM32WB55RE, STM32WB55RG,
STM32WB55VC, STM32WB55VE, STM32WB55VG, STM32WB55VY | | STM32WB35xx | STM32WB35CC, STM32WB35CE |

Pin Configuration

The RF block contains dedicated pins, listed in Table 4.

Table 4. RF pin list

| Name | Type | Description | |----------------------|------|---------------------------------------------------------------------------------------|--|--|--|--|--| | RF1 | | RF Input/output, must be connected to the antenna through a low-pass matching network | | OSC_OUT | | OSC_IN | I/O | 32 MHz main oscillator, also used as HSE source | | RF_TX_
MOD_EXT_PA | | External PA transmit control | | VDDRF | VDD | Dedicated supply, must be connected to VDD | | VSSRF(1) | VSS | To be connected to GND | ^1. On packages with exposed pad, this pad must be connected to GND plane for correct RF operation.

Electrical Characteristics

The definition and values of input/output AC characteristics are given in Table 74.

Unless otherwise specified, the parameters given are derived from tests performed under the ambient temperature and supply voltage conditions summarized in Table 24: General operating conditions.

^2. Guaranteed by design.

^3. TTL and CMOS outputs are compatible with JEDEC standards JESD36 and JESD52.

Table 74. I/O AC characteristics(1)(2)

| Speed | Symbol | Parameter | Conditions | Min | Max | Unit | |-------|--------|---------------------------------|----------------------------------|-----|--------|------|--| | | | | C = 50 pF, 2.7 V ≤ VDD ≤ 3.6 V | - | 5 | | | | | C = 50 pF, 1.62 V ≤ VDD ≤ 2.7 V | - | 1 | | | Fmax | Maximum frequency | C = 10 pF, 2.7 V ≤ VDD ≤ 3.6 V | - | 10 | MHz | | | | | C = 10 pF, 1.62 V ≤ VDD ≤ 2.7 V | - | 1.5 | | 00 | | | C = 50 pF, 2.7 V ≤ VDD ≤ 3.6 V | - | 25 | | | | | C = 50 pF, 1.62 V ≤ VDD ≤ 2.7 V | - | 52 | | | Tr/Tf | Output rise and fall time | C = 10 pF, 2.7 V ≤ VDD ≤ 3.6 V | - | 17 | ns | | | | | C = 10 pF, 1.62 V ≤ VDD ≤ ≤2.7 V | - | 37 | | | | | C = 50 pF, 2.7 V ≤ VDD ≤ 3.6 V | - | 25 | | | | | C = 50 pF, 1.62 V ≤ VDD ≤ ≤2.7 V | - | 10 | | | Fmax | Maximum frequency | C = 30 pF, 2.7 V ≤ VDD ≤ 3.6 V | - | 50 | MHz | | | | | C = 30 pF, 1.62 V ≤ VDD ≤ 2.7 V | - | 15 | | 01 | | | C = 50 pF, 2.7 V ≤ VDD ≤ 3.6 V | - | 9 | | | | Output rise and fall time | C = 50 pF, 1.62 V ≤ VDD ≤ 2.7 V | - | 16 | ns | | | Tr/Tf | C = 30 pF, 2.7 V ≤ VDD ≤ 3.6 V | | - | 4.5 | | | | C = 30 pF, 1.62 V ≤ VDD ≤ 2.7 V | | - | 9 | | | | | C = 50 pF, 2.7 V ≤ VDD ≤ 3.6 V | - | 50 | | | | C = 50 pF, 1.62 V ≤ VDD ≤ 2.7 V | | - | 25 | | | Fmax | Maximum frequency | C = 30 pF, 2.7 V ≤ VDD ≤ 3.6 V | - | 100(3) | MHz | | | | | C = 30 pF, 1.62 V ≤ VDD ≤ 2.7 V | - | 37.5 | | 10 | | | C = 50 pF, 2.7 V ≤ VDD ≤ 3.6 V | - | 5.8 | | | | | C = 50 pF, 1.62 V ≤ VDD ≤ 2.7 V | - | 11 | | | Tr/Tf | Output rise and fall time | C = 10 pF, 2.7 V ≤ VDD ≤ 3.6 V | - | 2.5 | ns | | | | | C = 10 pF, 1.62 V ≤ VDD ≤ 2.7 V | - | 5 | | | | | C = 30 pF, 2.7 V ≤ VDD ≤ 3.6 V | - | 120(3) | | | | | C = 30 pF, 1.62 V ≤ VDD ≤ 2.7 V | - | 50 | | | Fmax | Maximum frequency | C = 10 pF, 2.7 V ≤ VDD ≤ 3.6 V | - | 180(3) | MHz | | | | | C = 10 pF, 1.62 V ≤ VDD ≤ 2.7 V | - | 75(3) | | 11 | | | C = 30 pF, 2.7 V ≤ VDD ≤ 3.6 V | - | 3.3 | | | | | C = 30 pF, 1.62 V ≤ VDD ≤ 2.7 V | - | 6 | | | Tr/Tf | Output rise and fall time | C = 10 pF, 2.7 V ≤ VDD ≤ 3.6 V | - | 1.7 | ns | | | | | C = 10 pF, 1.62 V ≤ VDD ≤ 2.7 V | - | 3.3 | ^1. The maximum frequency is achieved with a duty cycle comprised between 45 and 55%, when loaded by the specified capacitance.

^2. The fall and rise time are defined, respectively, between 90 and 10%, and between 10 and 90% of the output waveform.

3. This value represents the I/O capability but the maximum system frequency is limited to 64 MHz.

Absolute Maximum Ratings

Stresses above the absolute maximum ratings listed in Table 20, Table 21 and Table 22 may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these conditions is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability.

Device mission profile (application conditions) is compliant with JEDEC JESD47 Qualification Standard, extended mission profiles are available on demand.

Symbol	Ratings	Min	Max	Unit
VDDX - VSS	External main supply voltage (including VDD, VDDA, VDDUSB, VLCD, VDDRF, VDDSMPS, VBAT, VREF+)	-0.3	4.0
	Input voltage on FT_xxx pins		min (VDD, VDDA, VDDUSB, VLCD, VDDRF, VDDSMPS) + 4.0(3)(4)	V
VIN(2)	Input voltage on TT_xx pins	VSS-0.3	4.0
	Input voltage on any other pin		4.0
∆VDDx	Variations between different VDDX power pins of the same domain	-	50	mV
VSSx-VSS	Variations between all the different ground pins(5)	-	50
VREF+ - VDDA	Allowed voltage difference for VREF+ > VDDA	-	0.4	V

Table 20. Voltage characteristics(1)

1. All main power (VDD, VDDRF, VDDA, VDDUSB, VLCD, VBAT) and ground (VSS, VSSA) pins must always be connected to the external power supply, in the permitted range.
1. VIN maximum must always be respected. Refer to Table 21 for the maximum allowed injected current values.
1. This formula must be applied only on the power supplies related to the IO structure described in the pin definition table.
1. To sustain a voltage higher than 4 V the internal pull-up/pull-down resistors must be disabled.
1. Include VREF- pin.

Table 21. Current characteristics

Symbol	Ratings	Max	Unit
∑IVDD	power lines (source)(1) Total current into sum of all VDD	130
∑IVSS	ground lines (sink)(1) Total current out of sum of all VSS	130
IVDD(PIN)	power pin (source)(1) Maximum current into each VDD	100
IVSS(PIN)	ground pin (sink)(1) Maximum current out of each VSS	100
	Output current sunk by any I/O and control pin except FT_f	20
IIO(PIN)	Output current sunk by any FT_f pin	20
	Output current sourced by any I/O and control pin	20	mA
	Total output current sunk by sum of all I/Os and control pins(2)	100
∑IIO(PIN)	Total output current sourced by sum of all I/Os and control pins(2)	100
	Injected current on FT_xxx, TT_xx, RST and B pins, except PB0 and PB1	–5 / +0(4)
IINJ(PIN)(3)	Injected current on PB0 and PB1	-5/0
∑ IINJ(PIN)	Total injected current (sum of all I/Os and control pins)(5)	25
^1. All main power (VDD, VDDRF, VDDA, VDDUSB, VBAT) and ground (VSS, VSSA) pins must always be connected to the external power supplies, in the permitted range.

^2. This current consumption must be correctly distributed over all I/Os and control pins. The total output current must not be sunk/sourced between two consecutive power supply pins referring to high pin count packages.

^3. Positive injection (when VIN > VDD) is not possible on these I/Os and does not occur for input voltages lower than the specified maximum value.

^4. A negative injection is induced by VIN < VSS. IINJ(PIN) must never be exceeded. Refer also to Table 20: Voltage characteristics for the maximum allowed input voltage values.

When several inputs are submitted to a current injection, the maximum ∑|IINJ(PIN)| is the absolute sum of the negative injected currents (instantaneous values).

Table 22. Thermal characteristics

Symbol	Ratings	Value	Unit
TSTG	Storage temperature range	–65 to +150
TJ	Maximum junction temperature	130	°C

6.3 Operating conditions

6.3.1 Summary of main performance

Table 23. Main performance at VDD = 3.3 V

| | Parameter | | Test conditions | Typ | Unit | |-------|-----------------------------|---------------|---------------------------------------------------------------------------------|-------|------|--| | | | | VBAT (VBAT = 1.8 V, VDD = 0 V) | 0.002 | | | | | Shutdown (VDD = 1.8 V) | 0.013 | | ICORE | | | Standby (VDD = 1.8 V, 32 Kbytes SRAM2a retention) | 0.320 | | | | | Stop2 | 1.85 | | | Core current
consumption | | Sleep (16 MHz) | 740 | | | | | LP run (2 MHz) | 320 | | | | | Run (64 MHz) | 5000 | | | | | Radio RX(1) | 4500 | | | | | Radio TX 0 dBm output power(1) | 5200 | µA | | | | Bluetooth | Advertising with Stop 2(2)
(Tx = 0 dBm; Period 1.28 s; 31 bytes, 3 channels) | 13 | | | Peripheral | Low
Energy | Advertising with Stop 2(2)
(Tx = 0 dBm, 6 bytes; period 10.24 s, 3 channels) | 4 | | IPERI | current | LP timers | - | 6 | | | consumption | I2C3 | - | 7.1 | | | | LPUART | - | 7.7 | | | | RTC | - | 2.5 | ^1. Power consumption including RF subsystem and digital processing.

6.3.2 General operating conditions

Table 24. General operating conditions

Symbol	Parameter	Conditions	Min	Max	Unit
fHCLK	Internal AHB clock frequency	-	0	64
fPCLK1	Internal APB1 clock frequency	-	0	64	MHz
fPCLK2	Internal APB2 clock frequency	-	0	64
VDD	Standard operating voltage	-	1.71(1)(2)	3.6
		ADC or COMP used	1.62
VDDA	Analog supply voltage	VREFBUF used	2.4	3.6	V
		ADC, COMP, VREFBUF not used(3)	1.71
VBAT	Backup operating voltage	-	1.55	3.6
^2. Power consumption averaged over 100 s, including Cortex-M4, RF subsystem, digital processing and Cortex-M0+.

| Symbol | Parameter | Conditions | Min | Max | Unit | |---------|----------------------------------------------------|---------------------------|------|----------------------------------------------------------------|------|--| | VFBSMPS | SMPS feedback voltage | - | 1.4 | 3.6 | | VDDRF | Minimum RF voltage | - | 1.71 | 3.6 | | | | USB used | 3.0 | 3.6 | | VDDUSB | USB supply voltage | USB not used | 0 | 3.6 | V | | | | TT_xx I/O | –0.3 | VDD + 0.3 | | VIN | I/O input voltage | All I/O except TT_xx | –0.3 | min (min (VDD, VDDA,
VDDUSB, VLCD) + 3.6 V,
5.5 V)(4)(5) | | | | UFQFPN48 | - | 803 | | | Power dissipation at
TA
= 85 °C for suffix 6 | VFQFPN68 | - | 425 | mW | | PD | or | WLCSP100 | - | 558 | | | TA = 105 °C for suffix 7(6) | UFBGA129 | - | 481 | | | Ambient temperature for the | Maximum power dissipation | | 85 | | | suffix 6 version | Low-power dissipation(7) | –40 | 105 | | TA | Ambient temperature for the | Maximum power dissipation | | 105 | | | suffix 7 version | Low-power dissipation(7) | –40 | 125 | °C | | | | Suffix 6 version | | 105 | | TJ | Junction temperature range | Suffix 7 version | –40 | 125 | Table 24. General operating conditions (continued)

6.3.3 RF Bluetooth Low Energy characteristics

RF characteristics are given at 1 Mbps, unless otherwise specified.

Table 25. RF transmitter Bluetooth Low Energy characteristics

Symbol	Parameter	Test conditions	Min	Typ	Max	Unit
Fop	Frequency operating range	-	2402	-	2480
Fxtal	Crystal frequency	-	-	32	-	MHz
∆F	Delta frequency	-	-	250	-	kHz

^1. When RESET is released functionality is guaranteed down to VBOR0 min.

^2. When VDDmin is lower then 1.95 V, the SMPS operation mode must be conditioned by enabling the BORH configuration to force SMPS bypass mode, or the SMPS must not be enabled.

^3. When not used, VDDA must be connected to VDD.

^4. This formula must be applied only on the power supplies related to the IO structure described by the pin definition table. Maximum I/O input voltage is the smallest value between min (VDD, VDDA, VDDUSB, VLCD) + 3.6 V and 5.5V.

^5. For operation with voltage higher than min (VDD, VDDA, VDDUSB, VLCD) + 0.3 V, the internal pull-up and pull-down resistors must be disabled.

^6. If TA is lower, higher PD values are allowed as long as TJ does not exceed TJmax (see Section 7.6: Thermal characteristics).

^7. In low-power dissipation state, TA can be extended to this range as long as TJ does not exceed TJmax (see Section 7.6: Thermal characteristics).

Table 25. RF transmitter Bluetooth Low Energy characteristics (continued)

Symbol	Parameter	Test conditions	Min	Typ	Max	Unit
Rgfsk	On Air data rate	-	-	1	2	Mbps
PLLres	RF channel spacing	-	-	2	-	MHz

Table 26. RF transmitter Bluetooth Low Energy characteristics (1 Mbps)⁽¹⁾

| Symbol | Parameter | | Test conditions | Min | Typ | Max | Unit | |---------------------|---------------------------------------------------|-------------|------------------------------------------------------------------------------------------------------------------------------------|------|-----|------|---------------|--| | | Maximum output power | | SMPS Bypass ( $V_{DD} > 1.71 \text{ V}$ ) or ON ( $V_{FBSMPS} = 1.7 \text{ V}$ and $V_{DD} > 1.95 \text{ V}$ ) ⁽²⁾ | - | 6.0 | - | | P _rf | | | SMPS Bypass ( $V_{DD} > 1.71 \text{ V}$ ) or ON ( $V_{FBSMPS} = 1.4 \text{ V}$ and $V_{DD} > 1.95 \text{ V}$ ), Code $29^{(2)(3)}$ | - | 3.7 | - | dBm | | | 0 dBm output power | | - | - | 0 | - | | | Minimum output power | | - | - | -20 | - | | P _band | Output power variation over | er the band | Tx = 0 dBm - Typical | -0.5 | - | 0.4 | dB | | BW6dB | 6 dB signal bandwidth | | Tx = maximum output power | - | 670 | - | kHz | | IBSE | In hand anurious emission | 2 MHz | Bluetooth® Low Energy: -20 dBm | - | -50 | - | dBm | | IDSE | In band spurious emission | ≥ 3 MHz | Bluetooth® Low Energy: -30 dBm | - | -53 | - | UDIII | | f _d | Frequency drift | • | Bluetooth® Low Energy: ±50 kHz | -50 | - | +50 | kHz | | maxdr | Maximum drift rate | | Bluetooth ^® Low Energy:
±20 kHz / 50 µs | -20 | - | +20 | kHz/
50 µs | | fo | Frequency offset | | Bluetooth ^® Low Energy:
±150 kHz | -150 | - | +150 | kHz | | Δf1 | Frequency deviation avera | age | Bluetooth ^® Low Energy:
between 225 and 275 kHz | 225 | - | 275 | KΠZ | | Δfa | Frequency deviation Δf2 (average) / Δf1 (average) | | Bluetooth® Low Energy:> 0.80 | 0.80 | - | - | - | | OBSE ⁽⁴⁾ | Out of band | < 1 GHz | | - | -61 | - | dBm | | ODOL 1 | spurious emission | ≥ 1 GHz | - | - | -46 | - | abiii | Measured in conducted mode, based on reference design (see AN5165), using output power specific external RF filter and impedance matching networks to interface with a 50 Ω antenna.

^2. V_FBSMPS and V_DD must be set to different voltage levels, depending upon the desired TX signal (see AN5246 How to use SMPS to improve power efficiency on STM32WB MCUs, available on www.st.com).

^3. Code 29 means Tx Power (PA Level) selection of 29 (25 being 0 dBm).

^4. Suitable for systems targeting compliance with worldwide radio-frequency regulations ETSI EN 300 328 and EN 300 440 Class 2 (Europe), FCC CFR47 Part 15 (US), and ARIB STD-T66 (Japan).

Table 27. RF transmitter Bluetooth Low Energy characteristics (2 Mbps)⁽¹⁾

Symbol	Parameter		Test conditions	Min	Typ	Max	Unit
	Maximum output power		SMPS Bypass ( $V_{DD} > 1.71 \text{ V}$ ) or ON ( $V_{FBSMPS} = 1.7 \text{ V}$ and $V_{DD} > 1.95 \text{ V}$ ) ⁽²⁾	-	6.0	-
P _rf			SMPS Bypass or ON ( $V_{FBSMPS}$ = 1.4 V and $V_{DD}$ > 1.71 V), Code $29^{(2)(3)}$	ı	3.7	·	dBm
	0 dBm output power		-	-	0	-
	Minimum output power		-	-	-20	-
P _band	Output power variation over the band		Tx = 0 dBm - Typical	-0.5	-	0.4	dB
BW6dB	6 dB signal bandwidth		Tx = maximum output power	-	670	-	kHz
		4 MHz	Bluetooth® Low Energy: -20 dBm	-	-56	-
IBSE	In band spurious emission	5 MHz	Bluetooth® Low Energy: -20 dBm	-	-57	-	dBm
		≥ 6 MHz	Bluetooth® Low Energy: -30 dBm		-58
f _d	Frequency drift		Bluetooth® Low Energy: ±50 kHz	-50	-	50	kHz
maxdr	Maximum drift rate		Bluetooth ^® Low Energy: ±20 kHz / 50 µs	-20	-	20	kHz/ 50 µs
fo	Frequency offset		Bluetooth® Low Energy: ±150 kHz	-150	-	150
Δf1	Frequency deviation avera	ge	Bluetooth ^® Low Energy: between 450 and 550 kHz	450	-	550	kHz
Δfa	Frequency deviation Δf2 (average) / Δf1 (average)		Bluetooth ^® Low Energy:> 0.80	0.80	-	-	-
OBSE ⁽⁴⁾	Out of band	< 1 GHz	-	-	-61	-	dBm
ODOL. /	spurious emission	≥ 1 GHz	-	-	-46	-	UDIII

Measured in conducted mode, based on reference design (see AN5165), using output power specific external RF filter and impedance matching networks to interface with a 50 Ω antenna.

V_FBSMPS and V_DD must be set to different voltage levels, depending upon the desired TX signal (see AN5246 Usage of SMPS on STM32WB Series microcontrollers, available on www.st.com).

^3. Code 29 means Tx Power (PA_Level) selection of 29 (25 being 0 dBm).

^4. Suitable for systems targeting compliance with worldwide radio-frequency regulations ETSI EN 300 328 and EN 300 440 Class 2 (Europe), FCC CFR47 Part 15 (US), and ARIB STD-T66 (Japan).

Table 28. RF receiver Bluetooth Low Energy characteristics (1 Mbps)

| Symbol | Parameter | Test conditions | Typ | Unit | |--------------------------|-----------------------------------------------|--------------------------------------------------------------|-------|------|--| | Prx_max | Maximum input signal | PER <30.8%
Bluetooth ^® Low Energy: min -10 dBm | 0 | | D (1) | High sensitivity mode (SMPS Bypass) | PER <30.8% | -96 | | Psens ⁽¹⁾ | High sensitivity mode (SMPS ON) | Bluetooth ^® Low Energy: max -70 dBm | -95.5 | dBm | | Rssi _maxrange | RSSI maximum value | - | -7 | | Rssi _minrange | RSSI minimum value | - | -94 | | Rssi _accu | RSSI accuracy | - | 2 | | C/Ico | Co-channel rejection | Bluetooth ^® Low Energy: 21 dB | 8 | | | | Adj ≥ 5 MHz
Bluetooth ^® Low Energy: -27 dB | -53 | | | | Adj ≤ -5 MHz
Bluetooth ^® Low Energy: -27 dB | -53 | | | | Adj = 4 MHz
Bluetooth ^® Low Energy: -27 dB | -48 | | | | Adj = -4 MHz
Bluetooth ^® Low Energy: -15 dB | -33 | | C/I | Adjacent channel interference | Adj = 3 MHz
Bluetooth ^® Low Energy: -27 dB | -46 | dB | | | | Adj = 2 MHz
Bluetooth ^® Low Energy: -17 dB | -39 | | | | Adj = -2 MHz
Bluetooth ^® Low Energy: -15 dB | -35 | | | | Adj = 1 MHz
Bluetooth ^® Low Energy: 15 dB | -2 | | | | Adj = -1 MHz
Bluetooth ^® Low Energy: 15 dB | 2 | | C/Image | Image rejection (F _image = -3 MHz) | Bluetooth ^® Low Energy: -9 dB | -29 | | | | f2-f1 = 3 MHz
Bluetooth ^® Low Energy: -50 dBm | -34 | | P_IMD | Intermodulation | f2-f1 = 4 MHz
Bluetooth ^® Low Energy: -50 dBm | -30 | dBm | | | | f2-f1 = 5 MHz
Bluetooth ^® Low Energy: -50 dBm | -32 | Table 28. RF receiver Bluetooth Low Energy characteristics (1 Mbps) (continued)

Symbol	Parameter	Test conditions	Typ	Unit
	Out of band blocking	30 to 2000 MHz Bluetooth ^® Low Energy: -30 dBm	-3
D ODD		2003 to 2399 MHz Bluetooth® Low Energy: -35 dBm	-5	dBm
P_OBB		2484 to 2997 MHz Bluetooth ^® Low Energy: -35 dBm	-2	ивііі
		3 to 12.75 GHz Bluetooth ^® Low Energy: -30 dBm	7
^1. With ideal TX.

Table 29. RF receiver Bluetooth Low Energy characteristics (2 Mbps)

Symbol	Parameter	Test conditions	Typ	Unit
Prx_max	Maximum input signal	PER <30.8% Bluetooth ^® Low Energy: min -10 dBm	0
- (1)	High sensitivity mode (SMPS Bypass)	PER <30.8%	-93
Psens ⁽¹⁾	High sensitivity mode (SMPS ON)	Bluetooth ^® Low Energy: max -70 dBm	-92.5	dBm
Rssi _maxrange	RSSI maximum value	-	-7
Rssi _minrange	RSSI minimum value	-	-94
Rssi _accu	RSSI accuracy	-	2
C/Ico	Co-channel rejection	Bluetooth® Low Energy spec: 21 dB	9
		Adj ≥ 8MHz Bluetooth ^® Low Energy: -27 dB	-53
		Adj ≤ -8 MHz Bluetooth ^® Low Energy: -27 dB	-50
		Adj = 6 MHz Bluetooth ^® Low Energy: -27 dB	-49
C/I	Adjacent channel interference	Adj = -6 MHz Bluetooth ^® Low Energy: -15 dB	-46	dB
		Adj = 4 MHz Bluetooth ^® Low Energy: -17 dB	-42
		Adj = 2 MHz Bluetooth ^® Low Energy:15 dB	-3
		Adj = -2 MHz Bluetooth ^® Low Energy:15 dB	-3
C/Image	Image rejection (F _image = -4 MHz)	Bluetooth® Low Energy: -9 dB	-26
Table 29. RF receiver Bluetooth Low Energy characteristics (2 Mbps) (continued)

Symbol	Parameter	Test conditions	Typ	Unit
		f2-f1 = 6 MHz Bluetooth® Low Energy: -50 dBm	-29
P_IMD	Intermodulation	f2-f1 = 8 MHz Bluetooth® Low Energy: -50 dBm	-30
		f2-f1 = 10 MHz Bluetooth® Low Energy: -50 dBm	-29
		30 to 2000 MHz Bluetooth® Low Energy: -30 dBm	-3	dBm
		2003 to 2399 MHz Bluetooth® Low Energy: -35 dBm	-9
P_OBB	Out of band blocking	2484 to 2997 MHz Bluetooth® Low Energy: -35 dBm	-3
		3 to 12.75 GHz Bluetooth® Low Energy: -30 dBm	4
^1. With ideal TX.

Table 30. RF Bluetooth Low Energy power consumption for VDD = 3.3 V(1)

Symbol	Parameter	Typ	Unit
Itxmax	TX maximum output power consumption (SMPS Bypass)	12.7
	TX maximum output power consumption (SMPS On, VFBSMPS = 1.7 V)	7.8
	TX 0 dBm output power consumption (SMPS Bypass)	8.8
Itx0dbm	TX 0 dBm output power consumption (SMPS On, VFBSMPS = 1.4 V)	5.2	mA
	Rx consumption (SMPS Bypass)	7.9
Irxlo	Rx consumption (SMPS On, VFBSMPS = 1.4 V)	4.5
^1. Power consumption including RF subsystem and digital processing.

6.3.4 RF 802.15.4 characteristics

Table 31. RF transmitter 802.15.4 characteristics

Symbol	Parameter	Conditions	Min	Typ	Max	Unit
Fop	Frequency operating range	-	2405	-	2480
F xtal	Crystal frequency	-	-	32	-	MHz
∆F	Delta frequency	-	-	5	-
Roqpsk	On air data rate	-	-	250	-	kbps
PLLres	RF channel spacing	-	-	5	-	MHz

Symbol	Parameter	Conditions	Min	Typ	Max	Unit
Prf		SMPS Bypass or ON (VFBSMPS = 1.7 V and VDD > 1.95 V)	-	5.7	-
	Maximum output power(1)	SMPS Bypass (VDD > 1.71 V) or ON (VFBSMPS = 1.4 V and VDD > 1.95 V)	-	3.7	-	dBm
	0 dBm output power	-	-	0	-
	Minimum output power	-	-	-20	-
Pband	Output power variation over the band	Tx = 0 dBm - Typical	-0.5	-	0.4	dB
EVMrms	EVM rms	Pmax	-	8	-	%
Txpd	Transmit power density	f - fc > 3.5 MHz	-	-35	-	dB

Table 31. RF transmitter 802.15.4 characteristics (continued)

Symbol Parameter Conditions Typ Unit Prx_max Maximum input signal Min: -20 dBm and PER < 1% -10 dBm Rsens Sensitivity (SMPS Bypass) Max: -85 dBm and PER < 1% -100 Sensitivity (SMPS ON) -98 C/adj Adjacent channel rejection - 35 dB C/alt Alternate channel rejection - 46

Table 32. RF receiver 802.15.4 characteristics

^1. Measured in conducted mode, based on reference design (see AN5165), using output power specific external RF filter and impedance matching networks to interface with a 50 Ω antenna.

Figure 20. Typical energy detection (T = 27°C, VDD = 3.3 V)

Table 33. RF 802.15.4 power consumption for VDD = 3.3 V(1)

Symbol	Parameter	Typ	Unit
	TX maximum output power consumption (SMPS Bypass)	11.7
Itxmax	TX maximum output power consumption (SMPS On, VFBSMPS = 1.7 V)	6.5
	TX 0 dBm output power consumption (SMPS Bypass)	9.1	mA
Itx0dbm	TX 0 dBm output power consumption (SMPS On, VFBSMPS = 1.4 V)	4.5
	Rx consumption (SMPS Bypass)	9.2
Irxlo	Rx consumption (SMPS On)	4.5
^1. Power consumption including RF subsystem and digital processing.

6.3.5 Operating conditions at power-up / power-down

The parameters given in Table 34 are derived from tests performed under the ambient temperature condition summarized in Table 24.

Table 34. Operating conditions at power-up / power-down

Symbol	Parameter	Conditions	Min	Max	Unit
	VDD rise time rate		-	∞
tVDD	VDD fall time rate	-	10	∞
	VDDA rise time rate		0	∞
tVDDA	VDDA fall time rate	-	10	∞
	VDDUSB rise time rate		0	∞	µs/V
tVDDUSB	VDDUSB fall time rate	-	10	∞
	VDDRF rise time rate		-	∞
tVDDRF	VDDRF fall time rate	-	-	∞

6.3.6 Embedded reset and power control block characteristics

The parameters given in Table 35 are derived from tests performed under the ambient temperature conditions summarized in Table 24: General operating conditions.

Table 35. Embedded reset and power control block characteristics

Symbol	Parameter	Conditions(1)	Min	Typ	Max	Unit
tRSTTEMPO(2)	Reset temporization after BOR0 is detected	VDD rising	-	250	400	μs
VBOR0(2)		Rising edge	1.62	1.66	1.70
	Brown-out reset threshold 0	Falling edge	1.60	1.64	1.69
	Brown-out reset threshold 1	Rising edge	2.06	2.10	2.14
VBOR1		Falling edge	1.96	2.00	2.04
	Brown-out reset threshold 2	Rising edge	2.26	2.31	2.35
VBOR2		Falling edge	2.16	2.20	2.24
	Brown-out reset threshold 3		2.56	2.61	2.66
VBOR3		Falling edge	2.47	2.52	2.57	V
	Brown-out reset threshold 4	Rising edge	2.85	2.90	2.95
VBOR4		Falling edge	2.76	2.81	2.86
	Programmable voltage detector threshold 0	Rising edge	2.10	2.15	2.19
VPVD0		Falling edge	2.00	2.05	2.10
	PVD threshold 1	Rising edge	2.26	2.31	2.36
VPVD1		Falling edge	2.15	2.20	2.25
		Rising edge	2.41	2.46	2.51
	VPVD2 PVD threshold 2	Falling edge	2.31	2.36	2.41
Table 35. Embedded reset and power control block characteristics (continued)

Symbol	Parameter	Conditions(1)	Min	Typ	Max	Unit
		Rising edge	2.56	2.61	2.66
VPVD3	PVD threshold 3	Falling edge	2.47	2.52	2.57
		Rising edge	2.69	2.74	2.79
VPVD4	PVD threshold 4	Falling edge	2.59	2.64	2.69
		Rising edge	2.85	2.91	2.96	V
VPVD5	PVD threshold 5	Falling edge	2.75	2.81	2.86
		Rising edge	2.92	2.98	3.04
VPVD6	PVD threshold 6	Falling edge	2.84	2.90	2.96
		Hysteresis in continuous mode	-	20	-
Vhyst_BORH0	Hysteresis voltage of BORH0	Hysteresis in other mode	-	30	-	mV
Vhyst_BOR_PVD	Hysteresis voltage of BORH (except BORH0) and PVD	-	-	100	-
IDD (BOR_PVD)(2)	BOR(3) (except BOR0) and PVD consumption from VDD	-	-	1.1	1.6	µA
VPVM1	VDDUSB peripheral voltage monitoring	-	1.18	1.22	1.26
		Rising edge	1.61	1.65	1.69	V
VPVM3	VDDA peripheral voltage monitoring	Falling edge	1.6	1.64	1.68
Vhyst_PVM3	PVM3 hysteresis	-	-	10	-	mV
IDD (PVM1)(2)	PVM1 consumption from VDD	-	-	0.2	-
IDD (PVM3)(2)	PVM3 consumption from VDD	-	-	2	-	µA

^1. Continuous mode means Run/Sleep modes, or temperature sensor enabled in Low-power run/Low-power sleep modes.

^2.Guaranteed by design.

^3. BOR0 is enabled in all modes (except shutdown) and its consumption is therefore included in the supply current characteristics tables.

6.3.7 Embedded voltage reference

The parameters given in Table 36 are derived from tests performed under the ambient temperature and supply voltage conditions summarized in Table 24: General operating conditions.

Table 36. Embedded internal voltage reference

Symbol	Parameter	Conditions	Min	Typ	Max	Unit
VREFINT	Internal reference voltage	–40 °C < TA < +125 °C	1.182	1.212	1.232	V
(1) tS_vrefint	ADC sampling time when reading the internal reference voltage	-	4(2)	-	-	µs
tstart_vrefint	Start time of reference voltage buffer when ADC is enabled	-	-	8	12(2)
IDD(VREFINTBUF)	VREFINT buffer consumption from VDD when converted by ADC	-	-	12.5	20(2)	µA
∆VREFINT	Internal reference voltage spread over the temperature range	VDD = 3 V	-	5	7.5(2)	mV
TCoeff	Temperature coefficient	–40 °C < TA < +125 °C	-	30	50(2)	ppm/°C
ACoeff	Long term stability	1000 hours, T = 25 °C	-	300	1000(2)	ppm
VDDCoeff	Voltage coefficient	3.0 V < VDD < 3.6 V	-	250	1200(2)	ppm/V
VREFINT_DIV1	1/4 reference voltage		24	25	26
VREFINT_DIV2	1/2 reference voltage	-	49	50	51	% VREFINT
VREFINT_DIV3	3/4 reference voltage		74	75	76
^1. The shortest sampling time can be determined in the application by multiple iterations.

Guaranteed by design.

6.3.8 Supply current characteristics

The current consumption is a function of several parameters and factors such as the operating voltage, ambient temperature, I/O pin loading, device software configuration, operating frequencies, I/O pin switching rate, program location in memory and executed binary code.

The current consumption is measured as described in Figure 18: Current consumption measurement scheme.

Typical and maximum current consumption

The MCU is put under the following conditions:

All I/O pins are in analog input mode
All peripherals are disabled except when explicitly mentioned
The flash memory access time is adjusted with the minimum wait states number, depending on the fHCLK frequency (refer to the table "Number of wait states according to CPU clock (HCLK) frequency" available in the reference manual).
When the peripherals are enabled fPCLK = fHCLK
For flash memory and shared peripherals fPCLK = fHCLK = fHCLKS

The parameters given in Table 37 to Table 48 are derived from tests performed under ambient temperature and supply voltage conditions summarized in Table 24: General operating conditions.

Table 37. Current consumption in Run and Low-power run modes, code with data processing running from flash, ART enable (Cache ON Prefetch OFF), V_DD = 3.3 V

| 1 | | unning from flash, A | | 10 (04011 | | 0.0.0 | · · /, | י טטיי | |-------------------------|---------------------|--------------------------------------------------------------------------------------------------------------------------------------------------------|-----------------|-------------------|----------|-------|--------|--------|-------|--------------------|--------|------| | | | Conditi | ons | | | Ty | /p | | | Max ⁽¹⁾ | | Symbol | Parameter | - | Voltage scaling | f _HCLK | 25 °C | 55 °C | 85 °C | 105 °C | 25 °C | 85 °C | 105 °C | Unit | | | | | Danga 2 | 16 MHz | 1.90 | 1.90 | 2.00 | 2.20 | 2.40 | 2.52 | 2.96 | | | | £ £ | Range 2 | 2 MHz | 0.960 | 0.985 | 1.10 | 1.25 | 1.25 | 1.57 | 2.05 | | | Supply | f _HCLK = f _HSl16 up to
16 MHz included, | | 64 MHz | 8.15 | 8.25 | 8.40 | 8.60 | 9.30 | 9.60 | 10.02 | | J (D:::=) | | $\begin{array}{ll} \text{fy} & \text{f}{\text{HCLK}} = \text{f}{\text{HSE}} = 32 \text{ MHz} \ \text{f}_{\text{HSI16}} + \text{PLL ON} \end{array}$ | Range 1 | 32 MHz | 4.20 | 4.25 | 4.40 | 4.65 | 4.25 | 4.63 | 5.17 | | I _DD (Run) | current in Run mode | | | 16 MHz | 2.25 | 2.30 | 2.40 | 2.65 | 2.65 | 2.91 | 3.52 | | | | | | 64 MHz | 5.00 | 5.00 | 5.10 | 5.20 | - | - | - | | | | uisabieu | SMPS
Range 1 | 32 MHz | 3.15 | 3.15 | 3.25 | 3.35 | - | - | - | mA | | | | | i tango i | 16 MHz | 2.30 | 2.30 | 2.35 | 2.45 | - | - | - | | | Ounds | | 2 MHz | 0.335 | 0.360 | 0.470 | 0.670 | 0.480 | 0.910 | 1.47 | | / | Supply current in | f _HCLK = f _MSI | | 1 MHz | 0.170 | 0.210 | 0.325 | 0.520 | 0.270 | 0.730 | 1.31 | | I _DD (LPRun) | Low-power | All peripherals disabled | | 400 kHz | 0.0815 | 0.120 | 0.230 | 0.425 | 0.140 | 0.590 | 1.18 | | | run mode | 7 iii periprierale dicasica | | 100 kHz | 0.0415 | 0.076 | 0.190 | 0.385 | 0.070 | 0.550 | 1.14 | ^1. Guaranteed by characterization results, unless otherwise specified.

Table 38. Current consumption in Run and Low-power run modes, code with data processing running from SRAM1, $V_{DD}$ = 3.3 V

| | | Conditi | ons | | | Ty | /p | | | Max ⁽¹⁾ | |-------------------------|---------------------|-----------------------------------------------------------------------------------|-----------------|-------------------|-------|--------|-------|--------|-------|--------------------|--------|------| | Symbol | Parameter | - | Voltage scaling | f _HCLK | 25 °C | 55 °C | 85 °C | 105 °C | 25 °C | 85 °C | 105 °C | Unit | | | | | Range 2 | 16 MHz | 2.00 | 2.05 | 2.15 | 2.30 | 2.57 | 3.04 | 3.64 | | | | £ £ | Range 2 | 2 MHz | 0.970 | 1.00 | 1.10 | 1.25 | 1.62 | 1.90 | 2.55 | | | Supply $f{+}$ | f _HCLK = f _HSl16 up to
16 MHz included, | | 64 MHz | 8.80 | 8.90 | 9.00 | 9.20 | 10.50 | 10.80 | 11.30 | | L (Bup) | | pply $f_{HCLK} = f_{HSE} = 32 \text{ MHz}$
ent in $f_{HSI16} + PLL \text{ ON}$ | Range 1 | 32 MHz | 4.50 | 4.55 | 4.70 | 4.90 | 4.63 | 4.89 | 5.62 | | I _DD (Run) | current in Run mode | | | 16 MHz | 2.40 | 2.40 | 2.55 | 2.70 | 2.50 | 2.70 | 3.21 | | | | | | 64 MHz | 5.25 | 5.30 | 5.35 | 5.45 | - | - | - | mA | | | | disabled | SMPS
Range 1 | 32 MHz | 3.25 | 3.25 | 3.35 | 3.45 | - | - | - | IIIA | | | | | i tanige i | 16 MHz | 2.35 | 2.35 | 2.40 | 2.45 | - | - | - | | | Constr | | 2 MHz | 0.265 | 0.285 | 0.385 | 0.550 | 0.440 | 0.940 | 1.620 | | I (I DDun) | Supply current in | n f _HCLK = f _MSI
er All peripherals disabled | | 1 MHz | 0.135 | 0.170 | 0.270 | 0.430 | 0.290 | 0.760 | 1.480 | | I _DD (LPRun) | Low-power run mode | | | 400 kHz | 0.066 | 0.097 | 0.195 | 0.360 | 0.200 | 0.670 | 1.380 | | | Turrinode | | | 100 kHz | 0.031 | 0.0625 | 0.160 | 0.325 | 0.170 | 0.470 | 1.330 | ^1. Guaranteed by characterization results, unless otherwise specified.

Table 39. Typical current consumption in Run and Low-power run modes, with different codes running from flash, ART enable (Cache ON Prefetch OFF), VDD= 3.3 V

| | | |------------|------------------------------------| | Symbol | Parameter | - | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Supply current in | | IDD(Run) | Run mode | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | IDD(LPRun) | Supply current in
Low-power | | | | | | ^1. | Conditions | | TYP | | TYP | -----------------------------------------------------------------------------------------------|-----------------------------------------------------------------------|-----------------|-------|------|-------|--------| | Voltage
scaling | Code | 25 °C | Unit | 25 °C | Unit | | | Reduced code(1) | 1.90 | | 119 | | fHCLK = 16 MHz | Coremark | 1.85 | | 116 | | Range 2 | Dhrystone 2.1 | 1.85 | mA | 116 | µA/MHz | | | Fibonacci | 1.75 | | 109 | | | While(1) | 1.60 | | 100 | | | Reduced code(1) | 8.15 | | 127 | | fHCLK = 64 MHz | Coremark | 8.00 | | 125 | | Range 1 | Dhrystone 2.1 | 8.10 | mA | 127 | µA/MHz | | | Fibonacci | 7.60 | | 119 | | | While(1) | 6.85 | | 107 | | fHCLK = fHSI16 up to 16 MHz included, fHSI16 + PLL ON above 32 MHz
All peripherals disable | | Reduced code(1) | 5.00 | | 78 | | | Coremark | 4.95 | | 77 | | Range 1, SMPS On
fHCLK = 64 MHz | Dhrystone 2.1 | 4.95 | mA | 77 | µA/MHz | | | Fibonacci | 4.75 | | 74 | | | While(1) | 4.40 | | 69 | | | Reduced code(1) | 4.07 | | 64 | | | Coremark | 3.99 | | 62 | | Range 1, SMPS On
fHCLK = 64 MHz,
level = 0 dBm(2)
When RF Tx | Dhrystone 2.1 | 4.04 | mA | 63 | µA/MHz | | | Fibonacci | 3.79 | | 59 | | | While(1) | 3.42 | | 53 | | | Reduced code(1) | 320 | | 160 | | | Coremark | 350 | | 175 | run | fHCLK = fMSI = 2 MHz
All peripherals disable | | Dhrystone 2.1 | 350 | µA | 175 | µA/MHz | | | Fibonacci | 390 | | 195 | | | While(1) | 225 | | 113 | Reduced code used for characterization results provided in Table 37 and Table 38.

^2. Value computed. MCU consumption when RF TX and SMPS are ON.

Table 40. Typical current consumption in Run and Low-power run modes, with different codes running from SRAM1, VDD = 3.3 V

| | | | Conditions | | TYP | | TYP | |------------|------------------------------------|-----------------------------------------------------------------------------------------------|-----------------------------------------------------------------------|-----------------|-------|------|-------|--------| | Symbol | Parameter | - | Voltage
scaling | Code | 25 °C | Unit | 25 °C | Unit | | | | | | Reduced code(1) | 2.00 | | 125 | | | | | fHCLK = 16 MHz | Coremark | 1.75 | | 109 | | | | | Range 2 | Dhrystone 2.1 | 1.95 | mA | 122 | µA/MHz | | | | | | Fibonacci | 1.85 | | 116 | | | | | | While(1) | 1.85 | | 116 | | | | | | Reduced code(1) | 8.80 | | 138 | | | | | fHCLK = 64 MHz | Coremark | 7.50 | | 117 | | | | | Range 1 | Dhrystone 2.1 | 8.60 | mA | 134 | µA/MHz | | | | | | Fibonacci | 7.90 | | 123 | | | Supply current in | | | While(1) | 8.00 | | 125 | | IDD(Run) | Run mode | fHCLK = fHSI16 up to 16 MHz included, fHSI16 + PLL ON above 32 MHz
All peripherals disable | | Reduced code(1) | 5.25 | | 82 | | | | | | Coremark | 4.65 | | 73 | | | | | Range 1, SMPS On
fHCLK = 64 MHz | Dhrystone 2.1 | 5.15 | mA | 80 | µA/MHz | | | | | | Fibonacci | 4.85 | | 76 | | | | | | While(1) | 4.90 | | 77 | | | | | | Reduced code(1) | 4.39 | | 69 | | | | | | Coremark | 3.74 | | 58 | | | | | Range 1, SMPS On
fHCLK = 64 MHz,
level = 0 dBm(2)
When RF Tx | Dhrystone 2.1 | 4.29 | mA | 67 | µA/MHz | | | | | | Fibonacci | 3.94 | | 62 | | | | | | While(1) | 3.99 | | 62 | | | | | | Reduced code(1) | 255 | | 128 | | | | | | Coremark | 205 | | 103 | | IDD(LPRun) | Supply current in
Low-power run | fHCLK = fMSI = 2 MHz
All peripherals disable | | Dhrystone 2.1 | 250 | µA | 125 | µA/MHz | | | | | | Fibonacci | 230 | | 115 | | | | | | While(1) | 220 | | 110 | ^1. Reduced code used for characterization results provided in Table 37 and Table 38.

^2. Value computed. MCU consumption when RF TX and SMPS are ON.

Guaranteed by characterization results, unless otherwise specified.

Table 41. Current consumption in Sleep and Low-power sleep modes, flash memory ON

| | | Co
n | d
i
t
ion
s | | | T | Y
P | | | (
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M
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te
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me
r | - | Vo
l
tag
e
l
ing
sc
a | fHC
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5
°C | 5
5
°C | 8
5
°C | 1
0
5
°C | 2
5
°C | 8
5
°C | 1
0
5
°C | Un
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6
5 | 0.
8
6
5 | 1.
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0 | 1.
2
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6
M
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7
0 | 2.
8
0 | 3.
0
0 | 3.
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0 | 3.
3
3 | 3.
9
1 | | | Su
ly | fHC
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9
9
0 | 1.
2
0 | 0.
9
0
7 | 1.
0
4 | 2.
0
2 | | | | | | 6
4
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Hz | 2.
6
0 | 2.
6
0 | 2.
6
5 | 2.
7
5 | - | - | - | | | | S
S
M
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e | 3
2
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0 | 1.
9
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0 | 2.
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0 | - | - | - | A
m | | | | d
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le
d | | 1
6
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Hz | 1.
7
0 | 1.
7
0 | 1.
7
5 | 1.
8
0 | - | - | - | | | | | | 2
M
Hz | 0.
0
9
0 | 0.
1
2
5 | 0.
2
3
5 | 0.
4
3
0 | 0.
1
3
0 | 0.
6
0
0 | 1.
1
9 | | | Su
ly
p
p
in
t
cu
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l
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M
Hz | 0.
0
5
8 | 0.
0
9
3 | 0.
2
0
5 | 0.
4
0
0 | 0.
0
9
0 | 0.
5
7
0 | 1.
1
6 | | IDD
(
L
P
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p | low
-p
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er | | d | 4
0
0
k
Hz | 0.
0
4
4 | 0.
0
7
2
5 | 0.
1
8
5 | 0.
3
8
0 | 0.
0
7
0 | 0.
5
4
0 | 1.
1
1 | | | lee
de
s
p
mo | | | 1
0
0
k
Hz | 0.
0
3
1
5 | 0.
0
6
3
5 | 0.
0
1
7
5 | 0.
3
0
7 | 0.
0
5
5 | 0.
3
0
5 | 1.
1
3 | Table 42. Current consumption in Low-power sleep modes, flash memory in Power down

bo l	Pa te	Co d i t n	ion s		T	Y P			( 1) M A X		Un i t
Sy m	ra me r	-	fH CL K	2 5 °C	5 5 °C	8 5 °C	1 0 5 °C	2 5 °C	8 5 °C	1 0 5 °C
	Su ly p p	fHC fM =	2 M Hz	9 4. 0	1 1 5	2 0 0	3 3 5	1 3 5	6 1 0	1 2 0 1
IDD	t in cu rre n	LK SI	1 M Hz	5 6. 5	8 6. 0	1 7 0	3 0 5	9 4. 2	5 6 0	1 1 7 1	A
( S ) L P lee p	low -p ow er	A l l p ip he ls er ra	4 0 0 k Hz	4 0. 5	6 6. 5	1 5 0	2 8 5	6 8. 0	5 4 0	1 1 2 9	µ
	lee de s p mo	d isa b le d	1 0 0 k Hz	2 7. 5	5 7. 5	1 4 0	2 7 5	5 4. 6	5 3 9	1 1 3 1
^1. Guaranteed by characterization results, unless otherwise specified.

Table 43. Current consumption in Stop 2 mode

Ohl	D	Conditions	;			1	ΥP				M	4X ⁽¹⁾		Unit
Symbol	Parameter	-	$V_{DD}$	0 °C	25 °C	40 °C	55 °C	85 °C	105 °C	0 °C	25 °C	85 °C	105 °C	Unit
		100 15 1111	1.8 V	1.00	1.85	3.15	5.95	21.5	50.0	1.58	4.12	56.9	132.7
		LCD disabled Bluetooth Low	2.4 V	1.10	1.85	3.20	6.00	22.0	51.0	-	-	ı	-
	Supply current	Energy disabled	3.0 V	1.10	1.85	3.25	6.10	22.0	52.0	1.60	4.17	57.9	135.6
$I_{DD}$	in Stop 2		3.6 V	1.15	1.95	3.35	6.25	23.0	53.0	1.69	4.40	58.6	135.7
(Stop 2)	mode, RTC disabled	LCD enabled ⁽²⁾	1.8 V	1.20	2.00	3.35	6.10	22.0	50.5	1.76	4.30	57.1	133.3
	uisabieu	and clocked by LSI	2.4 V	1.20	2.00	3.40	6.20	22.0	51.0	-	-	-	-
		Bluetooth Low	3.0 V	1.25	2.10	3.45	6.30	22.5	52.0	1.85	4.41	58.1	135.8
		Energy disabled	3.6 V	1.30	2.15	3.60	6.55	23.0	53.5	1.97	4.66	59.4	136.6
		RTC clocked by LSI,	1.8 V	1.30	2.10	3.45	6.25	22.0	50.5	1.91	4.50	57.2	133.0
			2.4 V	1.45	2.25	3.55	6.40	22.5	51.5	-	-	-	-	μA
		LCD disabled	3.0 V	1.50	2.30	3.70	6.55	22.5	52.5	2.11	4.64	58.3	136.1	μ, .
	Supply current		3.6 V	1.75	2.50	3.95	6.85	23.5	53.5	2.26	5.12	59.7	136.9
$I_{DD}$	in Stop 2	DTO alsolved	1.8 V	1.35	2.20	3.55	6.30	22.0	50.5	1.99	4.57	57.4	133.8
(Stop 2	mode, RTC enabled,	RTC clocked by LSI,	2.4 V	1.50	2.35	3.65	6.50	22.5	51.5	-	-	ı	-
with	Bluetooth Low	LCD enabled ⁽²⁾	3.0 V	1.70	2.45	3.85	6.65	23.0	52.5	2.17	4.87	58.4	136.3
RTC)	Energy		3.6 V	1.80	2.60	4.05	6.95	23.5	54.0	2.41	5.11	59.9	137.1
	disabled	RTC clocked by	1.8 V	1.35	2.20	3.50	6.25	22.0	50.5	1.91	4.29	57.1	133.5
		LSE quartz ⁽³⁾	2.4 V	1.45	2.25	3.65	6.40	22.5	51.5	-	_	_	-
		in low drive	3.0 V	1.55	2.45	3.80	6.65	23.0	52.5	2.01	4.31	58.0	135.9
		mode	3.6 V	1.70	2.55	4.05	6.95	23.5	54.0	2.16	4.40	81.6	137.0

Table 43. Current consumption in Stop 2 mode (continued)

| | | Co
d
i
t
ion
n
s | | | | T | Y
P | | | | M | (
1)
A
X | |--------------------------------------------------------------|-------------------------------------------------------------------------------------------------------------------------|-------------------------------------------------------------------------------------------------------------------------------------------------------|--------------|---------|--------------|--------------|--------------|--------------|-------------------|---------|--------------|-------------------|-------------------|--------------| | Sy
bo
l
m | Pa
ter
ra
me | - | VD
D | 0
°C | 2
5
°C | 4
0
°C | 5
5
°C | 8
5
°C | 1
0
5
°C | 0
°C | 2
5
°C | 8
5
°C | 1
0
5
°C | Un
i
t | | | Su
ly
t
p
p
cu
rre
n
du
ing
r
ke
fro
wa
up
m
S
top
2 m
de
o | Wa
ke
loc
k
is
up
c
H
S
I
1
6,
l
tag
vo
e
(
4).
Ra
2.
Se
ng
e
e | 3.
0
V | - | 3
8
9 | - | - | - | - | - | - | - | - | | IDD
(
ke
wa
up
fro
m
S
)
top
2 | | Wa
ke
loc
k
is
up
c
M
S
I =
3
2
M
Hz
,
l
tag
vo
e
(
4).
Ra
1.
Se
ng
e
e | 3.
0
V | - | 3
2
0 | - | - | - | - | - | - | - | - | A
µ | | | by
de
p
as
s m
o | Wa
ke
loc
k
is
up
c
M
S
I =
4
M
Hz
,
l
tag
vo
e
(
4).
Ra
2.
Se
ng
e
e | 3.
0
V | - | 5
2
8 | - | - | - | - | - | - | - | - | ^1. Guaranteed based on test during characterization, unless otherwise specified.

^2. LCD enabled with external voltage source. Consumption from VLCD excluded. Refer to LCD controller characteristics for IVLCD

^3. Based on characterization done with a 32.768 kHz crystal (MC306-G-06Q-32.768, manufacturer JFVNY) with two 6.8 pF loading capacitors.

^4. Wakeup with code execution from flash memory. Average value given for a typical wakeup time as specified in Table 51: Low-power mode wakeup timings.

Table 44. Current consumption in Stop 1 mode

Cumahad	Downston	Conditions				T	ΥP	-			M	AX ⁽¹⁾		Unit
Symbol	Parameter	-	$V_{DD}$	0 °C	25 °C	40 °C	55 °C	85 °C	105 °C	0 °C	25 °C	85 °C	105 °C	Unit
		Divistantly	1.8 V	5.05	9.20	15.5	28.0	96.0	210	7.00	28.4	343.7	738.6
		Bluetooth Low Energy disabled	2.4 V	5.10	9.25	15.5	28.5	96.5	215	-	-	1	-
	Supply	LCD disabled	3.0 V	5.15	9.30	15.5	28.5	97.0	215	7.07	28.5	346.8	746.0
$I_{DD}$	current in Stop 1 mode,		3.6 V	5.25	9.45	16.0	29.0	97.5	215	7.30	28.8	351.0	749.4
(Stop 1)	RTC	Bluetooth Low	1.8 V	5.05	9.30	15.5	28.5	96.0	210	7.10	28.7	344.4	739.0
	disabled	Energy disabled	2.4 V	5.10	9.35	16.0	28.5	96.5	215	-	-	-	-
		LCD enabled ⁽²⁾ ,	3.0 V	5.20	9.65	16.0	28.5	97.0	215	7.26	29.6	345.0	747.0
		clocked by LSI	3.6 V	5.55	9.85	16.0	29.0	98.5	215	7.62	29.8	349.0	750.8
			1.8 V	5.30	9.35	16.0	28.5	96.5	215	7.30	29.5	343.7	739.2
		RTC clocked by LSI	2.4 V	5.40	9.45	16.0	28.5	97.0	215	-	-	-	-	μA
		LCD disabled	3.0 V	5.70	9.55	16.5	29.0	98.5	220	7.69	29.7	347.2	746.1	μΛ
	Supply current in		3.6 V	5.85	10.0	16.5	29.5	96.5	215	8.08	29.8	349.9	751.1
$I_{DD}$	Stop 1 mode,		1.8 V	5.25	9.60	16.0	28.5	96.5	215	7.10	29.0	344.3	739.9
(Stop 1	RTC	RTC clocked by LSI	2.4 V	5.30	9.75	16.0	29.0	97.0	215	-	-	-	-
with	enabled,	LCD enabled ⁽²⁾	3.0 V	5.85	9.80	16.5	29.0	97.5	215	7.53	29.8	347.4	746.2
RTC)	Bluetooth Low Energy		3.6 V	5.90	10.5	16.5	29.0	98.5	220	8.18	29.9	350.6	751.8
	disabled	DT0 1 1 1	1.8 V	5.35	9.55	16.0	28.5	96.5	215	6.00	28.7	343.9	738.7
		RTC clocked by	2.4 V	5.40	9.70	16.0	29.0	96.5	215	-	-	-	-
		I I SE quartz ⁽³⁾ in ∟	3.0 V	5.75	9.70	16.0	29.0	97.5	215	7.40	28.9	346.6	743.8
			3.6 V	5.90	10.0	16.5	29.5	99.0	220	7.58	29.2	349.0	749.9

Table 44. Current consumption in Stop 1 mode (continued)

| | | Co
d
i
t
ion
n
s | | | | T | Y
P | | | | M | (
1)
A
X | |--------------------------------------------------------------|--------------------------------------------------------------------------------------|-------------------------------------------------------------------------------------------------------------------------------------------------|--------------|---------|--------------|--------------|--------------|--------------|-------------------|---------|--------------|-------------------|-------------------|--------------| | Sy
bo
l
m | Pa
te
ra
me
r | - | VD
D | 0
°C | 2
5
°C | 4
0
°C | 5
5
°C | 8
5
°C | 1
0
5
°C | 0
°C | 2
5
°C | 8
5
°C | 1
0
5
°C | Un
i
t | | | Su
ly
p
p | Wa
ke
loc
k
up
c
H
S
I
1
6,
l
Ra
2.
tag
vo
e
ng
e
(
4).
Se
e | 3.
0
V | - | 1
2
9 | - | - | - | - | - | - | - | - | | IDD
(
ke
wa
up
fro
m
S
1
)
top | t
cu
rre
n
du
ing
r
ke
fro
wa
up
m
S
1
top | Wa
ke
loc
k
up
c
M
S
I =
3
2
M
Hz
,
l
tag
Ra
1.
vo
e
ng
e
(
4).
Se
e | 3.
0
V | - | 1
2
4 | - | - | - | - | - | - | - | - | A
µ | | | by
de
p
as
s m
o | Wa
ke
loc
k
up
c
M
S
I =
4
M
Hz
,
l
Ra
2.
tag
vo
e
ng
e
(
4).
Se
e | 3.
0
V | - | 2
0
7 | - | - | - | - | - | - | - | - |

1. Guaranteed based on test during characterization, unless otherwise specified.
1. LCD enabled with external voltage source. Consumption from VLCD excluded. Refer to LCD controller characteristics for IVLCD
1. Based on characterization done with a 32.768 kHz crystal (MC306-G-06Q-32.768, manufacturer JFVNY) with two 6.8 pF loading capacitors.
1. Wakeup with code execution from flash. Average value given for a typical wakeup time as specified in Table 51: Low-power mode wakeup timings.

Table 45. Current consumption in Stop 0 mode

Symbol	Parameter	Conditions	i			7	ΥP	-			MA	AX ⁽¹⁾		Unit
Symbol	Parameter	-	V _DD	0 °C	25 °C	40 °C	55 °C	85 °C	105 °C	0 °C	25 °C	85 °C	105 °C	Ullit
	Supply current in Stop 0 mode, RTC disabled,		1.8 V 2.4 V		100 105	110 110	120 125	195 195	315 315	110.0	114.2	458.1	874.8
	Bluetooth Low Energy		3.0 V		105	110	125	195	320	117.3	134.3	461.8	880.0
	disabled, LCD disabled		3.6 V	100	105	115	125	200	320	165.0	135.7	494.0	884.1
I _DD (Stop 0)		Wakeup clock HSI16, voltage Range 2. See ⁽²⁾ .	3.0 V	-	331	-	-	-	-	-	-	-	-	μA
	Supply current during wakeup from Stop 0 Bypass mode	Wakeup clock is MSI = 32 MHz, voltage Range 1. See ⁽²⁾ .	3.0 V	-	349	-	-	-	-	-	-	-	-
		Wakeup clock is MSI = 4 MHz, voltage Range 2. See ⁽²⁾ .	3.0 V	-	196	-	-	-	-	-	-	-	-
^1. Guaranteed by characterization results, unless otherwise specified.

^2. Wakeup with code execution from flash memory. Average value given for a typical wakeup time as specified in Table 51: Low-power mode wakeup timings.

Table 46. Current consumption in Standby mode

bo l	Pa te	Co d i t ion n	s			T	Y P				M A	( 1) X		Un i t
Sy m	ra me r	-	VD D	°C 0	°C 2 5	°C 4 0	°C 5 5	°C 8 5	°C 1 0 5	°C 0	°C 2 5	°C 8 5	°C 1 0 5
		B lue too t h Lo w	1. 8 V	0. 2 7 0	0. 3 2 0	0. 5 1 5	0. 9 2 0	3. 4 5	8. 2 0	0. 3 0 0	0. 8 2 8	7. 8 5 0	1 9. 3 0 0
	Su ly t p p cu rre n	En d isa b le d erg y	2. 4 V	0. 2 7 0	0. 3 5 0	0. 5 4 0	0. 9 5 5	3. 5 0	8. 8 0	-	-	-	-
	S in tan d by	No in de de t p en n	3. 0 V	0. 2 7 0	0. 3 7 0	0. 5 7 5	1. 0 0	3. 8 5	9. 5 0	0. 3 8 0	0. 9 4 5	8. 5 0 5	2 1. 2 0 0
IDD	de ( ba ku mo c p is ter d	h do tc wa g	3. 6 V	0. 3 0 0	0. 4 1 0	0. 6 4 5	1. 1 5	4. 2 0	1 0. 5 0	0. 4 0 0	1. 0 4 0	8. 9 8 0	2 2. 4 0 0
( S ) tan d by	reg s a n S R A M 2a	B lue too t h Lo w	1. 8 V	0. 2 6 5	0. 5 2 5	0. 7 1 0	1. 1 0	3. 9 0	8. 4 0	0. 5 2 0	1. 0 9 5	8. 0 4 1	1 9. 5 0 0
	), ta ine d re	En d isa b le d erg y W i t h	2. 4 V	0. 2 8 0	0. 5 9 5	0. 7 9 0	1. 2 0	4. 0 0	9. 0 5	-	-	-	-
R T C d	isa b le d	in de de t p en n	3. 0 V	0. 2 9 0	0. 6 7 0	0. 8 5 5	1. 3 5	4. 1 5	9. 8 0	0. 7 3 0	1. 2 5 3	8. 7 7 4	2 1. 4 0 0
		tc h do wa g	3. 6 V	0. 2 9 5	0. 7 7 0	0. 9 9 0	1. 0 5	4. 6 0	1 1. 0 0	0. 8 1 5	1. 3 6 5	9. 3 6 0	2 2. 8 4 0
		R T C c loc ke d by	1. 8 V	0. 5 0 0	0. 6 0 0	0. 7 8 0	1. 2 0	3. 7 0	8. 4 5	0. 6 8 0	1. 1 6 5	8. 1 4 3	1 9. 6 6 0
		S L I, n o	2. 4 V	0. 6 3 0	0. 0 7 5	0. 9 1 0	1. 3 0	3. 8 0	9. 1 0	-	-	-	-
	Su ly t p p cu rre n	in de de t p en n	3. 0 V	0. 2 7 5	0. 8 2 5	1. 0 0 5	1. 0 5	3. 9 5	9. 9 0	0. 9 3 0	1. 4 6 3	8. 9 7 7	2 1. 4 4 0	A µ
	in S d by tan	tc h do wa g	3. 6 V	0. 8 6 0	0. 9 0 7	1. 2 0 0	1. 0 7	2 4. 5	1 1. 0 0	1. 0 0 5	1. 6 2 8	9. 6 3 4	2 3. 0 8 0
	de ( ba ku mo c p is d ter s a n	R T C c loc ke d by	1. 8 V	0. 6 5 5	0. 6 5 5	0. 8 3 0	1. 2 5	3. 7 5	8. 5 5	0. 3 4 7	1. 1 9 6	8. 1 8 7	1 9. 1 0 7
IDD	reg S R A M 2a	L S I, w i t h	2. 4 V	0. 6 3 5	0. 7 9 0	0. 9 7 5	1. 4 0	4. 1 0	9. 2 0	-	-	-	-
( S tan d by i t h w C ) R T	ine d ), ta re	in de de t p en n	3. 0 V	0. 7 2 5	0. 9 1 5	1. 1 0 0	1. 5 5	4. 5 0	1 0. 0 0	1. 0 2 8	1. 5 7 3	9. 0 7 2	2 1. 8 1 0
	R T C b le d en a B lue h Lo too t w	tc h do wa g	3. 6 V	0. 8 7 0	1. 0 5 0	1. 3 0 0	1. 8 0	4. 9 0	1 1. 0 0	1. 1 4 4	1. 7 2 3	9. 7 3 0	2 3. 2 0 0
	En erg y		1. 8 V	0. 5 2 5	0. 6 2 5	0. 8 4 0	1. 2 5	3. 7 5	8. 6 0	0. 6 0 0	1. 0 6 1	8. 0 2 9	1 9. 6 1 0
	d isa b le d	R T C c loc ke d by ( 2)	2. 4 V	0. 6 6 5	0. 7 5 5	0. 9 6 0	1. 3 5	4. 0 5	9. 2 5	-	-	-	-
		L S E q in tz ua r low dr ive de m o	3. 0 V	0. 7 7 5	0. 8 8 0	1. 1 0 0	1. 5 5	4. 4 0	1 0. 0 0	0. 6 0 0	1. 1 0 0	8. 7 1 9	2 1. 5 7 0
			3. 6 V	0. 9 3 5	1. 0 5 0	1. 3 0 0	1. 8 0	5. 0 0	1 1. 0 0	0. 7 5 0	1. 1 7 1	9. 4 6 0	2 3. 0 3 0
Table 46. Current consumption in Standby mode (continued)

| | | rabio ioi oai | | | • | |---------------------------------------------|---------------------------------------------------------|------------------------------------------------------------|----------|-------|-------|-------|-------|-------|--------|------|-------|------------------|--------|------| | Symbol | Parameter | Conditions | 3 | | | T | ΥP | | | | MA | X ⁽¹⁾ | | Unit | | Symbol | raiailletei | - | $V_{DD}$ | 0 °C | 25 °C | 40 °C | 55 °C | 85 °C | 105 °C | 0 °C | 25 °C | 85 °C | 105 °C | | | Supply current to be | | 1.8 V | 0.160 | 0.210 | 0.380 | 0.660 | 2.30 | 5.15 | - | - | - | ı | | I _DD
(SRAM2a) ⁽³⁾ | subtracted in
Standby | _ | 2.4 V | 0.165 | 0.245 | 0.375 | 0.650 | 2.15 | 5.20 | - | - | - | - | μA | | | mode when
SRAM2a is | | 3.0 V | 0.155 | 0.250 | 0.385 | 0.630 | 2.25 | 5.20 | - | - | - | ı | μ, τ | | | not retained | | 3.6 V | 0.155 | 0.235 | 0.375 | 0.670 | 2.20 | 5.20 | - | ı | - | i | | I _DD
(wakeup from
Standby) | Supply current
during
wakeup from
Standby mode | Wakeup clock is
HSI16. See ⁽⁴⁾ .
SMPS OFF | 3.0 V | - | 1.73 | - | - | - | - | - | - | - | - | mA |

^1. Guaranteed by characterization results, unless otherwise specified.

^2. Based on characterization done with a 32.768 kHz crystal (MC306-G-06Q-32.768, manufacturer JFVNY) with two 6.8 pF loading capacitors.

^3. The supply current in Standby with SRAM2a mode is: $I_{DD}(Standby) + I_{DD}(SRAM2a)$ . The supply current in Standby with RTC with SRAM2a mode is: $I_{DD}(Standby + RTC) + I_{DD}(SRAM2a)$ .

^4. Wakeup with code execution from flash memory. Average value given for a typical wakeup time as specified in Table 51.

Table 47. Current consumption in Shutdown mode

| | | Co
d
i
t
ion
n | s | | | T | Y
P | | | | M | (
1)
A
X | |-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------|---------------------------------------------|---------------------------------------------------------------------|--------------|-------------------|-------------------|-------------------|-------------------|-------------------|-------------------|---------|-------------------|-------------------|-------------------|--------------| | Sy
bo
l
m | Pa
te
ra
me
r | - | VD
D | 0
°C | 2
°C
5 | 4
0
°C | °C
5
5 | 8
°C
5 | 1
0
°C
5 | 0
°C | 2
°C
5 | 8
°C
5 | 1
0
°C
5 | Un
i
t | | | Su
ly
nt
in
p
p
cu
rre | | 1.
8
V | 0.
0
3
9 | 0.
0
1
3 | 0.
0
3
0 | 0.
1
0
0 | 0.
6
3
5 | 1.
9
0
5 | - | - | 2.
0
9
9 | 6.
2
0
0 | | S
hu
do
t
wn
m
o
IDD
(
ba
ku
c
p
(
S
hu
t
do
)
is
ter
wn
reg
s
)
ta
ine
d
R
T
re
d
isa
b
le
d
Su
ly
p
p
cu
rre
S
hu
t
do
wn
m
o
IDD
(
ba
ku
c
p
(
S
hu
do
t
wn
is
ter
reg
s
it
h
R
T
C
)
w
ta
ine
d
)
R
T
re
b
le
d
en
a | de | | 2.
4
V | 0.
0
5
9 | 0.
0
1
4 | 0.
0
5
5 | 0.
1
2
0 | 0.
7
8
5 | 2.
3
5
0 | - | - | - | - | | | C | - | 3.
0
V | 0.
0
6
4 | 0.
0
3
7 | 0.
0
7
0 | 0.
1
8
0 | 1.
0
0
0 | 2.
9
0
0 | - | 0.
1
8
5 | 2.
6
7
0 | 7.
4
9
0 | | | | | 3.
6
V | 0.
0
1
7 | 0.
0
9
3 | 0.
1
4
0 | 0.
2
8
0 | 1.
3
0
0 | 3.
0
0
7 | - | 0.
2
4
7 | 3.
1
2
0 | 8.
4
0
5 | | | in
nt | | 1.
8
V | 0.
3
2
0 | 0.
3
1
5 | 0.
3
5
5 | 0.
4
2
0 | 0.
9
8
5 | 2.
3
0
0 | - | 0.
5
7
2 | 2.
7
0
2 | 6.
1
8
0 | A
µ | | | de | R
T
C
loc
ke
d
c
by
L
S
E | 2.
4
V | 0.
4
2
5 | 0.
4
0
5 | 0.
4
6
0 | 0.
5
4
0 | 1.
2
0
0 | 2.
8
0
0 | - | - | - | - | | | C | (
2)
rtz
in
low
q
ua
dr
ive
de
m
o | 3.
0
V | 0.
5
3
5 | 0.
5
3
5 | 0.
5
9
5 | 0.
7
0
0 | 1.
5
0
0 | 3.
4
5
0 | - | 0.
6
6
4 | 2.
9
9
0 | 7.
8
0
0 | | | | | 3.
6
V | 0.
6
9
5 | 0.
7
2
0 | 0.
7
9
0 | 0.
9
4
0 | 2.
0
0
0 | 4.
3
5
0 | - | 0.
7
9
0 | 3.
7
3
0 | 9.
1
4
0 |

1. Guaranteed by characterization results, unless otherwise specified.
1. Based on characterization done with a 32.768 kHz crystal (MC306-G-06Q-32.768, manufacturer JFVNY) with two 6.8 pF loading capacitors.

Table 48. Current consumption in VBAT mode

Sy bo l m	Pa ter ra me	Co d i t ion n	s			T	Y P					M	( 1) A X			Un i t
		-	VB AT	0 °C	2 °C 5	4 0 °C	°C 5 5	8 °C 5	1 0 °C 5	0 °C	2 °C 5	4 0 °C	°C 5 5	8 °C 5	1 0 °C 5
			1. 8 V	1. 0 0	2. 0 0	4. 0 0	1 0. 0	5 2. 0	1 4 5	-	-	-	-	-	-
		C R T d isa b le d	2. 4 V	1. 0 0	2. 0 0	5. 0 0	1 2. 0	6 0. 0	1 6 5	-	-	-	-	-	-
	Ba ku c p		3. 0 V	2. 0 0	4. 0 0	7. 0 0	1 6. 0	7 5. 0	2 2 5	-	-	-	-	-	-
V B A T	do in ma		3. 6 V	7. 0 0	1 5. 0	2 3. 0	4 2. 0	1 7 0	4 5 0	-	-	-	-	-	-	A
( ) IDD	ly su p p	R T C b le d en a	1. 8 V	2 9 5	3 0 5	3 1 5	3 2 5	3 8 0	4 8 0	-	-	-	-	-	-	n
	t cu rre n	d c loc ke d an	2. 4 V	3 8 5	3 9 5	4 0 0	4 1 5	4 7 5	5 9 5	-	-	-	-	-	-
		by L S E ( 2)	3. 0 V	4 9 5	5 0 5	5 1 5	5 3 0	6 0 0	7 6 5	-	-	-	-	-	-
		tz q ua r	3. 6 V	6 3 0	6 4 5	6 6 0	6 8 5	8 3 0	1 1 5 0	-	-	-	-	-	-

1. Guaranteed by characterization results, unless otherwise specified.
2. Based on characterization done with a 32.768 kHz crystal (MC306-G-06Q-32.768, manufacturer JFVNY) with two 6.8 pF loading capacitors.

Table 49. Current under Reset condition

Symbol	Conditions			TY	/P					MA	X ⁽¹⁾			Unit
- Cymbol	Conditions	0 °C	25 °C	40 °C	55 °C	85 °C	105 °C	0 °C	25 °C	40 °C	55 °C	85 °C	105 °C	Onne
lan (not)	1.8 V	-	410	-	-	-	-	-	-	-	-	-	-
	2.4 V	-	-	-	-	-	-	-	-	-	-	-	-	μA
IDD(RST)	3.0 V	-	550	-	-	-	-	-	750	-	-	-	-	μΑ
	3.6 V	ı	750	-	ı	ı	-	-	-	ı	Ī	Ī	-
^1. Guaranteed by characterization results, unless otherwise specified.

I/O system current consumption

The current consumption of the I/O system has two components: static and dynamic.

I/O static current consumption

All the I/Os used as inputs with pull resistors generate current consumption when the pin is externally held to the opposite level. The value of this current can be computed using the pull-up/pull-down resistors values given in Table 72: I/O static characteristics.

For the output pins, all internal or external pull-up/pull-down loads must be considered to estimate the current consumption.

The additional current consumption is due to I/Os configured as inputs if an intermediate voltage level is externally applied. This current consumption is caused by the input Schmitt trigger circuits used to discriminate the input value. Unless this specific configuration is required by the application, this consumption can be avoided by configuring these I/Os in analog mode. This is the case of ADC input pins, which should be configured as analog inputs.

Caution: Any floating input pin can also settle to an intermediate voltage level or switch inadvertently, as a result of external electromagnetic noise. To avoid current consumption related to floating pins, they must either be configured in analog mode, or forced internally to a definite digital value. This can be done either by using pull-up/down resistors or by configuring the pins in output mode.

I/O dynamic current consumption

In addition to the internal peripheral current consumption measured previously (see Table 50) the I/Os used by the application also contribute to the current consumption.

When an I/O pin switches, it uses the current from the I/O supply voltage to supply its circuitry, and to charge/discharge the capacitive load (internal and external) connected to the pin:

$$I_{SW} = V_{DD} \times f_{SW} \times C$$

ISW is the current sunk by a switching I/O to charge/discharge the capacitive load
VDD is the I/O supply voltage
fSW is the I/O switching frequency
C is the total capacitance seen by the I/O pin: C = CIO + CEXT
CIO is the I/O pin capacitance
CEXT is the PCB board capacitance plus any connected external device pin capacitance.

The test pin is configured in push-pull output mode and is toggled by software at a fixed frequency.

On-chip peripheral current consumption

The current consumption of the on-chip peripherals is given in Table 50. The MCU is placed under the following conditions:

All I/O pins are in Analog mode
The given value is calculated by measuring the difference of the current consumptions:
- when the peripheral is clocked on
- when the peripheral is clocked off
Ambient operating temperature and supply voltage conditions summarized in Table 20: Voltage characteristics
The power consumption of the digital part of the on-chip peripherals is given in Table 50. The power consumption of the analog part of the peripherals (where applicable) is indicated in each related section of the datasheet.

Table 50. Peripheral current consumption

	Peripheral	Range 1	Range 2	Low-power run and sleep	Unit
	Bus matrix(1)	2.40	2.00	1.80
	TSC	1.25	1.05	1.05
	CRC	0.465	0.375	0.380
AHB1	DMA1	1.90	1.55	1.80
	DMA2	2.00	1.65	1.80
	DMAMUX	4.15	3.40	4.45
	All AHB1 peripherals	12.0	10.0	11.5
	AES1	4.00	3.30	3.90
AHB2(2)	ADC1 independent clock domain	2.55	2.10	2.10
	ADC1 clock domain	2.25	1.90	1.90	µA/MHz
	All AHB2 peripherals	7.45	6.20	6.60
AHB3	QSPI	7.60	6.25	7.10
	TRNG independent clock domain	3.80	N/A	N/A
	TRNG clock domain	2.00	N/A	N/A
	SRAM2	1.70	1.35	1.35
AHB Shared	FLASH	8.35	6.90	8.45
	AES2	6.95	5.75	7.00
	PKA	4.40	3.65	4.25
	All AHB shared peripherals	17.5	14.5	16.0
Table 50. Peripheral current consumption (continued)

	Peripheral	Range 1	Range 2	Low-power run and sleep	Unit
	RTCA	1.10	0.88	1.25
	CRS	0.24	0.20	0.20
	USB FS independent clock domain	3.20	N/A	N/A
	USB FS clock domain	2.05	N/A	N/A
	I2C1 independent clock domain	2.50	4.40	4.40
	I2C1 clock domain	4.80	4.00	5.50
	I2C3 independent clock domain	2.10	3.50	3.55
	I2C3 clock domain	3.70	3.10	3.55
	LCD	1.35	1.10	2.10
APB1	SPI2	1.65	1.40	2.25
	LPTIM1 independent clock domain	2.10	3.40	3.00
	LPTIM1 clock domain	3.60	3.00	3.80
	TIM2	5.65	4.70	4.90
	LPUART1 independent clock domain	2.70	4.15	3.85
	LPUART1 clock domain	4.45	3.70	5.25
	LPTIM2 clock domain	3.95	3.25	4.50	µA/MHz
	LPTIM2 independent clock domain	2.20	3.70	3.80
	WWDG	0.335	0.285	0.965
	All APB1 peripherals	27.0	22.5	25.5
	AHB to APB2(3)	1.10	0.885	1.35
	TIM1	8.20	6.80	7.25
	TIM17	2.85	2.40	2.40
	TIM16	2.75	2.30	2.55
	USART1 independent clock domain	4.40	7.80	7.00
APB2	USART1 clock domain	8.80	7.30	7.75
	SPI1	1.75	1.45	1.45
	SAI1 independent clock domain	2.50	1.50	3.50
	SAI1 clock domain	2.40	N/A	N/A
	All APB2 on	28.0	23.0	25.5
	ALL	97.5	80.5	90.0
^1. The BusMatrix is automatically active when at least one master is ON (CPU, DMA).

^2. GPIOs consumption during read and write accesses.

^3. The AHB to APB2 bridge is automatically active when at least one peripheral is ON on the APB2.

Thermal Information

The maximum chip junction temperature (TJmax) must never exceed the values given in Table 24: General operating conditions.

The maximum chip-junction temperature, TJ max, in degrees Celsius, can be calculated using the equation:

$$T_J \max = T_A \max + (P_D \max x \Theta_{JA})$$

where:

TA max is the maximum ambient temperature in °C,
ΘJA is the package junction-to-ambient thermal resistance, in °C / W,
PD max is the sum of PINT max and PI/O max (PD max = PINT max + PI/O max),
PINT max is the product of IDD and VDD, expressed in Watt. This is the maximum chip internal power.

PI/O max represents the maximum power dissipation on output pins:

• PI/O max = Σ (VOL × IOL) + Σ ((VDD – VOH) × IOH)

taking into account the actual VOL / IOL and VOH / IOH of the I/Os at low and high level in the application.

Note: When the SMPS is used, a portion of the power consumption is dissipated into the external inductor, therefore reducing the chip power dissipation. This portion depends mainly on the inductor ESR characteristics.

Note: As the radiated RF power is quite low (< 4 mW), it is not necessary to remove it from the chip power consumption.

Table 106. Package thermal characteristics

Symbol	Parameter	Value	Unit
	Thermal resistance junction-ambient UFQFPN48 - 7 mm x 7 mm	24.9
	Thermal resistance junction-ambient VFQFPN68 - 8 mm x 8 mm	47.0
ΘJA	Thermal resistance junction-ambient WLCSP100 - 0.4 mm pitch	35.8	°C/W
	Thermal resistance junction-ambient UFBGA129 - 0.5 mm pitch	41.5
	Thermal resistance junction-board UFQFPN48 - 7 mm x 7 mm	13.0
	Thermal resistance junction-board VFQFPN68 - 8 mm x 8 mm	36.1
ΘJB	Thermal resistance junction-board WLCSP100 - 0.4 mm pitch	N/A	°C/W
	Thermal resistance junction-board UFBGA129 - 0.5 mm pitch	16.2

Symbol	Parameter	Value	Unit
	Thermal resistance junction-case UFQFPN48 - 7 mm x 7 mm	1.3
	Thermal resistance junction-case VFQFPN68 - 8 mm x 8 mm	13.7	°C/W
Θ _JC	Thermal resistance junction-case WLCSP100 - 0.4 mm pitch	N/A	C/VV
	Thermal resistance junction-case UFBGA129 - 0.5 mm pitch	34.9
Table 106. Package thermal characteristics (continued)

7.6.1 Reference document

JESD51-2 Integrated Circuits Thermal Test Method Environment Conditions - Natural Convection (Still Air). Available from www.jedec.org

STM32WB55CGU6