STM32U595ZJTxQ

Part: STM32U59xxx — STMicroelectronics

Type: Ultra-low-power Arm® Cortex®-M33 32-bit MCU

Description: Ultra-low-power Arm® Cortex®-M33 32-bit MCU with TrustZone® and FPU, operating at up to 160 MHz (240 DMIPS), featuring up to 4 MB Flash, 2.5 MB SRAM, LTDC, and MIPI® DSI.

Operating Conditions:

• Supply voltage: 1.71 V to 3.6 V
• Operating temperature: -40 °C to +85/125 °C
• Max CPU frequency: 160 MHz

Absolute Maximum Ratings:

• Max supply voltage: 4.0 V (VDD, VDDA, VDDIO2, VDDUSB, VDDSDMMC, VDDQ)
• Max junction/storage temperature: 150 °C (Tj), 150 °C (Tstg)

Key Specs:

• Core: Arm® 32-bit Cortex®-M33 CPU with TrustZone®, MPU, DSP, and FPU
• Max CPU frequency: 160 MHz, 240 DMIPS
• Flash memory: Up to 4 Mbyte with ECC, 2 banks read-while-write
• SRAM: Up to 2.5 Mbyte (2514 Kbyte with SRAM3 ECC off)
• Run mode current: 18.5 μA/MHz at 3.3 V
• Stop 3 mode current: 8.2 μA with 2.5-Mbyte SRAM
• ADC: 2x 14-bit ADC 2.5-Msps, 1x 12-bit ADC 2.5-Msps
• I/Os: Up to 156 fast I/Os, most 5V-tolerant

Features:

• Ultra-low-power with FlexPowerControl
• Embedded regulator (LDO) and SMPS step-down converter
• Neo-Chrom GPU (GPU2D) and Chrom-ART Accelerator (DMA2D)
• MIPI® DSI host controller and LCD-TFT controller (LTDC)
• Arm® TrustZone® and comprehensive security features
• Up to 17 timers, 2 watchdogs, and RTC
• Up to 25 communication peripherals including USB Type-C®/USB PD, USB OTG HS, I2C, USART, SPI, CAN FD, SDMMC
• CORDIC and FMAC mathematical coprocessors
• Rich analog peripherals: ADCs, DAC, OPAMPs, Comparators

Applications:

Package:

• LQFP64
• LQFP100
• UFBGA132
• LQFP144
• WLCSP150
• TFBGA169
• WLCSP208
• TFBGA216

Includes ST state-of-the-art patented technology

Ultra-low-power with FlexPowerControl

• 1.71 V to 3.6 V power supply
• • 40 °C to + 85/125 °C temperature range
• Low-power background autonomous mode (LPBAM): autonomous peripherals with DMA, functional down to Stop 2 mode
• VBAT mode: supply for RTC, 32 x 32-bit backup registers and 2-Kbyte backup SRAM
• 150 nA Shutdown mode (24 wake-up pins)
• 195 nA Standby mode (24 wake-up pins)
• 480 nA Standby mode with RTC
• 2 μA Stop 3 mode with 40-Kbyte SRAM
• 8.2 μA Stop 3 mode with 2.5-Mbyte SRAM
• 4.65 μA Stop 2 mode with 40-Kbyte SRAM
• 17.5 μA Stop 2 mode with 2.5-Mbyte SRAM
• 18.5 μA/MHz Run mode at 3.3 V

Core

• Arm® 32-bit Cortex®-M33 CPU with TrustZone®, MPU, DSP, and FPU

I appreciate your detailed request, but I must be honest: no datasheet section has been provided for me to extract pinout information from.

The section header "4 Pinout, pin description and alternate functions" is present, but the actual pin table content that would follow it is missing from your submission.

What I need to proceed:

1. The pin table text from the datasheet section (the actual rows with pin names, numbers, and descriptions)
2. A pin diagram image (strongly recommended for accurate pin numbering, especially for a 144-pin BGA/LQFP package like the STM32U595ZJTxQ)

What I cannot do:

• Guess or fabricate pin assignments for the STM32U595ZJTxQ
• Invent pin numbers or functions not in the source material
• Substitute data from a different variant

Please provide:

• The complete pin table text from section 4 of the STM32U595ZJTxQ datasheet
• Ideally, the pin diagram image showing pin numbering

Once you supply the actual datasheet content, I will extract a clean, accurate pinout table for this specific part number.

The definition and values of output AC characteristics are given in Figure 35: Output AC characteristics definition and in the table below respectively.

Unless otherwise specified, the parameters given are derived from tests performed under the ambient temperature and supply voltage conditions summarized in Table 32.

Table 88. Output AC characteristics, HSLV OFF (all I/Os except FT_c, FT_t in VBAT mode(1), and FT_o I/Os)(2)(3)(4)

• Speed Symbol Parameter Conditions Min Max Unit
• Maximum frequency
  all I/Os CL = 50 pF, 2.7 V ≤ VDDIOx
  ≤ 3.6 V - 12.5
• CL = 50 pF, 1.58 V ≤ VDDIOx < 2.7 V - 5
• Fmax CL = 50 pF, 1.08 V ≤ VDDIOx < 1.58 V - 1 MHz
• CL = 10 pF, 2.7 V ≤ VDDIOx
  ≤ 3.6 V - 12.5
• CL = 10 pF, 1.58 V ≤ VDDIOx < 2.7 V - 5
• CL = 10 pF, 1.08 V ≤ VDDIOx < 1.58 V - 1
• 00 Output rise and fall time
  tr/tf
  all I/Os CL = 50 pF, 2.7 V ≤ VDDIOx
  ≤ 3.6 V - 17
• CL = 50 pF, 1.58 V ≤ VDDIOx < 2.7 V - 33
• CL = 50 pF, 1.08 V ≤ VDDIOx < 1.58 V - 85 ns
• CL = 10 pF, 2.7 V ≤ VDDIOx
  ≤ 3.6 V - 12.5
• CL = 10 pF, 1.58 V ≤ VDDIOx < 2.7 V - 25
• CL = 10 pF, 1.08 V ≤ VDDIOx < 1.58 V - 50

Table 88. Output AC characteristics, HSLV OFF (all I/Os except FT_c, FT_t in VBAT mode(1), and FT_o I/Os)(2)(3)(4) (continued)

Speed	Symbol	Parameter	Conditions	Min	Max	Unit
			CL = 30 pF, 2.7 V ≤ VDDIOx ≤ 3.6 V CL = 30 pF, 1.58 V ≤ VDDIOx < 2.7 V	- -	55 12.5
		Maximum frequency	CL = 30 pF, 1.08 V ≤ VDDIOx < 1.58 V	-	2.5
	Fmax	all I/Os	CL = 10 pF, 2.7 V ≤ VDDIOx ≤ 3.6 V CL = 10 pF, 1.58 V ≤ VDDIOx < 2.7 V CL = 10 pF, 1.08 V ≤ VDDIOx ≤<1.58 V	- - -	55 12.5 2.5	MHz
01			CL = 30 pF, 2.7 V ≤ VDDIOx ≤ 3.6 V CL = 30 pF, 1.58 V ≤ VDDIOx < 2.7 V	- -	5.8 10
		Output rise and fall time	CL = 30 pF, 1.08 V ≤ VDDIOx < 1.58 V	-	18
	tr/tf	all I/Os CL = 10 pF, 1.08 V ≤ VDDIOx < 1.58 V	CL = 10 pF, 2.7 V ≤ VDDIOx ≤ 3.6 V CL = 10 pF, 1.58 V ≤ VDDIOx < 2.7 V -	- - 12	4.2 7.5	ns
			CL = 30 pF, 2.7 V ≤ VDDIOx ≤ 3.6 V	-	100(5)	MHz
		Maximum frequency all I/Os	CL = 30 pF, 1.58 V ≤ VDDIOx < 2.7 V CL = 30 pF, 1.08 V ≤ VDDIOx < 1.58 V	- -	33(5) 5
	Fmax		CL = 10 pF, 2.7 V ≤ VDDIOx ≤ 3.6 V CL = 10 pF, 1.58 V ≤ VDDIOx < 2.7 V	- -	133(5) 40(5)
10			CL = 10 pF, 1.08 V ≤ VDDIOx < 1.58 V	- 5
			CL = 30 pF, 2.7 V ≤ VDDIOx ≤ 3.6 V CL = 30 pF, 1.58 V ≤ VDDIOx < 2.7 V	- -	3.3(5) 6.0(5)	ns
		Output rise and fall time	CL = 30 pF, 1.08 V ≤ VDDIOx < 1.58 V	-	13.3
	tr/tf	all I/Os	CL = 10 pF, 2.7 V ≤ VDDIOx ≤ 3.6 V CL = 10 pF, 1.58 V ≤ VDDIOx < 2.7 V CL = 10 pF, 1.08 V ≤ VDDIOx < 1.58 V	- - -	2(5) 4.1(5) 9.2
			CL = 30 pF, 2.7 V ≤ VDDIOx ≤ 3.6 V CL = 30 pF, 1.58 V ≤ VDDIOx < 2.7 V	- -	100(5) 33(5)	MHz
11	Fmax	Maximum frequency	CL = 30 pF, 1.08 V ≤ VDDIOx < 1.58 V	-	5
		All I/Os except FTc, FTv, and TTv	CL = 10 pF, 2.7 V ≤ VDDIOx ≤ 3.6 V CL = 10 pF, 1.58 V ≤ VDDIOx < 2.7 V CL = 10 pF, 1.08 V ≤ VDDIOx < 1.58 V	- - -	133(5) 40(5) 5

Speed	Symbol	Parameter	Conditions	Min	Max	Unit
			CL = 30 pF, 2.7 V ≤ VDDIOx ≤ 3.6 V CL = 30 pF, 1.58 V ≤ VDDIOx < 2.7 V	- -	140(5) 40(5)
		Maximum frequency	CL = 30 pF, 1.08 V ≤ VDDIOx < 1.58 V	-	5
11 (cont'd)	Fmax	FTv and TTv I/Os	CL = 10 pF, 2.7 V ≤ VDDIOx ≤ 3.6 V CL = 10 pF, 1.58 V ≤ VDDIOx < 2.7 V CL = 10 pF, 1.08 V ≤ VDDIOx < 1.58 V	- - -	166(5) 50(5) 5	MHz
	tr/tf		CL = 30 pF, 2.7 V ≤ VDDIOx ≤ 3.6 V CL = 30 pF, 1.58 V ≤ VDDIOx < 2.7 V	- -	3.3(5) 6.0(5)
		Output rise and fall time	CL = 30 pF, 1.08 V ≤ VDDIOx < 1.58 V	-	13.3
		All I/Os except FTc, FTv, and TTv	CL = 10 pF, 2.7 V ≤ VDDIOx ≤ 3.6 V CL = 10 pF, 1.58 V ≤ VDDIOx < 2.7 V	- -	2.0(5) 4.1(5)
			CL = 10 pF, 1.08 V ≤ VDDIOx < 1.58 V	-	9.2	ns
	tr/tf		CL = 30 pF, 2.7 V ≤ VDDIOx ≤ 3.6 V	-	2.5(5)
			Output rise and fall time	CL = 30 pF, 1.58 V ≤ VDDIOx < 2.7 V CL = 30 pF, 1.08 V ≤ VDDIOx < 1.58 V	- -	5.0(5) 11
		FTv and TTv I/Os	CL = 10 pF, 2.7 V ≤ VDDIOx ≤ 3.6 V CL = 10 pF, 1.58 V ≤ VDDIOx < 2.7 V CL = 10 pF, 1.08 V ≤ VDDIOx < 1.58 V	- - -	1.66(5) 3.1(5) 7
	Fmax	Maximum frequency	CL = 550 pF, 1.08 V ≤ VDDIOx < 3.6 V CL = 100 pF, 1.58 V ≤ VDDIOx < 3.6 V	- -	1 50	MHz
Fm+		Output fall time(6)	CL = 100 pF, 1.08 V ≤ VDDIOx < 1.58 V	-	80
	tf		CL = 550 pF, 1.58 V ≤ VDDIOx < 3.6 V CL = 550 pF, 1.08 V ≤ VDDIOx < 1.58 V	- -	100 220	ns

^2. The I/O structure options listed in this table can be a concatenation of options including the option explicitly listed. For instance TT_a refers to any TT I/O with _a option. TT_xx refers to any TT I/O and FT_xx refers to any FT I/O.

^3. The I/O speed is configured using the OSPEEDRy[1:0] bits. Refer to the product reference manual for a description of GPIO port configuration register.

^4. Specified by design. Not tested in production.

^5. Compensation system enabled.

^6. The fall time is defined between 70% and 30% of the output waveform accordingly to I2C specification.

Table 89. Output AC characteristics, HSLV ON (all I/Os except FT_c, FT_t in VBAT mode(1), and FT_o I/Os)(2)(3)(4)

• Speed Symbol Parameter Conditions Min Max Unit
• CL = 50 pF, 1.58 V ≤ VDDIOx < 2.7 V - 10
• CL = 50 pF, 1.08 V ≤ VDDIOx < 1.58 V - 4 MHz
• Fmax Maximum frequency CL = 10 pF, 1.58 V ≤ VDDIOx < 2.7 V - 15
• 00 CL = 10 pF, 1.08 V ≤ VDDIOx < 1.58 V - 4
• CL = 50 pF, 1.58 V ≤ VDDIOx < 2.7 V - 18
• CL = 50 pF, 1.08 V ≤ VDDIOx < 1.58 V - 32 ns
• tr/tf
  Output rise and fall time CL = 10 pF, 1.58 V ≤ VDDIOx < 2.7 V - 12
• CL = 10 pF, 1.08 V ≤ VDDIOx < 1.58 V - 21
• CL = 30 pF, 1.58 V ≤ VDDIOx < 2.7 V - 50
• Fmax Maximum frequency CL = 30 pF, 1.08 V ≤ VDDIOx < 1.58 V - 10 MHz
• CL = 10 pF, 1.58 V ≤ VDDIOx < 2.7 V - 67
• CL = 10 pF, 1.08 V ≤ VDDIOx < 1.58 V - 10
• 01 tr/tf CL = 30 pF, 1.58 V ≤ VDDIOx < 2.7 V - 5.3
• CL = 30 pF, 1.08 V ≤ VDDIOx < 1.58 V - 10.6
• Output rise and fall time CL = 10 pF, 1.58 V ≤ VDDIOx < 2.7 V - 3.1 ns
• CL = 10 pF, 1.08 V ≤ VDDIOx < 1.58 V - 5.6
• CL = 30 pF, 1.58 V ≤ VDDIOx < 2.7 V - 75(5)
• Fmax CL = 30 pF, 1.08 V ≤ VDDIOx < 1.58 V - 15
• Maximum frequency CL = 10 pF, 1.58 V ≤ VDDIOx < 2.7 V - 100(5) MHz
• CL = 10 pF, 1.08 V ≤ VDDIOx < 1.58 V - 15
• 10 CL = 30 pF, 1.58 V ≤ VDDIOx < 2.7 V - 4.4(5) ns
• Output rise and fall time CL = 30 pF, 1.08 V ≤ VDDIOx < 1.58 V - 9.6
• tr/tf CL = 10 pF, 1.58 V ≤ VDDIOx < 2.7 V - 2.2(5)
• CL = 10 pF, 1.08 V ≤ VDDIOx < 1.58 V - 4.7

Table 89. Output AC characteristics, HSLV ON (all I/Os except FT_c, FT_t in VBAT mode(1), and FT_o I/Os)(2)(3)(4) (continued)

Speed	Symbol	Parameter	Conditions	Min	Max	Unit
			CL = 30 pF, 1.58 V ≤ VDDIOx < 2.7 V	-	75(5)
		Maximum frequency	CL = 30 pF, 1.08 V ≤ VDDIOx < 1.58 V	-	15
	All I/Os except FTc, FTv, and TTv	CL = 10 pF, 1.58 V ≤ VDDIOx < 2.7 V	-	100(5)
			CL = 10 pF, 1.08 V ≤ VDDIOx < 1.58 V	-	15	MHz
Fmax			CL = 30 pF, 1.58 V ≤ VDDIOx < 2.7 V	-	110(5)
		Maximum frequency FTv and TTv I/Os	CL = 30 pF, 1.08 V ≤ VDDIOx < 1.58 V CL = 10 pF, 1.58 V ≤ VDDIOx < 2.7 V	- -	25 150(5)
11			CL = 10 pF, 1.08 V ≤ VDDIOx < 1.58 V	-	25
		Output rise and fall time All I/Os except FTc, FTv, and TTv	CL = 30 pF, 1.58 V ≤ VDDIOx < 2.7 V CL = 30 pF, 1.08 V ≤ VDDIOx < 1.58 V CL = 10 pF, 1.58 V ≤ VDDIOx < 2.7 V CL = 10 pF, 1.08 V ≤ VDDIOx < 1.58 V	- -	4.4(5) 9.6 2.2(5) 4.7	ns
	tr/tf		CL = 30 pF, 1.58 V ≤ VDDIOx < 2.7 V	-	3.0(5)
		Output rise and fall time FTv and TTv I/Os	CL = 30 pF, 1.08 V ≤ VDDIOx < 1.58 V CL = 10 pF, 1.58 V ≤ VDDIOx < 2.7 V CL = 10 pF, 1.08 V ≤ VDDIOx < 1.58 V	- -	6.6 1.6(5) 3.4

Table 90. Output AC characteristics for FT_c I/Os(1)(2)

• Speed Symbol Parameter Conditions Min Max Unit

• All I/Os, CL = 50 pF, 2.7 V ≤ VDDIOx
  ≤ 3.6 V - 10

• Fmax
  00 Maximum frequency All I/Os, CL = 50 pF, 1.58 V ≤ VDDIOx < 2.7 V - 5 MHz

• Output rise and fall time All I/Os, CL = 50 pF, 2.7 V ≤ VDDIOx
  ≤ 3.6 V - 33

• tr/tf All I/Os, CL = 50 pF, 1.58 V ≤ VDDIOx < 2.7 V - 66 ns

• All I/Os, CL = 50 pF, 2.7 V ≤ VDDIOx
  ≤ 3.6 V - 25

• Fmax Maximum frequency All I/Os, CL = 50 pF, 1.58 V ≤ VDDIOx < 2.7 V - 10 MHz

• 01 All I/Os, CL = 50 pF, 2.7 V ≤ VDDIOx
  ≤ 3.6 V - 13

• tr/tf Output rise and fall time All I/Os, CL = 50 pF, 1.58 V ≤ VDDIOx < 2.7 V - 33 ns

• Speed Symbol Parameter Conditions Min Max Unit

• Maximum frequency All I/Os, CL = 50 pF, 2.7 V ≤ VDDIOx
  ≤ 3.6 V - 40

• Fmax All I/Os, CL = 50 pF, 1.58 V ≤ VDDIOx < 2.7 V - 20 MHz

• 1x All I/Os, CL = 50 pF, 2.7 V ≤ VDDIOx
  ≤ 3.6 V - 8

• tr/tf Output rise and fall time All I/Os, CL = 50 pF, 1.58 V ≤ VDDIOx < 2.7 V - 17 ns

Table 90. Output AC characteristics for FT_c I/Os(1)(2) (continued)

Table 91. Output AC characteristics for FT_t I/Os in VBAT mode, and for FT_o I/Os(1)

Symbol	Parameter	Conditions	Min	Max	Unit
		CL = 50 pF, 2.7 V ≤ VSW ≤ 3.6 V	-	0.5
Fmax	Maximum frequency	CL = 50 pF, 1.58 V ≤ VSW < 2.7 V	-	0.25	MHz
	Output rise and fall time	CL = 50 pF, 2.7 V ≤ VSW ≤ 3.6 V	-	400	ns
tr/tf		CL = 50 pF, 1.58 V ≤ VSW < 2.7 V	-	900

Figure 35. Output AC characteristics definition

^1. Specified by design. Not tested in production.

^2. The I/O speed is configured using the OSPEEDRy[1:0] bits. Refer to the product reference manual for a description of GPIO port configuration register.

Stresses above the absolute maximum ratings listed in Table 29, Table 30, and Table 31 may cause permanent damage to the device. These are stress ratings only and the

functional operation of the device at these conditions is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. Device mission profile (application conditions) is compliant with JEDEC JESD47 qualification standard, extended mission profiles are available on demand.

Table 29. Voltage characteristics⁽¹⁾ (2)

Symbol	Ratings	Min	Max	Unit
V DDX - V SS	External main supply voltage (including VDDSMPS, VDDA, VDDUSB, VDDDSI, VBAT, VREF+)	-0.3	4.0
V DDIOx (3) - V SS	I/O supply when HSLV = 0	-0.3	4.0
VDDIOx 7- VSS	I/O supply when HSLV = 1	-0.3	2.75
	Input voltage on FT_xx pins except FT_c pins	V SS - 0.3	Min (min (V DD , V DDA , V DDUSB , V DDIO2 ) + 4.0, 6.0) (5)(6)	V
V IN (4)	Input voltage on FT_t pins in V BAT mode	V SS - 0.3	Min (min (V BAT , V DDA , V DDUSB , V DDIO2 ) + 4.0, 6.0) (5)(6)
	Input voltage on FT_c pins	V SS - 0.3	5.5
	Input voltage on any other pins	V SS - 0.3	4.0
V REF+ - V DDA	Allowed voltage difference for V REF+ > V DDA	-	0.4
ΔV DDx	Variations between different VDDx power pins of the same domain	-	50.0	mV
V SSx -V SS	Variations between all the different ground pins (7)	-	50.0	1110

All main power (VDD, VDDSMPS, VDDA, VDDUSB, VDDIO2, VDDDSI, VBAT) and ground (VSS, VSSA, VSSSMPS) pins must always be connected to the external power supply, in the permitted range.

The I/O structure options listed in this table can be a concatenation of options including the option explicitly listed. For instance TT_a refers to any TT I/O with _a option. TT_xx refers to any TT I/O and FT_xx refers to any FT I/O.

^3. V_DDIO1 or V_DDIO2 , V_DDIO1 = V_DD .

^4. V_IN maximum must always be respected. Refer to Table 30 for the maximum allowed injected current values.

^5. To sustain a voltage higher than 4 V, the internal pull-up/pull-down resistors must be disabled.

^6. This formula has to be applied only on the power supplies related to the I/O structure described in the pin definition table.

^7. Including VREF- pin.

Table 30. Current characteristics

Symbol	Ratings	Max	Unit
∑IVDD	power lines (source)(1) Total current into sum of all VDD	200
∑IVSS	ground lines (sink)(1) Total current out of sum of all VSS	200
IVDD	Maximum current into each VDD power pin (source)(1)	100
IVSS	Maximum current out of each VSS ground pin (sink)(1)	100
	Output current sunk by any I/O and control pin	20
IIO	Output current sourced by any I/O and control pin	20	mA
	Total output current sunk by sum of all I/Os and control pins(2)	120
∑I(PIN)	Total output current sourced by sum of all I/Os and control pins(2)	120
IINJ(PIN)(3)(4)	Injected current on FT_xx, TT_xx, RST pins	-5/+0
∑ IINJ(PIN)	Total injected current (sum of all I/Os and control pins)(5)	±25

Table 31. Thermal characteristics

Symbol	Ratings	Value	Unit
TSTG	Storage temperature range
TJ	Maximum junction temperature	140	°C

The maximum chip-junction temperature, TJ max, in degrees Celsius, can be calculated using the following equation:

TJ max = TA max + (PD max * ΘJA)

where:

• TA max is the maximum ambient temperature in °C.
• ΘJA is the package junction-to-ambient thermal resistance in °C/W.
• PD max is the sum of PINT max and PI/O max (PD max = PINT max + PI/O max).
• PINT max is the product of IDD and VDD, expressed in Watts. This is the maximum chip internal power.

PI/O max represents the maximum power dissipation on output pins:P_I/O max = sum (V_OL * I_OL) + sum ((V_DDIOx - V_OH) * I_OH)

taking into account the actual VOL/IOL and VOH/IOH of the I/Os at low and high level in the application.

Table 171. Package thermal characteristics

Symbol	Parameter	Package	Value	Unit
		LQFP64 (10 x10 mm) LQFP100 (14 x 14 mm) UFBGA132 (7 x 7 mm) LQFP144 (20 x 20 mm)	36.0 32.2 30.9 34.1
ΘJA	Thermal resistance junction-ambient	WLCSP150 (5.38 x 5.47 mm) TFBGA169 (7 x 7 mm) WLCSP208 (5.38 x 5.47 mm) TFBGA216 (13 x 13 mm) LQFP64 (10 x10 mm)	31.7 32.2 35.4 26.5 18.3
		LQFP100 (14 x14 mm)	18.0	°C/W
	Thermal resistance junction-board	UFBGA132 (7 x 7 mm) LQFP144 (20 x 20 mm)	15.9 22.9
ΘJB		WLCSP150 (5.38 x 5.47 mm) TFBGA169 (7 x 7 mm) WLCSP208 (5.38 x 5.47 mm) TFBGA216 (13 x 13 mm)	13.5 17.7 12.5 16.0
ΘJC		LQFP64 (10 x 10 mm) LQFP100 (14 x 14 mm) UFBGA132 (7 x 7 mm)	6.8 5.9 6.0
	Thermal resistance junction-case	LQFP144 (20 x 20 mm) WLCSP150 (5.38 x 5.47 mm) TFBGA169 (7 x 7 mm) WLCSP208 (5.38 x 5.47 mm) TFBGA216 (13 x 13 mm)	6.0 0.9 9.0 1.0 7.7

In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark.

Package information STM32U59xxx