STM32G431C6
ARM Cortex-M4 MCUThe STM32G431C6 is a arm cortex-m4 mcu from STMicroelectronics. View the full STM32G431C6 datasheet below including key specifications, electrical characteristics, absolute maximum ratings.
Manufacturer
STMicroelectronics
Category
Microcontrollers (MCU)Key Specifications
| Parameter | Value |
|---|---|
| Packaging | Tray |
| Standard Pack Qty | 1560 |
Overview
Part: STM32G431x6/x8/xB from STMicroelectronics
Type: ARM Cortex-M4 32-bit MCU+FPU
Description: 32-bit ARM Cortex-M4 MCU with FPU, operating at up to 170 MHz with 213 DMIPS, featuring up to 128 KB Flash memory, 32 KB SRAM, rich analog peripherals, and mathematical hardware accelerators.
Operating Conditions:
- Supply voltage: 1.71–3.6 V
- Operating temperature: -40 to +125 °C
- Max CPU frequency: 170 MHz
Absolute Maximum Ratings:
- Max supply voltage: 4.0 V (VDD, VDDA, VDDIO2, VDDUSB)
- Max continuous current: 25 mA (per I/O pin)
- Max junction/storage temperature: +125 °C (junction), +150 °C (storage)
Key Specs:
- Core: Arm® 32-bit Cortex®-M4 CPU with FPU, up to 170 MHz
- Flash memory: Up to 128 Kbytes with ECC support
- SRAM: 22 Kbytes (plus 10 Kbytes CCM SRAM)
- ADC: 2 x 0.25 μs (up to 23 channels), up to 16-bit resolution, 0 to 3.6 V conversion range
- DAC: 4 x 12-bit channels (2 buffered external 1 MSPS, 2 unbuffered internal 15 MSPS)
- Comparators: 4 x ultra-fast rail-to-rail analog comparators
- Operational Amplifiers: 3 x, usable in PGA mode
- I/Os: Up to 86 fast I/Os, several with 5 V tolerant capability
Features:
- Adaptive real-time accelerator (ART Accelerator) for 0-wait-state execution from Flash
- Mathematical hardware accelerators: CORDIC for trigonometric functions, FMAC for filter operations
- Comprehensive clock management: 4-48 MHz crystal, 32 kHz oscillator, internal 16 MHz RC (±1%), internal 32 kHz RC (±5%)
- 12-channel DMA controller
- Internal voltage reference buffer supporting 2.048 V, 2.5 V, 2.9 V outputs
- 14 timers including advanced motor control, general-purpose, basic, low-power, and watchdog timers
- Communication interfaces: 1 x FDCAN, 4 x USART/UARTs, 1 x LPUART, 3 x SPIs (2 with I2S), 1 x SAI, USB 2.0 full-speed, IRTIM, USB Type-C™ / USB Power Delivery controller (UCPD)
- True random number generator (RNG)
- 3 x I2C Fast mode plus (1 Mbit/s) with 20 mA current sink and wakeup from stop
- Development support: Serial wire debug (SWD), JTAG, Embedded Trace Macrocell™
Applications:
Package:
- UFQFPN32 (5 x 5 mm)
- UFQFPN48 (7 x 7 mm)
- LQFP48 (7 x 7 mm)
- LQFP64 (10 x 10 mm)
- LQFP80 (12 x 12 mm)
- LQFP32 (7 x 7 mm)
- LQFP100 (14 x 14 mm)
- UFBGA64 (5 x 5 mm)
- WLCSP49 (Pitch 0.4)
Features
- 24-bit CORDIC rotation engine
- Circular and Hyperbolic modes
- Rotation and Vectoring modes
- Functions: Sine, Cosine, Sinh, Cosh, Atan, Atan2, Atanh, Modulus, Square root, Natural logarithm
- Programmable precision up to 20-bit
- Fast convergence: 4 bits per clock cycle
- Supports 16-bit and 32-bit fixed point input and output formats
- Low latency AHB slave interface
- Results can be read as soon as ready without polling or interrupt
- DMA read and write channels
Electrical Characteristics
The definition and values of input/output AC characteristics are given in Figure 26 and Table 55 , respectively.
Unless otherwise specified, the parameters given are derived from tests performed under the ambient temperature and supply voltage conditions summarized in Table 17: General operating conditions .
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Table 55. I/O (except FTc) AC characteristics (1) (2)
| Speed | Symbol | Parameter | Conditions | Min | Max | Unit |
|---|---|---|---|---|---|---|
| 00 | Fmax | Maximum frequency | C=50 pF, 2.7 V ≤ V DD ≤ 3.6 V | - | 5 | MHz |
| 00 | Fmax | Maximum frequency | C=50 pF, 1.62 V ≤ V DD ≤ 2.7 V | - | 1 | MHz |
| 00 | Fmax | Maximum frequency | C=10 pF, 2.7 V ≤ V DD ≤ 3.6 V | - | 10 | MHz |
| 00 | Fmax | Maximum frequency | C=10 pF, 1.62 V ≤ V DD ≤ 2.7 V | - | 1.5 | MHz |
| 00 | Tr/Tf | Output rise and fall time | C=50 pF, 2.7 V ≤ V DD ≤ 3.6 V | - | 25 | ns |
| 00 | Tr/Tf | Output rise and fall time | C=50 pF, 1.62 V ≤ V DD ≤ 2.7 V | - | 52 | ns |
| 00 | Tr/Tf | Output rise and fall time | C=10 pF, 2.7 V ≤ V DD ≤ 3.6 V | - | 17 | ns |
| 00 | Tr/Tf | Output rise and fall time | C=10 pF, 1.62 V ≤ V DD ≤ 2.7 V | - | 37 | ns |
| 01 | Fmax | Maximum frequency | C=50 pF, 2.7 V ≤ V DD ≤ 3.6 V | - | 25 | MHz |
| 01 | Fmax | Maximum frequency | C=50 pF, 1.62 V ≤ V DD ≤ 2.7 V | - | 10 | MHz |
| 01 | Fmax | Maximum frequency | C=10 pF, 2.7 V ≤ V DD ≤ 3.6 V | - | 50 | MHz |
| 01 | Fmax | Maximum frequency | C=10 pF, 1.62 V ≤ V DD ≤ 2.7 V | - | 15 | MHz |
| Tr/Tf | Output rise and fall time | C=50 pF, 2.7 V ≤ V DD ≤ 3.6 V | - | 9 | ns | |
| Tr/Tf | Output rise and fall time | C=50 pF, 1.62 V ≤ V DD ≤ 2.7 V | - | 16 | ns | |
| Tr/Tf | Output rise and fall time | C=10 pF, 2.7 V ≤ V DD ≤ 3.6 V | - | 4.5 | ns | |
| Tr/Tf | Output rise and fall time | C=10 pF, 1.62 V ≤ V DD ≤ 2.7 V | - | 9 | ns | |
| 10 | Fmax | Maximum frequency | C=50 pF, 2.7 V ≤ V DD ≤ 3.6 V | - | 50 | MHz |
| 10 | Fmax | Maximum frequency | C=50 pF, 1.62 V ≤ V DD ≤ 2.7 V | - | 25 | MHz |
| 10 | Fmax | Maximum frequency | C=10 pF, 2.7 V ≤ V DD ≤ 3.6 V | - | 100 (3) | MHz |
| 10 | Fmax | Maximum frequency | C=10 pF, 1.62 V ≤ V DD ≤ 2.7 V | - | 37.5 | MHz |
| 10 | Tr/Tf | Output rise and fall time | C=50 pF, 2.7 V ≤ V DD ≤ 3.6 V | - | 5.8 | ns |
| 10 | Tr/Tf | Output rise and fall time | C=50 pF, 1.62 V ≤ V DD ≤ 2.7 V | - | 11 | ns |
| 10 | Tr/Tf | Output rise and fall time | C=10 pF, 2.7 V ≤ V DD ≤ 3.6 V | - | 2.5 | ns |
| 10 | Tr/Tf | C=10 pF, 1.62 V ≤ V DD ≤ 2.7 V | - | 5 | ||
| 11 | Fmax | Maximum frequency | C=30 pF, 2.7 V ≤ V DD ≤ 3.6 V | - | 120 (3) | MHz |
| 11 | Fmax | Maximum frequency | C=30 pF, 1.62 V ≤ V DD ≤ 2.7 V | - | 50 | MHz |
| 11 | Fmax | Maximum frequency | C=10 pF, 2.7 V ≤ V DD ≤ 3.6 V | - | 180 (3) | MHz |
| 11 | Fmax | C=10 pF, 1.62 V ≤ V DD ≤ 2.7 V | - | 75 | ||
| 11 | Tr/Tf | Output rise and | C=30 pF, 2.7 V ≤ V DD ≤ 3.6 V | - | 3.3 | ns |
| 11 | Tr/Tf | Output rise and | C=30 pF, 1.62 V ≤ V DD ≤ 2.7 V | - | 6 | ns |
| 11 | Tr/Tf | fall time (4) | C=10 pF, 2.7 V ≤ V DD ≤ 3.6 V | - | 1.7 | ns |
| 11 | Tr/Tf | C=10 pF, 1.62 V ≤ V DD ≤ 2.7 V | - | 3.3 | ns |
Table 55. I/O (except FTc) AC characteristics (1) (2)
Table 55. I/O (except FTc) AC characteristics (1) (2) (continued)
| Speed | Symbol | Parameter | Conditions | Min | Max | Unit |
|---|---|---|---|---|---|---|
| FM+ | Fmax (5) | Maximum frequency | C=50 pF, 1.6 V ≤ V DD ≤ 3.6 V | - | 1 | MHz |
| FM+ | Tr/TF (4) | Output high to low level fall time | C=50 pF, 1.6 V ≤ V DD ≤ 3.6 V | - | 5 | ns |
- The I/O speed is configured using the OSPEEDRy[1:0] bits. The Fm+ mode is configured in the SYSCFGCFGR1 register. Refer to the reference manual RM0440 "STM32G4 Series advanced Arm ® based 32-bit MCUs" for a description of GPIO Port configuration register.
- Guaranteed by design.
- This value represented the I/O capability but maximum system frequency is 170 MHz.
- The fall time is defined between 70% and 30% of the output waveform accordingly to I2C specification.
- The maximum frequency is defined with the following conditions:
- 45%<Duty cycle<55%
- (Tr+ Tf) ≤ 2/3 T.
- The I/O speed is configured using the OSPEEDRy[1:0] bits. The Fm+ mode is configured in the SYSCFGCFGR1 register. Refer to the reference manual RM0440 "STM32G4 Series advanced Arm ® based 32-bit MCUs" for a description of GPIO Port configuration register.
- Guaranteed by design.
Table 56. I/O FTc AC characteristics (1) (2)
| Speed | Symbol | Parameter | Conditions | Min | Max | Unit |
|---|---|---|---|---|---|---|
| 0 | Fmax | Maximum frequency | C=50 pF, 2.7 V ≤ V DD ≤ 3.6 V | - | 2 | MHz |
| 0 | Fmax | Maximum frequency | C=50 pF, 1.6 V ≤ V DD ≤ 2.7 V | - | 1 | MHz |
| 0 | Tr/Tf | Output H/L to L/H level fall time | C=50 pF, 2.7 V ≤ V DD ≤ 3.6 V | - | 170 | ns |
| 0 | Tr/Tf | Output H/L to L/H level fall time | C=50 pF, 1.6 V ≤ V DD ≤ 2.7 V | - | 330 | ns |
| 1 | Fmax | Maximum frequency | C=50 pF, 2.7 V ≤ V DD ≤ 3.6 V | - | 10 | MHz |
| 1 | Fmax | Maximum frequency | C=50 pF, 1.6 V ≤ V DD ≤ 2.7 V | - | 5 | MHz |
| 1 | Tr/Tf | Output H/L to L/H level fall time | C=50 pF, 2.7 V ≤ V DD ≤ 3.6 V | - | 35 | ns |
| 1 | Tr/Tf | Output H/L to L/H level fall time | C=50 pF, 1.6 V ≤ V DD ≤ 2.7 V | - | 65 | ns |
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Absolute Maximum Ratings
Stresses above the absolute maximum ratings listed in Table 14: Voltage characteristics , Table 15: Current characteristics and Table 16: Thermal characteristics may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these conditions is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. Exposure to maximum rating conditions for extended periods may affect device reliability. Device mission profile (application conditions) is compliant with JEDEC JESD47 qualification standard, extended mission profiles are available on demand.
Table 14. Voltage characteristics (1)
| Symbol | Ratings | Min | Max | Unit |
|---|---|---|---|---|
| V DD - V SS | External main supply voltage (including V DD , V DDA , V BAT and V REF+ ) | -0.3 | 4.0 | V |
| V IN (2) | Input voltage on FT_xxx pins except FT_c pins | V SS -0.3 | min (V DD ,V DDA ) + 4.0 (3)(4) | V |
| V IN (2) | Input voltage on FT_c pins | V SS -0.3 | 5.5 | V |
| V IN (2) | Input voltage on TT_xx pins | V SS -0.3 | 4.0 | V |
| V IN (2) | Input voltage on any other pins | V SS -0.3 | 4.0 | V |
| | ∆ V DDx | | Variations between different V DDX power pins of the same domain | - | 50 | mV |
| |V SSx -V SS | | Variations between all the different ground pins (5) | - | 50 | mV |
| V REF+ -V DDA | Allowed voltage difference for V REF+ > V DDA | - | 0.4 | V |
Table 14. Voltage characteristics (1)
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- VIN maximum must always be respected. Refer to Table 15: Current characteristics for the maximum allowed injected current values.
- This formula has to be applied only on the power supplies related to the IO structure described in the pin definition table.
- To sustain a voltage higher than 4 V the internal pull-up/pull-down resistors must be disabled.
- Include VREF- pin.
- This current consumption must be correctly distributed over all I/Os and control pins. The total output current must not be sunk/sourced between two consecutive power supply pins referring to high pin count LQFP packages.
- Positive injection (when V IN > V DD ) is not possible on these I/Os and does not occur for input voltages lower than the specified maximum value.
- A negative injection is induced by VIN < VSS. IINJ(PIN) must never be exceeded. Refer also to Table 14: Voltage characteristics for the minimum allowed input voltage values.
- When several inputs are submitted to a current injection, the maximum ∑ |I INJ(PIN) | is the absolute sum of the negative injected currents (instantaneous values).
Table 15. Current characteristics
| Symbol | Ratings | Max | Unit |
|---|---|---|---|
| ∑ IV DD | Total current into sum of all V DD power lines (source) (1) | 150 | mA |
| ∑ IV SS | Total current out of sum of all V SS ground lines (sink) (1) | 150 | mA |
| IV DD(PIN) | Maximum current into each V DD power pin (source) (1) | 100 | mA |
| IV SS(PIN) | Maximum current out of each V SS ground pin (sink) (1) | 100 | mA |
| I IO(PIN) | Output current sunk by any I/O and control pin except FT_f | 20 | mA |
| I IO(PIN) | Output current sunk by any FT_f pin | 20 | mA |
| I IO(PIN) | Output current sourced by any I/O and control pin | 20 | mA |
| ∑ I IO(PIN) | Total output current sunk by sum of all I/Os and control pins (2) | 100 | mA |
| ∑ I IO(PIN) | Total output current sourced by sum of all I/Os and control pins (2) | 100 | mA |
| I INJ(PIN) (3) | Injected current on FT_xxx, TT_xx, NRST pins | -5/0 (4) | mA |
| ∑ |I INJ(PIN) | | Total injected current (sum of all I/Os and control pins) (5) | ±25 | mA |
Table 16. Thermal characteristics
| Symbol | Ratings | Value | Unit |
|---|---|---|---|
| T STG | Storage temperature range | -65 to +150 | °C |
| T J | Maximum junction temperature | 150 | °C |
Table 16. Thermal characteristics
Thermal Information
The maximum chip-junction temperature, T J max, in degrees Celsius, may be calculated using the following equation:
T J max = T A max + (P D max x Θ JA )
Package Information
In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com . ECOPACK is an ST trademark.
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The following components are covered by the same datasheet.
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| STM32G431MB | STMicroelectronics | — |
| STM32G431MX | STMicroelectronics | — |
| STM32G431R6 | STMicroelectronics | — |
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