STM32G031G8U6
Arm Cortex-M0+ 32-bit MCUThe STM32G031G8U6 is a arm cortex-m0+ 32-bit mcu from STMicroelectronics. View the full STM32G031G8U6 datasheet below including key specifications, electrical characteristics, absolute maximum ratings.
STM32G031G8U6 shares its datasheet with STM32G031K8T6, whose page lists every part number it covers.
Official STM32G031G8U6 datasheet (PDF) — the source this page was extracted from.
STM32G031G8U6 Key Specifications
| Parameter | Value |
|---|---|
| ADC Channels (Resolution) | 15-Ch 12-Bit |
| Ambient Temperature Range High | 85 °C |
| China RoHS | Compliant |
| Connectivity | I2C, IrDA, LINbus, SPI, SmartCard, UART/USART |
| Core Architecture | ARM Cortex-M0+ |
| Core Processor | ARM® Cortex®-M0+ |
| Core Size | 32-Bit |
| Data Bus Width | 32 b |
| Data Converters | A/D 17x12b SAR |
| DigiKey Programmable | Not Verified |
| EEPROM Memory Size | 0 B |
| Flash Memory Size | 64 kB |
| Frequency | 64 MHz |
| Height | 600 µm |
| Height - Seated (Max) | 600 µm |
| Interface | I2C, I2S, IrDA, LIN, SPI, UART, USART |
| Length | 4 mm |
| Lifecycle Status | Production (Last Updated: 2 months ago) |
| Manufacturer Package Identifier | UFQFPN28-A0B0 |
| Max Frequency | 48 MHz |
| Max Junction Temperature (Tj) | 105 °C |
| Max Operating Temperature | 85 °C |
| Max Supply Current | 6.9 mA |
| Max Supply Voltage | 3.6 V |
| Memory Size | 64 kB |
| Memory Type | FLASH |
| Min Operating Temperature | -40 °C |
| Min Supply Voltage | 1.7 V |
| Mounting Type | Surface Mount |
| Number of A/D Converters | 1 |
| Number of ADC Channels | 19 |
| Number of I/O | 26 |
| Number of I/Os | 3 |
| Number of I2C Channels | 2 |
| Number of SPI Channels | 2 |
| Number of Terminals | 28 |
| Number of Timers/Counters | 9 |
| Number of UART Channels | 3 |
| Number of USART Channels | 2 |
| Operating Supply Voltage | 1.8 V |
| Operating Temperature | -40°C ~ 85°C (TA) |
| Oscillator Type | External, Internal |
| Package / Case | 28-UFQFN |
| Packaging | Tray |
| Peripherals | POR |
| Peripherals | Brown-out Detect/Reset, DMA, I2S, POR, PWM, WDT |
| Flash Memory Size | 64KB (64K x 8) |
| Program Memory Type | FLASH |
| RAM Size | 8K x 8 B |
| RAM Size | 8 kB |
| REACH SVHC | Yes |
| RoHS | Compliant |
| Schedule B | 8542310000 |
| Clock Speed | 64MHz |
| Standard Pack Qty | 2940 |
| Supplier Device Package | 28-UFQFPN (4x4) |
| Terminal Pitch | 500 µm |
| Supply Voltage | 1.7V ~ 3.6V |
| Width | 4 mm |
STM32G031G8U6 Overview
Part: STM32G031K8T6 — STMicroelectronics
Type: Arm Cortex-M0+ 32-bit MCU
Description: 32-bit Arm Cortex-M0+ MCU at up to 64 MHz with 64 KB Flash and 8 KB SRAM, 1.7–3.6 V supply, 2x USART, 2x SPI, 2x I2C, 12-bit ADC and 11 timers.
Operating Conditions:
- Supply voltage (VDD): 1.7–3.6 V (VDDA 1.62–3.6 V for ADC operation; VBAT 1.55–3.6 V)
- Operating temperature: -40 to 85 °C (suffix 6; TJ up to 105 °C)
- Max AHB/APB clock: 64 MHz
- I/O input voltage: -0.3 V to Min(VDD + 3.6, 5.5) V
Absolute Maximum Ratings:
- Max external supply voltage (VDD − VSS): 4.0 V (min -0.3 V)
- Input voltage on FT_xx pins: VDD + 4.0 V max; on any other pin 4.0 V max
- Current into VDD/VDDA power pin: 100 mA
- Output current sunk/sourced by any I/O and control pin: 15 mA (FT_f pins sink 20 mA)
- Total output current sunk or sourced by all I/Os: 80 mA each
- Max junction temperature: 150 °C
- Storage temperature: -65 to +150 °C
Key Specs:
- CPU frequency: up to 64 MHz (fHCLK, fPCLK)
- VDD operating range: 1.7–3.6 V
- VDDA for ADC: 1.62–3.6 V; for VREFBUF: 2.4–3.6 V
- Ambient temperature: -40 to 85 °C (suffix 6); -40 to 125 °C (suffix 3)
- Junction temperature: -40 to 105 °C (suffix 6); -40 to 130 °C (suffix 3)
- Flash: up to 64 KB; SRAM: 8 KB with HW parity
- ADC: 12-bit, 0.4 μs, up to 16 external channels
- Up to 44 fast I/Os, multiple 5 V-tolerant
Features:
- Arm Cortex-M0+ core, up to 64 MHz
- CRC calculation unit and 96-bit unique ID
- POR/PDR, programmable BOR, programmable voltage detector
- Low-power modes: Sleep, Stop, Standby, Shutdown; VBAT supply for RTC and backup registers
- 4–48 MHz crystal oscillator, 32 kHz crystal oscillator, internal 16 MHz RC with PLL (±1 %), internal 32 kHz RC (±5 %)
- 5-channel DMA controller
- 11 timers including advanced motor control timer, two watchdogs, SysTick
- Calendar RTC with alarm and periodic wakeup
- Two I2C (Fast-mode Plus, 1 Mbit/s), two USARTs, one low-power UART, two SPIs (32 Mbit/s, one multiplexed with I2S)
- Serial wire debug (SWD)
- ECOPACK 2 compliant
Applications:
- General-purpose embedded and mainstream microcontroller applications
Package:
- LQFP32 (STM32G031K8T6, 32 pins)
STM32G031G8U6 Features
- Core: Arm ® 32-bit Cortex ® -M0+ CPU, frequency up to 64 MHz
- -40°C to 85°C/125°C operating temperature
- Memories
- -Up to 64 Kbytes of Flash memory
- -8 Kbytes of SRAM with HW parity check
- CRC calculation unit
- Reset and power management
- -Voltage range: 1.7 V to 3.6 V
- -Power-on/Power-down reset (POR/PDR)
- -Programmable Brownout reset (BOR)
- -Programmable voltage detector (PVD)
- -Low-power modes: Sleep, Stop, Standby, Shutdown
- -VBAT supply for RTC and backup registers
- Clock management
- -4 to 48 MHz crystal oscillator
- -32 kHz crystal oscillator with calibration
- -Internal 16 MHz RC with PLL option (±1 %)
- -Internal 32 kHz RC oscillator (±5 %)
- Up to 44 fast I/Os
- -All mappable on external interrupt vectors
- -Multiple 5 V-tolerant I/Os
- 5-channel DMA controller with flexible mapping
- 12-bit, 0.4 μs ADC (up to 16 ext. channels)
- -Up to 16-bit with hardware oversampling
- -Conversion range: 0 to 3.6V
- 11 timers (one 128 MHz capable): 16-bit for advanced motor control, one 32-bit and four 16-bit general-purpose, two low-power 16-bit, two watchdogs, SysTick timer
- Calendar RTC with alarm and periodic wakeup from Stop/Standby/Shutdown
STM32G031G8U6 Pin Configuration
Figure 3. STM32G031CxT LQFP48 pinout
Figure 4. STM32G031CxU UFQFPN48 pinout
38
Figure 5. STM32G031KxT LQFP32 pinout
Figure 6. STM32G031KxU UFQFPN32 pinout
Figure 7. STM32G031GxU UFQFPN28 pinout
Figure 8. STM32G031Fx TSSOP20 pinout
Figure 9. STM32G031Yx WLCSP18 ballout
38
Figure 10. STM32G031Jx SO8N pinout
MSv47956V1
1
2
3
4
8
7
- 6 PA12[PA10]
5
PB7/PB8/PB9/PC14-OSC32_IN
PA0/PA1/PA2/PF2-NRST
PB5/PB6/PA14-BOOT0/PA15
PA13
VDD/VDDA
VSS/VSSA
PA8/PA11[PA9]/PB0/PB1
Top view
Table 11. Terms and symbols used in Table 12
| Column | Column | Symbol | Definition |
|---|---|---|---|
| Pin name | Pin name | Terminal name corresponds to its by-default function at reset, unless otherwise specified in parenthesis under the pin name. | Terminal name corresponds to its by-default function at reset, unless otherwise specified in parenthesis under the pin name. |
| S | Supply pin | ||
| type | I | Input only pin | |
| I/O | Input / output pin | ||
| FT | 5 V tolerant I/O | ||
| RST | Bidirectional reset pin with embedded weak pull-up resistor | ||
| Options for FT I/Os | Options for FT I/Os | ||
| structure | _f | I/O, Fm+ capable | |
| _a | I/O, with analog switch function | ||
| _e | I/O, with switchable diode to V DD | ||
| Upon reset, all I/Os are set as analog inputs, unless otherwise specified. | Upon reset, all I/Os are set as analog inputs, unless otherwise specified. | ||
| Alternate functions | Functions selected through GPIOx_AFR registers | Functions selected through GPIOx_AFR registers | |
| Additional functions | Functions directly selected/enabled through peripheral registers | Functions directly selected/enabled through peripheral registers |
Table 11. Terms and symbols used in Table 12
Table 12. Pin assignment and description
| Pin - SO8N | Pin - WLCSP18 | Pin - TSSOP20 | Pin - UFQFPN28 | Pin - LQFP32 / UFQFPN32 | Pin - LQFP48 / UFQFPN48 | Pin name (function upon reset) | Pin type | I/O structure | Current group | Note | Alternate functions | Additional functions |
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| - | - | - | - | - | 1 | PC13 | I/O | FT | N | - | TIM1_BK | TAMP_IN1, RTC_TS, RTC_OUT1, WKUP2 |
| - | - | - | - | - | 2 | PC14- OSC32_IN (PC14) | I/O | FT | N | - | TIM1_BK2 | OSC32_IN |
| 1 | B6 | 2 | 1 | 2 | - | PC14- OSC32_IN (PC14) | I/O | FT | N | - | TIM1_BK2 | OSC32_IN, OSC_IN |
| - | A7 | 3 | 2 | 3 | 3 | PC15- OSC32_OUT (PC15) | I/O | FT | N | - | OSC32_EN, OSC_EN | OSC32_OUT |
| - | - | - | - | - | 4 | VBAT | S | - | - | - | - | VBAT |
| - | - | - | - | - | 5 | VREF+ | S | - | - | - | - | VREF_OUT |
| 2 | C7 | 4 | 3 | 4 | 6 | VDD/VDDA | S | - | - | - | - | - |
| 3 | D6 | 5 | 4 | 5 | 7 | VSS/VSSA | S | - | - | - | - | - |
| - | - | - | - | - | 8 | PF0-OSC_IN (PF0) | I/O | FT | S | - | TIM14_CH1 | OSC_IN |
| - | - | - | - | - | 9 | PF1- OSC_OUT (PF1) | I/O | FT | S | - | OSC_EN | OSC_OUT |
| 4 | E7 | 6 | 5 | 6 | 10 | PF2-NRST | I/O | - | S | - | MCO | NRST |
| 4 | E7 | 7 | 6 | 7 | 11 | PA0 | I/O | FT_a | S | - | SPI2_SCK, USART2_CTS, TIM2_CH1_ETR, LPTIM1_OUT | ADC_IN0, TAMP_IN2,WKUP1 |
| 4 | C5 | 8 | 7 | 8 | 12 | PA1 | I/O | FT_ea | S | - | SPI1_SCK/I2S1_CK, USART2_RTS_DE_CK, TIM2_CH2, I2C1_SMBA, EVENTOUT | ADC_IN1 |
| 4 | E5 | 9 | 8 | 9 | 13 | PA2 | I/O | FT_a | S | - | SPI1_MOSI/I2S1_SD, USART2_TX, TIM2_CH3, LPUART1_TX | ADC_IN2, WKUP4,LSCO |
| - | D4 | 10 | 9 | 10 | 14 | PA3 | I/O | FT_ea | S | - | SPI2_MISO, USART2_RX, TIM2_CH4, LPUART1_RX, EVENTOUT | ADC_IN3 |
Table 12. Pin assignment and description
38
Table 12. Pin assignment and description (continued)
| Pin - SO8N | Pin - WLCSP18 | Pin - TSSOP20 | Pin - UFQFPN28 | Pin - LQFP32 / UFQFPN32 | Pin - LQFP48 / UFQFPN48 | Pin name (function upon reset) | Pin type | I/O structure | Current group | Note | Alternate functions | Additional functions |
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| - | - | - | - | - | 15 | PA4 | I/O | FT_a | S | - | SPI1_NSS/I2S1_WS, SPI2_MOSI, TIM14_CH1, LPTIM2_OUT, EVENTOUT | ADC_IN4, RTC_OUT2 |
| - | D4 | 11 | 10 | 11 | - | PA4 | I/O | FT_a | S | - | SPI1_NSS/I2S1_WS, SPI2_MOSI, TIM14_CH1, LPTIM2_OUT, EVENTOUT | ADC_IN4, TAMP_IN1, RTC_TS, RTC_OUT1, WKUP2 |
| - | C3 | 12 | 11 | 12 | 16 | PA5 | I/O | FT_ea | S | - | SPI1_SCK/I2S1_CK, TIM2_CH1_ETR, LPTIM2_ETR, EVENTOUT | ADC_IN5 |
| - | E3 | 13 | 12 | 13 | 17 | PA6 | I/O | FT_ea | S | - | SPI1_MISO/I2S1_MCK, TIM3_CH1, TIM1_BK, TIM16_CH1, LPUART1_CTS | ADC_IN6 |
| - | D2 | 14 | 13 | 14 | 18 | PA7 | I/O | FT_a | S | - | SPI1_MOSI/I2S1_SD, TIM3_CH2, TIM1_CH1N, TIM14_CH1, TIM17_CH1 | ADC_IN7 |
| 5 | E1 | 15 | 14 | 15 | 19 | PB0 | I/O | FT_ea | S | - | SPI1_NSS/I2S1_WS, TIM3_CH3, TIM1_CH2N, LPTIM1_OUT | ADC_IN8 |
| 5 | E1 | 15 | 15 | 16 | 20 | PB1 | I/O | FT_ea | S | - | TIM14_CH1, TIM3_CH4, TIM1_CH3N, LPTIM2_IN1, LPUART1_RTS_DE, EVENTOUT | ADC_IN9 |
| - | E1 | 15 | - | 17 | 21 | PB2 | I/O | FT_ea | S | - | SPI2_MISO, LPTIM1_OUT, EVENTOUT | ADC_IN10 |
| - | - | - | - | - | 22 | PB10 | I/O | FT_fa | S | - | LPUART1_RX, TIM2_CH3, SPI2_SCK, I2C2_SCL | ADC_IN11 |
| - | - | - | - | - | 23 | PB11 | I/O | FT_fa | S | - | SPI2_MOSI, LPUART1_TX, TIM2_CH4, I2C2_SDA | ADC_IN15 |
| - | - | - | - | - | 24 | PB12 | I/O | FT_a | S | - | SPI2_NSS, LPUART1_RTS_DE, TIM1_BK, EVENTOUT | ADC_IN16 |
| - | - | - | - | - | 25 | PB13 | I/O | FT_f | S | - | SPI2_SCK, LPUART1_CTS, TIM1_CH1N, I2C2_SCL, EVENTOUT | - |
| - | - | - | - | - | 26 | PB14 | I/O | FT_f | S | - | SPI2_MISO, TIM1_CH2N, I2C2_SDA, EVENTOUT | - |
Table 12. Pin assignment and description (continued)
Table 12. Pin assignment and description (continued)
| Pin - SO8N | Pin - WLCSP18 | Pin - TSSOP20 | Pin - UFQFPN28 | Pin - LQFP32 / UFQFPN32 | Pin - LQFP48 / UFQFPN48 | Pin name (function upon reset) | Pin type | I/O structure | Current group | Note | Alternate functions | Additional functions |
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| - | - | - | - | - | 27 | PB15 | I/O | FT | S | - | SPI2_MOSI, TIM1_CH3N, EVENTOUT | RTC_REFIN |
| 5 | E1 | 15 | 16 | 18 | 28 | PA8 | I/O | FT | S | - | MCO, SPI2_NSS, TIM1_CH1, LPTIM2_OUT, EVENTOUT | - |
| - | - | - | - | 19 | 29 | PA9 | I/O | FT_f | S | - | MCO, USART1_TX, TIM1_CH2, SPI2_MISO, I2C1_SCL, EVENTOUT | - |
| - | - | - | 17 | 20 | 30 | PC6 | I/O | FT | S | - | TIM3_CH1, TIM2_CH3 | - |
| - | - | - | - | - | 31 | PC7 | I/O | FT | S | - | TIM3_CH2, TIM2_CH4 | - |
| - | - | - | - | 21 | 32 | PA10 | I/O | FT_f | S | - | SPI2_MOSI, USART1_RX, TIM1_CH3, TIM17_BK, I2C1_SDA, EVENTOUT | - |
| - | - | - | - | - | 33 | PA11 [PA9] | I/O | FT_f | N | - | SPI1_MISO/I2S1_MCK, USART1_CTS, TIM1_CH4, TIM1_BK2, I2C2_SCL | - |
| 5 | C1 | 16 | 18 | 22 | - | PA11 [PA9] | I/O | FT_fa | N | - | SPI1_MISO/I2S1_MCK, USART1_CTS, TIM1_CH4, TIM1_BK2, I2C2_SCL | ADC_IN15 |
| - | - | - | - | - | 34 | PA12 [PA10] | I/O | FT_f | N | - | SPI1_MOSI/I2S1_SD, USART1_RTS_DE_CK, TIM1_ETR, I2S_CKIN, I2C2_SDA | - |
| 6 | B2 | 17 | 19 | 23 | - | PA12 [PA10] | I/O | FT_fa | N | - | SPI1_MOSI/I2S1_SD, USART1_RTS_DE_CK, TIM1_ETR, I2S_CKIN, I2C2_SDA | ADC_IN16 |
| 7 | A1 | 18 | 20 | 24 | 35 | PA13 | I/O | FT_ea | N | - | SWDIO, IR_OUT, EVENTOUT | ADC_IN17 |
| 8 | A3 | 19 | 21 | 25 | 36 | PA14-BOOT0 | I/O | FT_a | N | - | SWCLK, USART2_TX, EVENTOUT | ADC_IN18, BOOT0 |
| 8 | A3 | 19 | 22 | 26 | 37 | PA15 | I/O | FT | N | - | SPI1_NSS/I2S1_WS, USART2_RX, TIM2_CH1_ETR, EVENTOUT | - |
| - | - | - | - | - | 38 | PD0 | I/O | FT | N | - | EVENTOUT, SPI2_NSS, TIM16_CH1 | - |
| - | - | - | - | - | 39 | PD1 | I/O | FT | N | - | EVENTOUT, SPI2_SCK, TIM17_CH1 | - |
Table 12. Pin assignment and description (continued)
38
Table 12. Pin assignment and description (continued)
| Pin - SO8N | Pin - WLCSP18 | Pin - TSSOP20 | Pin - UFQFPN28 | Pin - LQFP32 / UFQFPN32 | Pin - LQFP48 / UFQFPN48 | Pin name (function upon reset) | Pin type | I/O structure | Current group | Note | Alternate functions | Additional - functions |
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| - | - | - | - | - | 40 | PD2 | I/O | FT | N | - | TIM3_ETR, TIM1_CH1N | - |
| - | - | - | - | - | 41 | PD3 | I/O | FT | N | - | USART2_CTS, SPI2_MISO, TIM1_CH2N | - |
| - | B4 | 20 | 23 | 27 | 42 | PB3 | I/O | FT | N | - | SPI1_SCK/I2S1_CK, TIM1_CH2, TIM2_CH2, USART1_RTS_DE_CK, EVENTOUT | - |
| - | B4 | 20 | 24 | 28 | 43 | PB4 | I/O | FT | N | - | SPI1_MISO/I2S1_MCK, TIM3_CH1, USART1_CTS, TIM17_BK, EVENTOUT | - |
| 8 | B4 | 20 | 25 | 29 | 44 | PB5 | I/O | FT | N | - | SPI1_MOSI/I2S1_SD, TIM3_CH2, TIM16_BK, LPTIM1_IN1, I2C1_SMBA | WKUP6 |
| 8 | B4 | 20 | 26 | 30 | 45 | PB6 | I/O | FT_f | N | - | USART1_TX, TIM1_CH3, TIM16_CH1N, SPI2_MISO, LPTIM1_ETR, I2C1_SCL, EVENTOUT | - |
| - | - | - | - | - | 46 | PB7 | I/O | FT_f | N | - | USART1_RX, SPI2_MOSI, TIM17_CH1N, LPTIM1_IN2, I2C1_SDA, EVENTOUT | PVD_IN |
| 1 | A5 | 1 | 27 | 31 | - | PB7 | I/O | FT_fa | N | - | USART1_RX, SPI2_MOSI, TIM17_CH1N, LPTIM1_IN2, I2C1_SDA, EVENTOUT | ADC_IN11, PVD_IN |
| 1 | A5 | 1 | 28 | 32 | 47 | PB8 | I/O | FT_f | N | - | SPI2_SCK, TIM16_CH1, I2C1_SCL, EVENTOUT | - |
| 1 | B6 | 2 | - | 1 | 48 | PB9 | I/O | FT_f | N | - | IR_OUT, TIM17_CH1, SPI2_NSS, I2C1_SDA, EVENTOUT | - |
Table 12. Pin assignment and description (continued)
Table 13. Port A alternate function mapping
| Port | AF0 | AF1 | AF2 | AF3 | AF4 | AF5 | AF6 | AF7 |
|---|---|---|---|---|---|---|---|---|
| PA0 | SPI2_SCK | USART2_CTS | TIM2_CH1_ETR | - | - | LPTIM1_OUT | - | - |
| PA1 | SPI1_SCK/ I2S1_CK | USART2_RTS _DE_CK | TIM2_CH2 | - | - | - | I2C1_SMBA | EVENTOUT |
| PA2 | SPI1_MOSI/ I2S1_SD | USART2_TX | TIM2_CH3 | - | - | - | LPUART1_TX | - |
| PA3 | SPI2_MISO | USART2_RX | TIM2_CH4 | - | - | - | LPUART1_RX | EVENTOUT |
| PA4 | SPI1_NSS/ I2S1_WS | SPI2_MOSI | - | - | TIM14_CH1 | LPTIM2_OUT | - | EVENTOUT |
| PA5 | SPI1_SCK/ I2S1_CK | - | TIM2_CH1_ETR | - | - | LPTIM2_ETR | - | EVENTOUT |
| PA6 | SPI1_MISO/ I2S1_MCK | TIM3_CH1 | TIM1_BKIN | - | - | TIM16_CH1 | LPUART1_CTS | - |
| PA7 | SPI1_MOSI/ I2S1_SD | TIM3_CH2 | TIM1_CH1N | - | TIM14_CH1 | TIM17_CH1 | - | - |
| PA8 | MCO | SPI2_NSS | TIM1_CH1 | - | - | LPTIM2_OUT | - | EVENTOUT |
| PA9 | MCO | USART1_TX | TIM1_CH2 | - | SPI2_MISO | - | I2C1_SCL | EVENTOUT |
| PA10 | SPI2_MOSI | USART1_RX | TIM1_CH3 | - | - | TIM17_BKIN | I2C1_SDA | EVENTOUT |
| PA11 | SPI1_MISO/ I2S1_MCK | USART1_CTS | TIM1_CH4 | - | - | TIM1_BKIN2 | I2C2_SCL | - |
| PA12 | SPI1_MOSI/ I2S1_SD | USART1_RTS _DE_CK | TIM1_ETR | - | - | I2S_CKIN | I2C2_SDA | - |
| PA13 | SWDIO | IR_OUT | - | - | - | - | - | EVENTOUT |
| PA14 | SWCLK | USART2_TX | - | - | - | - | - | EVENTOUT |
| PA15 | SPI1_NSS/ I2S1_WS | USART2_RX | TIM2_CH1_ETR | - | - | - | - | EVENTOUT |
Table 13. Port A alternate function mapping
Table 14. Port B alternate function mapping
| Port | AF0 | AF1 | AF2 | AF3 | AF4 | AF5 | AF6 | AF7 |
|---|---|---|---|---|---|---|---|---|
| PB0 | SPI1_NSS/ I2S1_WS | TIM3_CH3 | TIM1_CH2N | - | - | LPTIM1_OUT | - | - |
| PB1 | TIM14_CH1 | TIM3_CH4 | TIM1_CH3N | - | - | LPTIM2_IN1 | LPUART1_RTS _DE | EVENTOUT |
| PB2 | - | SPI2_MISO | - | - | - | LPTIM1_OUT | - | EVENTOUT |
| PB3 | SPI1_SCK/ I2S1_CK | TIM1_CH2 | TIM2_CH2 | - | USART1_RTS _DE_CK | - | - | EVENTOUT |
| PB4 | SPI1_MISO/ I2S1_MCK | TIM3_CH1 | - | - | USART1_CTS | TIM17_BKIN | - | EVENTOUT |
| PB5 | SPI1_MOSI/ I2S1_SD | TIM3_CH2 | TIM16_BKIN | - | - | LPTIM1_IN1 | I2C1_SMBA | - |
| PB6 | USART1_TX | TIM1_CH3 | TIM16_CH1N | - | SPI2_MISO | LPTIM1_ETR | I2C1_SCL | EVENTOUT |
| PB7 | USART1_RX | SPI2_MOSI | TIM17_CH1N | - | - | LPTIM1_IN2 | I2C1_SDA | EVENTOUT |
| PB8 | - | SPI2_SCK | TIM16_CH1 | - | - | - | I2C1_SCL | EVENTOUT |
| PB9 | IR_OUT | - | TIM17_CH1 | - | - | SPI2_NSS | I2C1_SDA | EVENTOUT |
| PB10 | - | LPUART1_RX | TIM2_CH3 | - | - | SPI2_SCK | I2C2_SCL | - |
| PB11 | SPI2_MOSI | LPUART1_TX | TIM2_CH4 | - | - | - | I2C2_SDA | - |
| PB12 | SPI2_NSS | LPUART1_RTS _DE | TIM1_BKIN | - | - | - | - | EVENTOUT |
| PB13 | SPI2_SCK | LPUART1_CTS | TIM1_CH1N | - | - | - | I2C2_SCL | EVENTOUT |
| PB14 | SPI2_MISO | - | TIM1_CH2N | - | - | - | I2C2_SDA | EVENTOUT |
| PB15 | SPI2_MOSI | - | TIM1_CH3N | - | - | - | - | EVENTOUT |
Table 14. Port B alternate function mapping
STM32G031G8U6 Electrical Characteristics
The definition and values of input/output AC characteristics are given in Figure 23 and Table 54 , respectively.
Unless otherwise specified, the parameters given are derived from tests performed under the ambient temperature and supply voltage conditions summarized in Table 21: General operating conditions .
Table 54. I/O AC characteristics (1)(2)
| Speed | Symbol | Parameter | Conditions | Min | Max | Unit |
|---|---|---|---|---|---|---|
| 00 | Fmax | Maximum frequency | C=50 pF, 2.7 V ≤ V DDIO1 ≤ 3.6 V | - | 2 | MHz |
| 00 | Fmax | Maximum frequency | C=50 pF, 1.6 V ≤ V DDIO1 ≤ 2.7 V | - | 0.35 | MHz |
| 00 | Fmax | Maximum frequency | C=10 pF, 2.7 V ≤ V DDIO1 ≤ 3.6 V | - | 3 | MHz |
| 00 | Fmax | Maximum frequency | C=10 pF, 1.6 V ≤ V DDIO1 ≤ 2.7 V | - | 0.45 | MHz |
| 00 | Tr/Tf | Output rise and fall time | C=50 pF, 2.7 V ≤ V DDIO1 ≤ 3.6 V | - | 100 | ns |
| 00 | Tr/Tf | Output rise and fall time | C=50 pF, 1.6 V ≤ V DDIO1 ≤ 2.7 V | - | 225 | ns |
| 00 | Tr/Tf | Output rise and fall time | C=10 pF, 2.7 V ≤ V DDIO1 ≤ 3.6 V | - | 75 | ns |
| 00 | Tr/Tf | Output rise and fall time | C=10 pF, 1.6 V ≤ V DDIO1 ≤ 2.7 V | - | 150 | ns |
Table 54. I/O AC characteristics (1)(2)
Table 54. I/O AC characteristics (1)(2) (continued)
| Speed | Parameter | Conditions | Min | Max | Unit |
|---|---|---|---|---|---|
| 01 | C=50 pF, 2.7 V ≤ V DDIO1 ≤ 3.6 V | - | 10 | MHz | |
| 01 | Maximum frequency | C=50 pF, 1.6 V ≤ V DDIO1 ≤ 2.7 V | - | 2 | MHz |
| 01 | C=10 pF, 2.7 V ≤ V DDIO1 ≤ 3.6 V | - | 15 | MHz | |
| 01 | C=10 pF, 1.6 V ≤ V DDIO1 ≤ 2.7 V | - | 2.5 | MHz | |
| 01 | Tr/Tf Output rise and fall | C=50 pF, 2.7 V ≤ V DDIO1 ≤ 3.6 V | - | 30 | ns |
| 01 | time | C=50 pF, 1.6 V ≤ V DDIO1 ≤ 2.7 V | - | 60 | ns |
| 01 | Tr/Tf Output rise and fall | C=10 pF, 2.7 V ≤ V DDIO1 ≤ 3.6 V | - | 15 | ns |
| 01 | Tr/Tf Output rise and fall | C=10 pF, 1.6 V ≤ V DDIO1 ≤ 2.7 V | - | 30 | ns |
| 10 | Fmax Maximum frequency | C=50 pF, 2.7 V ≤ V DDIO1 ≤ 3.6 V | - | 30 | MHz |
| 10 | Fmax Maximum frequency | C=50 pF, 1.6 V ≤ V DDIO1 ≤ 2.7 V | - | 15 | MHz |
| 10 | Fmax Maximum frequency | C=10 pF, 2.7 V ≤ V DDIO1 ≤ 3.6 V | - | 60 | MHz |
| 10 | Fmax Maximum frequency | C=10 pF, 1.6 V ≤ V DDIO1 ≤ 2.7 V | - | 30 | MHz |
| 10 | Tr/Tf Output rise and fall | C=50 pF, 2.7 V ≤ V DDIO1 ≤ 3.6 V | - | 11 | ns |
| 10 | time | C=50 pF, 1.6 V ≤ V DDIO1 ≤ 2.7 V | - | 22 | ns |
| 10 | Tr/Tf Output rise and fall | C=10 pF, 2.7 V ≤ V DDIO1 ≤ 3.6 V | - | 4 | ns |
| 10 | Tr/Tf Output rise and fall | C=10 pF, 1.6 V ≤ V DDIO1 ≤ 2.7 V | - | 8 | ns |
| 11 | Fmax Maximum frequency | C=30 pF, 2.7 V ≤ V DDIO1 ≤ 3.6 V | - | 60 | MHz |
| 11 | Fmax Maximum frequency | C=30 pF, 1.6 V ≤ V DDIO1 ≤ 2.7 V | - | 30 | MHz |
| 11 | Fmax Maximum frequency | C=10 pF, 2.7 V ≤ V DDIO1 ≤ 3.6 V | - | 80 (3) | MHz |
| 11 | Fmax Maximum frequency | C=10 pF, 1.6 V ≤ V DDIO1 ≤ 2.7 V | - | 40 | MHz |
| 11 | Tr/Tf Output rise and fall | C=30 pF, 2.7 V ≤ V DDIO1 ≤ 3.6 V | - | 5.5 | ns |
| 11 | time | C=30 pF, 1.6 V ≤ V DDIO1 ≤ 2.7 V | - | 11 | ns |
| 11 | Tr/Tf Output rise and fall | C=10 pF, 2.7 V ≤ V DDIO1 ≤ 3.6 V | - | 2.5 | ns |
| 11 | Tr/Tf Output rise and fall | C=10 pF, 1.6 V ≤ V DDIO1 ≤ 2.7 V | - | 5 | ns |
| Fm+ | Maximum frequency | C=50 pF, 1.6 V ≤ V DDIO1 ≤ 3.6 V | - | 1 | MHz |
| Fm+ | Output fall time (4) | C=50 pF, 1.6 V ≤ V DDIO1 ≤ 3.6 V | - | 5 | ns |
- Guaranteed by design.
- This value represents the I/O capability but the maximum system frequency is limited to 64 MHz.
- The fall time is defined between 70% and 30% of the output waveform, according to I 2 C specification.
92
Figure 23. I/O AC characteristics definition (1)
- Refer to Table 54: I/O AC characteristics .
STM32G031G8U6 Absolute Maximum Ratings
Stresses above the absolute maximum ratings listed in Table 18 , Table 19 and Table 20 may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these conditions is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability.
Table 18. Voltage characteristics
| Symbol | Ratings | Min | Max | Unit |
|---|---|---|---|---|
| V DD - V SS V BAT - V SS | External supply voltage | -0.3 | 4.0 | |
| V IN (1) | Input voltage on FT_xx | V SS - 0.3 | V DD + 4.0 (2) | V |
| V IN (1) | Input voltage on any other pin | V SS - 0.3 | 4.0 |
Table 19. Current characteristics
| Symbol | Ratings | Max | Unit |
|---|---|---|---|
| I VDD/VDDA | Current into VDD/VDDA power pin (source) (1) | 100 | mA |
| I VSS/VSSA | Current out of VSS/VSSA ground pin (sink) (1) | 100 | mA |
| I IO(PIN) | Output current sunk by any I/O and control pin except FT_f | 15 | mA |
| I IO(PIN) | Output current sunk by any FT_f pin | 20 | mA |
| I IO(PIN) | Output current sourced by any I/O and control pin | 15 | mA |
| ∑ I IO(PIN) | Total output current sunk by sum of all I/Os and control pins (2) | 80 | mA |
| ∑ I IO(PIN) | Total output current sourced by sum of all I/Os and control pins (2) | 80 | mA |
| I INJ(PIN) (3) | Injected current on a FT_xx pin | -5 / NA (4) | mA |
| ∑ |I INJ(PIN) | | Total injected current (sum of all I/Os and control pins) (5) | 25 | mA |
- A positive injection is induced by V IN > V DDIOx while a negative injection is induced by V IN < V SS . I INJ(PIN) must never be exceeded. Refer also to Table 18: Voltage characteristics for the maximum allowed input voltage values.
- Positive injection is not possible on these I/Os and does not occur for input voltages lower than the specified maximum value.
- When several inputs are submitted to a current injection, the maximum ∑ |I INJ(PIN) | is the absolute sum of the negative injected currents (instantaneous values).
Table 20. Thermal characteristics
| Symbol | Ratings | Value | Unit |
|---|---|---|---|
| T STG | Storage temperature range | -65 to +150 | °C |
| T J | Maximum junction temperature | 150 | °C |
Table 20. Thermal characteristics
STM32G031G8U6 Thermal Information
The operating junction temperature T J must never exceed the maximum given in Table 21: General operating conditions
The maximum junction temperature in °C that the device can reach if respecting the operating conditions, is:
$$T_J(max) = T_A(max) + P_D(max) \times \Theta_{JA}$$
STM32G031G8U6 Package Information
In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK ® packages, depending on their level of environmental compliance. ECOPACK ® specifications, grade definitions and product status are available at: www.st.com . ECOPACK ® is an ST trademark.
Variants on the same datasheet
These parts have exact links to the same datasheet. They are candidates to compare, not verified drop-in replacements; check package, pinout and electrical limits.
| Part Number | Manufacturer | Package |
|---|---|---|
| STM32G031K8 | STMicroelectronics | — |
| STM32G031K8T6 | STMicroelectronics | 32-LQFP |
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All Integrated Circuits datasheetsAll STMicroelectronics datasheets (808)
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