STM32F746XX
STM32F745xx STM32F746xx
Overview
Part: STM32F745xx STM32F746xx
Type: ARM Cortex-M7 32-bit MCU with FPU
Key Specs:
- CPU Frequency: up to 216 MHz
- Performance: 462 DMIPS / 2.14 DMIPS/MHz (Dhrystone 2.1)
- Flash Memory: Up to 1MB
- SRAM: 320KB + 16KB + 4KB
- Application Supply Voltage: 1.7 V to 3.6 V
- ADC: 3x 12-bit, 2.4 MSPS (up to 7.2 MSPS in triple interleaved mode)
- Timers: Up to 18 (thirteen 16-bit, two 32-bit, one low-power 16-bit)
- I/O Ports: Up to 168
Features:
- Core: ARM 32-bit Cortex-M7 CPU with FPU, adaptive real-time accelerator (ART Accelerator™) and L1-cache: 4KB data cache and 4KB instruction cache, MPU, and DSP instructions
- 1024 bytes of OTP memory
- Flexible external memory controller with up to 32-bit data bus: SRAM, PSRAM, SDRAM/LPSDR SDRAM, NOR/NAND memories
- Dual mode Quad SPI
- LCD parallel interface, 8080/6800 modes
- LCD-TFT controller up to XGA resolution with dedicated Chrom-ART Accelerator™ (DMA2D)
- Clock, reset and supply management: POR, PDR, PVD and BOR, dedicated USB power, 4-to-26 MHz crystal oscillator, internal 16 MHz factory-trimmed RC (1% accuracy), 32 kHz oscillator for RTC with calibration, internal 32 kHz RC with calibration
- Low-power: Sleep, Stop and Standby modes, VBAT supply for RTC, 32x32 bit backup registers + 4KB backup SRAM
- 2x 12-bit D/A converters
- Up to 18 timers: up to thirteen 16-bit (
Features
- Core: ARM® 32-bit Cortex®-M7 CPU with FPU, adaptive real-time accelerator (ART Accelerator™) and L1-cache: 4KB data cache and 4KB instruction cache, allowing 0-wait state execution from embedded Flash memory and external memories, frequency up to 216 MHz, MPU, 462 DMIPS/2.14 DMIPS/MHz (Dhrystone 2.1), and DSP instructions.
- Memories
- Up to 1MB of Flash memory
- 1024 bytes of OTP memory
- SRAM: 320KB (including 64KB of data TCM RAM for critical real time data) + 16KB of instruction TCM RAM (for critical real time routines) + 4KB of backup SRAM (available in the lowest power modes)
- Flexible external memory controller with up to 32-bit data bus: SRAM, PSRAM, SDRAM/LPSDR SDRAM, NOR/NAND memories
- Dual mode Quad SPI
- LCD parallel interface, 8080/6800 modes
- LCD-TFT controller up to XGA resolution with dedicated Chrom-ART Accelerator™ for enhanced graphic content creation (DMA2D)
- Clock, reset and supply management
- 1.7 V to 3.6 V application supply and I/Os
- POR, PDR, PVD and BOR
- Dedicated USB power
- 4-to-26 MHz crystal oscillator
- Internal 16 MHz factory-trimmed RC (1% accuracy)
- 32 kHz oscillator for RTC with calibration
- Internal 32 kHz RC with calibration
- Low-power
- Sleep, Stop and Standby modes
- VBAT supply for RTC, 32×32 bit backup registers + 4KB backup SRAM
- 3×12-bit, 2.4 MSPS ADC: up to 24 channels and 7.2 MSPS in triple interleaved mode
- 2×12-bit D/A converters
- Up to 18 timers: up to thirteen 16-bit (1x lowpower 16-bit timer available in Stop mode) and two 32-bit timers, each with up to 4 IC/OC/PWM or pulse counter and quadrature (incremental) encoder input. All 15 timers running up to 216 MHz. 2x watchdogs, SysTick timer
LQFP144 (20x20 mm) LQFP176 (24x24 mm) UFBGA176 (10x10 mm)
- WLCSP143 (4.5x5.8 mm)
- General-purpose DMA: 16-stream DMA controller with FIFOs and burst support TFBGA216 (13x13 mm) LQFP208 (28x28 mm)
- Debug mode
- SWD & JTAG interfaces – Cortex®-M7 Trace Macrocell™
- Up to 168 I/O ports with interrupt capability
- Up to 164 fast I/Os up to 108 MHz – Up to 166 5 V-tolerant I/Os
- Up to 25 communication interfaces
- Up to 4× I2C interfaces (SMBus/PMBus)
- Up to 4 USARTs/4 UARTs (27 Mbit/s, ISO7816 interface, LIN, IrDA, modem control)
- Up to 6 SPIs (up to 50 Mbits/s), 3 with muxed simplex I2S for audio class accuracy via internal audio PLL or external clock
- 2 x SAIs (serial audio interface)
- 2 × CANs (2.0B active) and SDMMC interface
- SPDIFRX interface
- HDMI-CEC
- Advanced connectivity
- USB 2.0 full-speed device/host/OTG controller with on-chip PHY – USB 2.0 high-speed/full-speed device/host/OTG controller with dedicated
- DMA, on-chip full-speed PHY and ULPI – 10/100 Ethernet MAC with dedicated DMA:
- supports IEEE 1588v2 hardware, MII/RMII
- 8- to 14-bit parallel camera interface up to 54 Mbytes/s
- True random number generator
- CRC calculation unit
- RTC: subsecond accuracy, hardware calendar
- • 96-bit unique ID
Pin Configuration
Figure 11. STM32F74xVx LQFP100 pinout
Figure 12. STM32F74xZx WLCSP143 ballout
The above figure shows the package bump view.
Figure 13. STM32F74xZx LQFP144 pinout
- The above figure shows the package top view.
Electrical Characteristics
- When analog peripheral blocks such as ADCs, DACs, HSE, LSE, HSI, or LSI are ON, an additional power consumption should be considered.
| Typ | |||
|---|---|---|---|
| Symbol | Parameter | Conditions | |
| TA = 25 °C | |||
| IDD_STOP_NM (normal mode) | Supply current in Stop mode, main regulator in | Flash memory in Stop mode, all oscillators OFF, no IWDG | 0.45 |
| Run mode | Flash memory in Deep power down mode, all oscillators OFF | 0.40 | |
| Supply current in Stop mode, main regulator in Low-power mode | Flash memory in Stop mode, all oscillators OFF, no IWDG | 0.32 | |
| Flash memory in Deep power down mode, all oscillators OFF, no IWDG | 0.27 | ||
| IDD_STOP_UDM (under-drive mode) | Supply current in Stop mode, main regulator in | Regulator in Run mode, Flash memory in Deep power down mode, all oscillators OFF, no IWDG | 0.15 |
| Low voltage and under drive modes | Regulator in Low-power mode, Flash memory in Deep power down mode, all oscillators OFF, no IWDG | 0.10 | |
| Table 32. Typical and maximum current consumptions in Stop mode | |||
| ----------------------------------------------------------------- | -- | -- |
| Typ(1) | Max(2) | ||||||
|---|---|---|---|---|---|---|---|
| Symbol | Parameter | Conditions | TA = 25 °C | TA = 25 °C | TA = 85 °C | ||
| VDD = 1.7 V | VDD= 2.4 V | VDD = 3.3 V | VDD = 3.3 V | ||||
| Backup SRAM OFF, RTC and LSE OFF | 1.7 | 1.9 | 2.3 | 5(3) | 15(3) | ||
| Backup SRAM ON, RTC and LSE OFF | 2.4 | 2.6 | 3.0 | 6(3) | 20(3) | ||
| Supply current in Standby mode | Backup SRAM OFF, RTC ON and LSE in low drive mode | 2.1 | 2.4 | 2.9 | 6 | 19 | |
| Backup SRAM OFF, RTC ON and LSE in medium low drive mode | 2.1 | 2.4 | 2.9 | 6 | 19 | ||
| IDD_STBY | Backup SRAM OFF, RTC ON and LSE in medium high drive mode | 2.2 | 2.5 | 3.0 | 7 | 20 | |
| Backup SRAM OFF, RTC ON and LSE in high drive mode | 2.3 | 2.6 | 3.1 | 7 | 20 | ||
| Backup SRAM ON, RTC ON and LSE in low drive mode | 2.7 | 3.0 | 3.6 | 8 | 23 | ||
| Backup SRAM ON, RTC ON and LSE in Medium low drive mode | 2.7 | 3.0 | 3.6 | 8 | 23 | ||
| Backup SRAM ON, RTC ON and LSE in Medium high drive mode | 2.8 | 3.1 | 3.7 | 8 | 24 | ||
| Backup SRAM ON, RTC ON and LSE in High drive mode | 2.9 | 3.2 | 3.8 | 8 | 25 |
Absolute Maximum Ratings
Stresses above the absolute maximum ratings listed in Table 15: Voltage characteristics, Table 16: Current characteristics, and Table 17: Thermal characteristics may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these conditions is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability.
| Symbol | Ratings | Min | Max | Unit |
|---|---|---|---|---|
| VDD–VSS | External main supply voltage (including VDDA, VDD, VBAT and VDDUSB) (1) | -0.3 | 4.0 | V |
| VIN | Input voltage on FT pins(2) | VSS - 0.3 | VDD+4.0 | V |
| Input voltage on TTa pins | VSS - 0.3 | 4.0 | ||
| Input voltage on any other pin | VSS - 0.3 | 4.0 | ||
| Input voltage on BOOT pin | VSS | 9.0 | ||
| ΔVDDx | Variations between different VDD power pins | - | 50 | mV |
| VSSX -VSS | Variations between all the different ground pins | - | 50 | mV |
| VESD(HBM) | Electrostatic discharge voltage (human body model) | see Section 5.3.15: Absolute maximum ratings (electrical sensitivity) | - |
Table 15. Voltage characteristics
-
All main power (VDD, VDDA, VDDUSB) and ground (VSS, VSSA) pins must always be connected to the external power supply, in the permitted range.
-
VIN maximum value must always be respected. Refer to Table 16 for the values of the maximum allowed injected current.
| Symbol | Ratings | Max. | Unit |
|---|---|---|---|
| ΣIVDD | Total current into sum of all VDD_x power lines (source)(1) | 320 | mA |
| Σ IVSS | Total current out of sum of all VSS_x ground lines (sink)(1) | - 320 | |
| Σ IVDDUSB | Total current into VDDUSB power line (source) | 25 | |
| IVDD | Maximum current into each VDD_x power line (source)(1) | 100 | |
| IVSS | Maximum current out of each VSS_x ground line (sink)(1) | - 100 | |
| IIO | Output current sunk by any I/O and control pin | 25 | mA |
| Output current sourced by any I/Os and control pin | - 25 | ||
| ΣIIO | Total output current sunk by sum of all I/O and control pins (2) | 120 | |
| Total output current sunk by sum of all USB I/Os | 25 | ||
| Total output current sourced by sum of all I/Os and control pins(2) | - 120 | ||
| IINJ(PIN) | Injected current on FT, FTf, RST and B pins (3) | - 5/+0 | |
| Injected current on TTa pins(4) | ±5 | ||
| ΣIINJ(PIN)(4) | Total injected current (sum of all I/O and control pins)(5) | ±25 |
-
This current consumption must be correctly distributed over all I/Os and control pins. The total output current must not be sunk/sourced between two consecutive power supply pins referring to high pin count LQFP packages.
-
Positive injection is not possible on these I/Os and does not occur for input voltages lower than the specified maximum value.
-
A positive injection is induced by VIN>VDDA while a negative injection is induced by VIN<VSS. IINJ(PIN) must never be exceeded. Refer to Table 15: Voltage characteristics for the values of the maximum allowed input voltage.
-
When several inputs are submitted to a current injection, the maximum ΣIINJ(PIN) is the absolute sum of the positive and negative injected currents (instantaneous values).
| Symbol | Ratings | Value | Unit |
|---|---|---|---|
| TSTG | Storage temperature range | - 65 to +150 | °C |
| TJ | Maximum junction temperature | 125 | °C |
Thermal Information
The maximum chip-junction temperature, TJ max, in degrees Celsius, may be calculated using the following equation:
TJ max = TA max + (PD max x ΘJA)
Where:
- TA max is the maximum ambient temperature in ° C,
- ΘJA is the package junction-to-ambient thermal resistance, in ° C/W,
- PD max is the sum of PINT max and PI/O max (PD max = PINT max + PI/Omax),
- PINT max is the product of IDD and VDD, expressed in Watts. This is the maximum chip internal power.
PI/O max represents the maximum power dissipation on output pins where:
PI/O max = Σ (VOL × IOL) + Σ((VDD – VOH) × IOH),
taking into account the actual VOL / IOL and VOH / IOH of the I/Os at low and high level in the application.
| Symbol | Parameter | Value | Unit |
|---|---|---|---|
| ΘJA | Thermal resistance junction-ambient LQFP100 - 14 × 14 mm / 0.5 mm pitch | 43 | |
| Thermal resistance junction-ambient WLCSP143 | 31.2 | ||
| Thermal resistance junction-ambient LQFP144 - 20 × 20 mm / 0.5 mm pitch | 40 | ||
| Thermal resistance junction-ambient LQFP176 - 24 × 24 mm / 0.5 mm pitch | 38 | °C/W | |
| Thermal resistance junction-ambient LQFP208 - 28 × 28 mm / 0.5 mm pitch | 19 | ||
| Thermal resistance junction-ambient UFBGA176 - 10× 10 mm / 0.5 mm pitch | 39 | ||
| Thermal resistance junction-ambient TFBGA216 - 13 × 13 mm / 0.8 mm pitch | 29 |
Related Variants
The following components are covered by the same datasheet.
| Part Number | Manufacturer | Package |
|---|---|---|
| STM32F746BE | — | — |
| STM32F746BG | — | — |
| STM32F746BX | — | — |
| STM32F746IE | — | — |
| STM32F746IG | — | — |
| STM32F746IX | — | — |
| STM32F746NE | — | — |
| STM32F746NG | — | — |
| STM32F746NX | — | — |
| STM32F746VE | — | — |
| STM32F746VG | — | — |
| STM32F746VX | — | — |
| STM32F746ZE | — | — |
| STM32F746ZG | — | — |
| STM32F746ZGT6 | — | — |
| STM32F746ZX | — | — |
Get structured datasheet data via API
Get started free