Part: STM32F745xx STM32F746xx

Type: ARM Cortex-M7 32-bit MCU with FPU

Description: ARM Cortex-M7 32-bit MCU with FPU, operating up to 216 MHz, delivering 462 DMIPS, featuring up to 1MB Flash memory, 320KB+16KB+4KB RAM, USB OTG HS/FS, Ethernet, LCD-TFT controller, and extensive communication interfaces.

Operating Conditions:

• Supply voltage: 1.7 V to 3.6 V
• Max clock frequency: 216 MHz

Key Specs:

• Core: ARM 32-bit Cortex-M7 CPU with FPU
• Max CPU Frequency: 216 MHz
• Performance: 462 DMIPS / 2.14 DMIPS/MHz
• Flash Memory: Up to 1MB
• SRAM: 320KB (data TCM), 16KB (instruction TCM), 4KB (backup)
• ADCs: 3x 12-bit, 2.4 MSPS (up to 7.2 MSPS in triple interleaved mode)
• DACs: 2x 12-bit
• I/O Ports: Up to 168, with up to 166 5 V-tolerant

Features:

• ART Accelerator™ and L1-cache (4KB data, 4KB instruction)
• Flexible external memory controller (SRAM, PSRAM, SDRAM/LPSDR SDRAM, NOR/NAND)
• Dual mode Quad SPI
• LCD-TFT controller up to XGA resolution with Chrom-ART Accelerator™ (DMA2D)
• USB 2.0 full-speed/high-speed device/host/OTG controllers
• 10/100 Ethernet MAC with dedicated DMA
• Up to 4 USARTs/4 UARTs, 4 I2C, 6 SPIs, 2 CANs, SDMMC, 2 SAIs, SPDIFRX
• True random number generator, CRC calculation unit
• RTC with subsecond accuracy
• 16-stream DMA controller with FIFOs and burst support
• Debug mode: Cortex-M7 Trace Macrocell™, SWD & JTAG interfaces

Package:

• UFBGA176 (10x10 mm)
• TFBGA216 (13x13 mm)
• WLCSP143 (4.5x5.8 mm)
• LQFP100 (14x14 mm)
• LQFP144 (20x20 mm)
• LQFP176 (24x24 mm)
• LQFP208 (28x28 mm)

• Core: ARM ® 32-bit Cortex ® -M7 CPU with FPU, adaptive real-time accelerator (ART Accelerator™) and L1-cache: 4KB data cache and 4KB instruction cache, allowing 0-wait state execution from embedded Flash memory and external memories, frequency up to 216 MHz, MPU, 462 DMIPS/2.14 DMIPS/MHz (Dhrystone 2.1), and DSP instructions.
• -Up to 1MB of Flash memory
• Memories
• -1024 bytes of OTP memory
• -Flexible external memory controller with up to 32-bit data bus: SRAM, PSRAM, SDRAM/LPSDR SDRAM, NOR/NAND memories
• -SRAM: 320KB (including 64KB of data TCM RAM for critical real time data) + 16KB of instruction TCM RAM (for critical real time routines) + 4KB of backup SRAM (available in the lowest power modes)
• Dual mode Quad SPI
• LCD-TFT controller up to XGA resolution with dedicated Chrom-ART Accelerator™ for enhanced graphic content creation (DMA2D)
• LCD parallel interface, 8080/6800 modes
• Clock, reset and supply management
• -POR, PDR, PVD and BOR
• -1.7 V to 3.6 V application supply and I/Os
• -Dedicated USB power
• -Internal 16 MHz factory-trimmed RC (1% accuracy)
• -4-to-26 MHz crystal oscillator
• -32 kHz oscillator for RTC with calibration
• -Internal 32 kHz RC with calibration
• Low-power
• -Sleep, Stop and Standby modes
• -VBAT supply for RTC, 32×32 bit backup registers + 4KB backup SRAM
• 2×12-bit D/A converters
• 96-bit unique ID
• 3×12-bit, 2.4 MSPS ADC: up to 24 channels and 7.2 MSPS in triple interleaved mode
• Up to 18 timers: up to thirteen 16-bit (1x lowpower 16-bit timer available in Stop mode) and two 32-bit timers, each with up to 4 IC/OC/PWM or pulse counter and quadrature (incremental) encoder input. All 15 timers running up to 216 MHz. 2x watchdogs, SysTick timer

STM32F746IE LQFP176 Pinout

Unless otherwise specified, the parameters given in Table 63 are derived from tests performed under the ambient temperature, f PCLK2 frequency and V DDA supply voltage conditions summarized in Table 18 .

Table 63. ADC characteristics

Table 63. ADC characteristics

Table 63. ADC characteristics (continued)

Table 63. ADC characteristics (continued)

198

Table 63. ADC characteristics (continued)

1. Based on characterization, not tested in production.
2. VREF+ is internally connected to V DDA and V REFis internally connected to V SSA .
3. RADC maximum value is given for V DD =1.7 V, and minimum value for V DD =3.3 V.
4. For external triggers, a delay of 1/f PCLK2 must be added to the latency specified in Table 63 .

Stresses above the absolute maximum ratings listed in Table 15: Voltage characteristics , Table 16: Current characteristics , and Table 17: Thermal characteristics may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these conditions is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability.

Table 15. Voltage characteristics

198

Table 16. Current characteristics

1. A positive injection is induced by V IN >VDDA while a negative injection is induced by V IN <VSS . I INJ(PIN) must never be exceeded. Refer to Table 15: Voltage characteristics for the values of the maximum allowed input voltage.

2. When several inputs are submitted to a current injection, the maximum Σ I INJ(PIN) is the absolute sum of the positive and negative injected currents (instantaneous values).

Table 17. Thermal characteristics

Table 17. Thermal characteristics

The maximum chip-junction temperature, T J max, in degrees Celsius, may be calculated using the following equation:

T J max = T A max + (P D max x Θ JA )

In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK ® packages, depending on their level of environmental compliance. ECOPACK ® specifications, grade definitions and product status are available at: www.st.com . ECOPACK ® is an ST trademark.