RT9193

Part: Richtek RT9193

Type: 300mA, Ultra-Low Noise, Ultra-Fast CMOS LDO Regulator

Key Specs:

• Output Current: 300mA
• Dropout Voltage: 220mV @ 300mA
• Quiescent Current: 9µA (Typ)
• Shutdown Current: < 0.01µA
• Operating Voltage Range: 2.5V to 5.5V
• Start-Up Time: 50µs (Typ)
• Output Noise Voltage: 100 uVRMS (Typ, 10Hz to 100kHz)
• Power Supply Rejection Ratio (PSRR): -70 dB (Typ, 100Hz), -50 dB (Typ, 10kHz)

Features:

• Ultra Low Noise for RF Application
• Ultra Fast Response in Line/Load Transient
• Quick Start-Up (Typically 50us)
• < 0.01uA Standby Current When Shutdown
• Low Dropout : 220mV @ 300mA
• Wide Operating Voltage Ranges : 2.5V to 5.5V
• TTL-Logic-Controlled Shutdown Input
• Low Temperature Coefficient
• Current Limiting Protection
• Thermal Shutdown Protection
• Only 1µF Output Capacitor Required for Stability
• High Power Supply Rejection Ratio
• Custom Voltage Available
• RoHS Compliant and 100% Lead (Pb)-Free

Applications:

• CDMA/GSM Cellular Handsets
• Battery-Powered Equipment
• Laptop, Palmtops, Notebook Computers
• Hand-Held Instruments
• PCMCIA Cards
• Portable Information Appliances

Package:

• SC-70-5
• SOT-23-5
• TSOT-23-5
• WDFN-6L: 2x2
• MSOP-8

• ^z Ultra Low Noise for RF Application
• ^z Ultra Fast Response in Line/Load Transient
• ^z Quick Start-Up (Typically 50us)
• ^z < 0.01uA Standby Current When Shutdown
• ^z Low Dropout : 220mV @ 300mA
• ^z Wide Operating Voltage Ranges : 2.5V to 5.5V
• ^z TTL-Logic-Controlled Shutdown Input
• ^z Low Temperature Coefficient
• ^z Current Limiting Protection
• ^z Thermal Shutdown Protection
• ^z Only 1μF Output Capacitor Required for Stability
• ^z High Power Supply Rejection Ratio
• ^z Custom Voltage Available
• ^z RoHS Compliant and 100% Lead (Pb)-Free

• ^z CDMA/GSM Cellular Handsets
• ^z Battery-Powered Equipment
• ^z Laptop, Palmtops, Notebook Computers
• ^z Hand-Held Instruments
• ^z PCMCIA Cards
• ^z Portable Information Appliances

(VIN = VOUT + 1V, CIN = COUT = 1uF, CBP = 22nF, TA = 25°C, unless otherwise specified)

• Note 1. Stresses listed as the above "Absolute Maximum Ratings" may cause permanent damage to the device. These are for stress ratings. Functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may remain possibility to affect device reliability.
• Note 2. θJA is measured in the natural convection at TA = 25°C on a low effective thermal conductivity test board (Single Layer, 1S) of JEDEC 51-3 thermal measurement standard.
• Note 3. Devices are ESD sensitive. Handling precaution is recommended.
• Note 4. The device is not guaranteed to function outside its operating conditions.
• Note 5. The dropout voltage is defined as VIN - VOUT, which is measured when VOUT is VOUT(NORMAL) - 100mV.

Typical Operating Characteristics

EN Pin Shoutdown Threshold vs. Temperature

Time (50μs/Div) VIN = 4V to 5V COUT = 1uF Line Transient Response Output Voltage Deviation (mV) Input Voltage Deviation (V) RT9193-25xB ILoad = 1mA ⁶ 5 4 10 0 -10

Applications Information

Like any low dropout regulator, the external capacitors used with the RT9193 must be carefully selected for regulator stability and performance. Using a capacitor whose value is > 1μF on the RT9193 input and the amount of capacitance can be increased without limit. The input capacitor must be located a distance of not more than 0.5 inch from the input pin of the IC and returned to a clean analog ground. Any good quality ceramic or tantalum can be used for this capacitor. The capacitor with larger value and lower ESR (equivalent series resistance) provides better PSRR and line-transient response. The output capacitor must meet both requirements for minimum amount of capacitance and ESR in all LDOs application. The RT9193 is designed specifically to work with low ESR ceramic output capacitor in space-saving and performance consideration. Using a ceramic capacitor whose value is at least 1μF with ESR is > 25mΩ on the RT9193 output ensures stability. The RT9193 still works well with output capacitor of other types due to the wide stable ESR range. Figure 1 shows the curves of allowable ESR range as a function of load current for various output capacitor values. Output capacitor of larger capacitance can reduce noise and improve load transient response, stability, and PSRR. The output capacitor should be located not more than 0.5 inch from the VOUT pin of the RT9193 and returned to a clean analog ground.

Bypass Capacitor and Low Noise

Connecting a 22nF between the BP pin and GND pin significantly reduces noise on the regulator output, it is critical that the capacitor connection between the BP pin and GND pin be direct and PCB traces should be as short as possible. There is a relationship between the bypass capacitor value and the LDO regulator turn on time. DC leakage on this pin can affect the LDO regulator output noise and voltage regulation performance.

Enable Function

The RT9193 features an LDO regulator enable/disable function. To assure the LDO regulator will switch on, the EN turn on control level must be greater than 1.2 volts. The LDO regulator will go into the shutdown mode when the voltage on the EN pin falls below 0.4 volts. For to protecting the system, the RT9193 have a quick-discharge function. If the enable function is not needed in a specific application, it may be tied to VIN to keep the LDO regulator in a continuously on state.

Thermal Considerations

Thermal protection limits power dissipation in RT9193. When the operation junction temperature exceeds 165°C, the OTP circuit starts the thermal shutdown function turn the pass element off. The pass element turn on again after the junction temperature cools by 30°C.

For continue operation, do not exceed absolute maximum operation junction temperature 125°C. The power dissipation definition in device is :

$mathsf{P}_mathsf{D} = (mathsf{V}_mathsf{IN} - mathsf{V}_mathsf{Ocupmathsf{T}}) × mathsf{I}_mathsf{Ocupmathsf{T}} + mathsf{V}_mathsf{IN} × mathsf{I}_mathsf{O}$

The maximum power dissipation depends on the thermal resistance of IC package, PCB layout, the rate of surroundings airflow and temperature difference between junction to ambient. The maximum power dissipation can be calculated by following formula :

$mathbf{P_{D(MAmathcal{K})}} = (mathsf{T_{J(MAmathcal{K})}} - mathsf{T_A}) / Θ^mathsf{T_A}$

Where TJ(MAX) is the maximum operation junction temperature 125°C, TA is the ambient temperature and the θJA is the junction to ambient thermal resistance.

For recommended operating conditions specification of RT9193, where TJ(MAX) is the maximum junction temperature of the die (125°C) and TA is the maximum ambient temperature. The junction to ambient thermal resistance (θJA is layout dependent) for TSOT-23-5/ SOT-23-5 package is 250°C/W, SC-70-5 package is 333°C/W, WDFN-6L 2x2 package is 165°C/W and MSOP-8 package is 160°C/W on standard JEDEC 51-3 thermal test board. The maximum power dissipation at TA = 25°C can be calculated by following formula :

PD(MAX) = (125°C - 25°C) / 333 = 300mW for

SC-70-5

PD(MAX) = (125°C - 25°C) / 250 = 400mW for

TSOT-23-5/SOT-23-5

PD(MAX) = (125°C - 25°C) / 165 = 606mW for

WDFN-6L 2x2

PD(MAX) = (125°C -25°C) / 160 = 625mW for

MSOP-8

The maximum power dissipation depends on operating ambient temperature for fixed TJ(MAX) and thermal resistance θJA. For RT9193 packages, the Figure 2 of derating curves allows the designer to see the effect of rising ambient temperature on the maximum power allowed.

Figure 2. Derating Curve for Packages

Outline Dimension

TSOT-23-5 Surface Mount Package

SOT-23-5 Surface Mount Package

DETAILA Pin #1 ID and Tie Bar Mark Options

Note : The configuration of the Pin #1 identifier is optional, but must be located within the zone indicated.

W-Type 6L DFN 2x2 Package

8-Lead MSOP Plastic Package

Richtek Technology Corporation

Headquarter 5F, No. 20, Taiyuen Street, Chupei City Hsinchu, Taiwan, R.O.C. Tel: (8863)5526789 Fax: (8863)5526611

Richtek Technology Corporation

Taipei Office (Marketing) 8F, No. 137, Lane 235, Paochiao Road, Hsintien City Taipei County, Taiwan, R.O.C. Tel: (8862)89191466 Fax: (8862)89191465 Email: marketing@richtek.com

Information that is provided by Richtek Technology Corporation is believed to be accurate and reliable. Richtek reserves the right to make any change in circuit design, specification or other related things if necessary without notice at any time. No third party intellectual property infringement of the applications should be guaranteed by users when integrating Richtek products into any application. No legal responsibility for any said applications is assumed by Richtek.

• z Power Dissipation, PD @ TA
  = 25°C
• SC-70-5 ---------------------------------------------------------------------------------------------------------------------- 300mW
• TSOT-23-5/SOT-23-5------------------------------------------------------------------------------------------------------ 400mW
• WDFN-6L 2x2 -------------------------------------------------------------------------------------------------------------- 606mW
• MSOP-8 --------------------------------------------------------------------------------------------------------------------- 625mW
• z Package Thermal Resistance (Note 2)
• SOT-70-5, θJA
  --------------------------------------------------------------------------------------------------------------- 333°C/W
• TSOT-23-5/SOT-23-5, θJA
  ------------------------------------------------------------------------------------------------ 250°C/W
• TSOT-23-5/SOT-23-5, θJC
  ----------------------------------------------------------------------------------------------- 25°C/W
• WDFN-6L 2x2, θJA
  --------------------------------------------------------------------------------------------------------- 165°C/W
• WDFN-6L 2x2, θJC
  -------------------------------------------------------------------------------------------------------- 20°C/W
• MSOP-8 θJA
  ---------------------------------------------------------------------------------------------------------------- 160°C/W
• MSOP-8 θJC
  ---------------------------------------------------------------------------------------------------------------- 55°C/W
• z Junction Temperature ----------------------------------------------------------------------------------------------------- 150°C
• z Lead Temperature (Soldering, 10 sec.) ------------------------------------------------------------------------------- 260°C
• z Storage Temperature Range -------------------------------------------------------------------------------------------- -65°C to 150°C
• z ESD Susceptibility (Note 3)
• HBM (Human Body Mode) ---------------------------------------------------------------------------------------------- 2kV
• MM (Machine Mode) ------------------------------------------------------------------------------------------------------ 200V

Recommended Operating Conditions (Note 4)

Thermal protection limits power dissipation in RT9193. When the operation junction temperature exceeds 165°C, the OTP circuit starts the thermal shutdown function turn the pass element off. The pass element turn on again after the junction temperature cools by 30°C.

For continue operation, do not exceed absolute maximum operation junction temperature 125°C. The power dissipation definition in device is :

$mathsf{P}_mathsf{D} = (mathsf{V}_mathsf{IN} - mathsf{V}_mathsf{Ocupmathsf{T}}) × mathsf{I}_mathsf{Ocupmathsf{T}} + mathsf{V}_mathsf{IN} × mathsf{I}_mathsf{O}$

The maximum power dissipation depends on the thermal resistance of IC package, PCB layout, the rate of surroundings airflow and temperature difference between junction to ambient. The maximum power dissipation can be calculated by following formula :

$mathbf{P_{D(MAmathcal{K})}} = (mathsf{T_{J(MAmathcal{K})}} - mathsf{T_A}) / Θ^mathsf{T_A}$

Where TJ(MAX) is the maximum operation junction temperature 125°C, TA is the ambient temperature and the θJA is the junction to ambient thermal resistance.

For recommended operating conditions specification of RT9193, where TJ(MAX) is the maximum junction temperature of the die (125°C) and TA is the maximum ambient temperature. The junction to ambient thermal resistance (θJA is layout dependent) for TSOT-23-5/ SOT-23-5 package is 250°C/W, SC-70-5 package is 333°C/W, WDFN-6L 2x2 package is 165°C/W and MSOP-8 package is 160°C/W on standard JEDEC 51-3 thermal test board. The maximum power dissipation at TA = 25°C can be calculated by following formula :

PD(MAX) = (125°C - 25°C) / 333 = 300mW for

SC-70-5

PD(MAX) = (125°C - 25°C) / 250 = 400mW for

TSOT-23-5/SOT-23-5

PD(MAX) = (125°C - 25°C) / 165 = 606mW for

WDFN-6L 2x2

PD(MAX) = (125°C -25°C) / 160 = 625mW for

MSOP-8

The maximum power dissipation depends on operating ambient temperature for fixed TJ(MAX) and thermal resistance θJA. For RT9193 packages, the Figure 2 of derating curves allows the designer to see the effect of rising ambient temperature on the maximum power allowed.

Figure 2. Derating Curve for Packages