MSPM0G1518
Mixed-Signal MicrocontrollerThe MSPM0G1518 is a mixed-signal microcontroller from Texas Instruments. View the full MSPM0G1518 datasheet below including key specifications, electrical characteristics, absolute maximum ratings.
Manufacturer
Texas Instruments
Category
Mixed-Signal Microcontroller
Key Specifications
| Parameter | Value |
|---|---|
| Connectivity | DALI, I2C, IrDA, LINbus, SmartCard, SMBus, SPI, UART/USART |
| Core Processor | ARM® Cortex®-M0+ |
| Core Size | 32-Bit |
| Data Converters | A/D 27x12b SAR; D/A 1x12b |
| Mounting Type | Surface Mount |
| Number of I/O | 60 |
| Operating Temperature | -40°C ~ 125°C (TA) |
| Oscillator Type | External, Internal |
| Package / Case | 64-LQFP |
| Packaging | MouseReel |
| Peripherals | AES, Brown-out Detect/Reset, DMA, POR, PWM, TRNG, WDT |
| Flash Memory Size | 512KB (512K x 8) |
| Program Memory Type | FLASH |
| RAM Size | 128K x 8 B |
| Clock Speed | 80MHz |
| Standard Pack Qty | 1000 |
| Supplier Device Package | 64-LQFP (10x10) |
| Supply Voltage | 1.62V ~ 3.6V |
Overview
Part: MSPM0G1519SPMR — Texas Instruments
Type: Mixed-Signal Microcontroller
Description: 32-bit Arm Cortex-M0+ MCU operating up to 80MHz with 512KB Flash, 128KB SRAM, high-performance analog peripherals, and a wide range of communication interfaces, designed for ultra-low-power applications.
Operating Conditions:
- Supply voltage: 1.62V to 3.6V
- Operating temperature: -40°C to 125°C
- Max CPU frequency: 80MHz
Key Specs:
- Core: Arm 32-bit Cortex-M0+ CPU
- Max CPU frequency: 80MHz
- Flash memory: 512KB with ECC
- SRAM: 128KB total (64KB with ECC/parity, 64KB with retention)
- ADC: Two 12-bit 4Msps, up to 27 external channels
- DAC: One 12-bit 1Msps
- Comparators: Three high-speed with 8-bit reference DACs
- UART interfaces: Seven
- I2C interfaces: Three (up to 1Mbit/s)
- SPI interfaces: Three (one up to 32Mbits/s)
- GPIOs: 60 (for 64-pin LQFP package)
Features:
- Arm 32-bit Cortex-M0+ CPU with memory protection unit
- Dual-bank flash with address swap for OTA updates
- High-performance analog peripherals including ADCs, comparators, and DAC
- Optimized low-power modes (RUN, SLEEP, STOP, STANDBY, SHUTDOWN)
- 12-channel DMA controller
- Math accelerator supports DIV, SQRT, MAC, and TRIG computations
- Nine timers supporting up to 28 PWM channels
- Enhanced communication interfaces: UART, I2C, SPI
- AES-128/256 accelerator, secure key storage, flexible firewalls, TRNG
- Up to 94 GPIOs (including 5V-tolerant, high-drive, high-speed options)
- 2-pin serial wire debug (SWD)
Applications:
- Motor control
- Home appliances
- Uninterruptible power supplies and inverters
- Electronic point of sale systems
- Medical and healthcare
- Test and measurement
- Factory automation and control
- Industrial transport
- Grid infrastructure
- Smart metering
- Communication modules
- Lighting
Package:
- 100-pin nFBGA (ZAW)
- 100-pin LQFP (PZ)
- 80-pin LQFP (PN)
- 64-pin LQFP (PM)
- 48-pin LQFP (PT)
- 48-pin VQFN (RGZ)
- 42-pin DSBGA (YCJ)
- 32-pin VQFN (RHB)
Features
| BUFFER TYPE | INVERSION CONTROL | DRIVE STRENGTH CONTROL | HYSTERESIS CONTROL | PULLUP RESISTOR | PULLDOWN RESISTOR | WAKEUP LOGIC |
|---|---|---|---|---|---|---|
| ODIO (5V-tolerant open drain) | Y | Y | Y | Y |
- Standard with Wake allows the I/O to wake up the device from the lowest low-power mode of SHUTDOWN. All I/O can be configured to wakeup the MCU from higher low-power modes. See section GPIO FastWake in the MSPM0 G-Series 80MHz Microcontrollers Technical Reference Manual . for details.
Applications
Pin Configuration
The System Configuration tool provides a graphical interface to enable, configurable, and generate initialization code for pin multiplexing and simplifying pin settings. The pin diagrams shown in the data sheet show the primary peripheral functions, some of the integrated device features, and available clock signals to simplify the device pinout.
For full descriptions of the pin functions, see the Pin Attributes and Signal Descriptions sections.
Electrical Characteristics
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
| PARAMETER | PARAMETER | TEST CONDITIONS | TEST CONDITIONS | MIN | TYP | MAX | UNIT |
|---|---|---|---|---|---|---|---|
| ODIO (1) | VDD≥1.62V | 0.7*VDD | 5.5 | V | |||
| V IH | High level input voltage | VDD≥2.7V | 2 | 5.5 | V | ||
| V IH | High level input voltage | All I/O except ODIO & Reset | VDD≥1.62V | 0.7*VDD | VDD+0.3 | V | |
| VDD≥1.62V | -0.3 | 0.3*VDD | V | ||||
| V IL | Low level input voltage | ODIO | VDD≥2.7V | -0.3 | 0.8 | V | |
| V IL | Low level input voltage | All I/O except ODIO & Reset | VDD≥1.62V | -0.3 | 0.3*VDD | V | |
| V | ODIO | 0.05*VDD | V | ||||
| HYS | Hysteresis | All I/O except ODIO | 0.1*VDD | V | |||
| I lkg | High-Z leakage current (All packages except PZ, PN, PM) | SDIO (2) (3) | 1.62V ≤ VDD ≤ 3.6V, -40 °C ≤ T a ≤ 125 °C | 50 (4) | nA | ||
| High-Z leakage current (PZ, PN, PM package) | SDIO (2) (3) | 1.62V ≤ VDD ≤ 3.6V, -40 °C ≤ T a ≤ 25 °C | 70 (4) | nA | |||
| High-Z leakage current (PZ, PN, PM package) | SDIO (2) (3) | 1.62V ≤ VDD ≤ 3.6V, -40 °C ≤ T a ≤ 125 °C | 400 (4) | nA | |||
| R PU | Pull up resistance | All I/O except ODIO | VIN = VSS | 40 | kΩ | ||
| R PD | Pull down resistance | VIN = VDD | 40 | kΩ | |||
| C I | Input capacitance | VDD = 3.3V | 5 | pF | |||
| V OH | High level output voltage | SDIO | VDD≥2.7V, \ | I IO \ | ,max =6mA VDD≥1.71V, \ | I IO \ | ,max =2mA VDD≥1.62V, \ |
| V OH | High level output voltage | SDIO | VDD≥2.7V, \ | I IO \ | ,max =6mA VDD≥1.71V, \ | I IO \ | ,max =2mA VDD≥1.62V, \ |
| V OH | High level output voltage | HSIO | VDD≥2.7V, DRV=1, \ | I IO \ | ,max =6mA VDD≥1.71V, DRV=1, \ | I IO \ | ,max =3mA VDD≥1.62V, DRV=1, \ |
| V OH | High level output voltage | HSIO | VDD≥2.7V, DRV=1, \ | I IO \ | ,max =6mA VDD≥1.71V, DRV=1, \ | I IO \ | ,max =3mA VDD≥1.62V, DRV=1, \ |
| V OH | High level output voltage | HSIO | IO ,max VDD≥1.62V, DRV=0, \ | I IO \ | ,max =1.5mA -40 °C ≤ T a ≤ 25 °C VDD≥2.7V, DRV=0, \ | I IO \ | ,max =4mA VDD≥1.71V, DRV=0, \ |
| V OH | High level output voltage | HSIO | VDD≥1.62V, DRV=0, \ | I IO \ | ,max =1.5mA -40 °C ≤ T a ≤ 125 °C | VDD-0.45 | |
| V OH | High level output voltage | HDIO | VDD≥2.7V, DRV=1 (5) , \ | I IO \ | ,max =20mA VDD≥1.71V, DRV=1 (5) , \ | I IO \ | ,max =10mA |
| V OH | High level output voltage | HDIO | VDD≥2.7V, DRV=0, \ | I IO \ | ,max =6mA VDD≥1.71V, DRV=0, \ | I IO \ | ,max =2mA |
www.ti.com over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
| PARAMETER | TEST | CONDITIONS | MIN | TYP | MAX | UNIT | |
|---|---|---|---|---|---|---|---|
| V OL | Low level output voltage | SDIO | VDD≥2.7V, \ | I IO \ | ,max =6mA VDD≥1.71V, \ | I IO \ | ,max =2mA VDD≥1.62V, \ |
| V OL | Low level output voltage | SDIO | VDD≥2.7V, \ | I IO \ | ,max =6mA VDD≥1.71V, \ | I IO \ | ,max =2mA VDD≥1.62V, \ |
| V OL | Low level output voltage | HSIO | VDD≥2.7V, DRV=1, \ | I IO \ | ,max =6mA VDD≥1.71V, DRV=1, \ | I IO \ | ,max =3mA VDD≥1.62V, DRV=1, \ |
| V OL | Low level output voltage | HSIO | VDD≥2.7V, DRV=1, \ | I IO \ | ,max =6mA VDD≥1.71V, DRV=1, \ | I IO \ | ,max =3mA VDD≥1.62V, DRV=1, \ |
| V OL | Low level output voltage | HSIO | VDD≥2.7V, DRV=0, \ | I IO \ | ,max =4mA VDD≥1.71V, DRV=0, \ | I IO \ | ,max =2mA VDD≥1.62V, DRV=0, \ |
| V OL | Low level output voltage | HSIO | VDD≥2.7V, DRV=0, \ | I IO \ | ,max =4mA VDD≥1.71V, DRV=0, \ | I IO \ | ,max =2mA VDD≥1.62V, DRV=0, \ |
| V OL | Low level output voltage | HDIO | VDD≥2.7V, DRV=1 (5) , \ | I IO \ | ,max =20mA VDD≥1.71V, DRV=1 (5) , \ | I IO \ | ,max =10mA |
| V OL | Low level output voltage | HDIO | VDD≥2.7V, DRV=0, \ | I IO \ | ,max =6mA VDD≥1.71V, DRV=0, \ | I IO \ | ,max =2mA |
| V OL | Low level output voltage | ODIO | VDD≥2.7V, I OL,max =8mA VDD≥1.71V, I OL,max =4mA -40 °C ≤ T a ≤ 25 °C | 0.4 | |||
| V OL | Low level output voltage | ODIO | VDD≥2.7V, I OL,max =8mA VDD≥1.71V, I OL,max =4mA -40 °C ≤ T a ≤ 125 °C | 0.45 |
Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted) (1)
| MIN | MAX | UNIT | |||
|---|---|---|---|---|---|
| VDD | Supply voltage | At VDD pin | -0.3 | 4.1 | V |
| V I | Input voltage | Applied to any 5-V tolerant open-drain pins | -0.3 | 5.5 | V |
| V I | Input voltage | Applied to any common tolerance pins | -0.3 | V DD + 0.3 (4.1 MAX) | V |
| I VDD (3) | Current into VDD pin (source) | -40 °C ≤ T j ≤ 130 °C | 80 | mA | |
| I VDD (3) | Current into VDD pin (source) | -40 °C ≤ Tj ≤ 90 °C | 100 | mA | |
| I VSS (3) | Current out of VSS pin (sink) | -40 °C ≤ T j ≤ 130 °C | 80 | mA | |
| I VSS (3) | Current out of VSS pin (sink) | -40 °C ≤ Tj ≤ 90 °C | 100 | mA | |
| I IO | Current of SDIO pin | Current sunk or sourced by SDIO pin, VDD>=2.7V | 6 | mA | |
| I IO | Current of HSIO pin | Current sunk or sourced by HSIO pin, VDD>=2.7V | 6 | mA | |
| I IO | Current of HDIO pin | Current sunk or sourced by HDIO pin | 20 | mA | |
| I IO | Current of ODIO pin | Current sunk by ODIO pin | 20 | mA | |
| I D | Supported diode current | Diode current at any device pin (excluding Open Drain IO) | -2 | 2 | mA |
| T A | Ambient temperature | Ambient temperature | -40 | 125 | °C |
| T J | Junction temperature | Junction temperature | -40 | 130 | °C |
| T stg | Storage temperature (2) | Storage temperature (2) | -40 | 150 | °C |
- (3) For applications running at VDD=1.62V, I_VDD/I_VSS<=20mA is required to ensure device functionality
Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
| MIN | NOM | MAX | UNIT | ||
|---|---|---|---|---|---|
| VDD | Supply voltage | 1.62 | 3.6 | V | |
| VCORE | Voltage on VCORE pin (2) | 1.35 | V | ||
| C VDD | Capacitor connected between VDD and VSS (1) | 10 | μF | ||
| C VCORE | Capacitor connected between VCORE and VSS (1) (2) | 470 | nF | ||
| T A | Ambient temperature | -40 | 125 | °C |
over operating free-air temperature range (unless otherwise noted)
| MIN | NOM | MAX | UNIT | ||
|---|---|---|---|---|---|
| T J | Max junction temperature | 130 | °C | ||
| f MCLK (PD1 bus clock) | MCLK, CPUCLK frequency with 2 flash wait states (3) | 80 | MHz | ||
| f MCLK (PD1 bus clock) | MCLK, CPUCLK frequency with 1 flash wait state (3) | 48 | MHz | ||
| f MCLK (PD1 bus clock) | MCLK, CPUCLK frequency with 0 flash wait states (3) | 24 | MHz | ||
| f ULPCLK (PD0 bus clock) | ULPCLK frequency | 40 | MHz |
Thermal Information
| THERMAL METRIC (1) | THERMAL METRIC (1) | PACKAGE | VALUE | UNIT |
|---|---|---|---|---|
| R θJA | Junction-to-ambient thermal resistance | nFBGA-100 (ZAW) | 53.4 | °C/W |
| R θJC(top) | Junction-to-case (top) thermal resistance | nFBGA-100 (ZAW) | 21 | °C/W |
| R θJB | Junction-to-board thermal resistance | nFBGA-100 (ZAW) | 32.2 | °C/W |
| Ψ JT | Junction-to-top characterization parameter | nFBGA-100 (ZAW) | 0.7 | °C/W |
| Ψ JB | Junction-to-board characterization parameter | nFBGA-100 (ZAW) | 32 | °C/W |
| R θJC(bot) | Junction-to-case (bottom) thermal resistance | nFBGA-100 (ZAW) | N/A | °C/W |
| R θJA | Junction-to-ambient thermal resistance | LQFP-100 (PZ) | 72.1 | °C/W |
| R θJC(top) | Junction-to-case (top) thermal resistance | LQFP-100 (PZ) | 21.4 | °C/W |
| R θJB | Junction-to-board thermal resistance | LQFP-100 (PZ) | 54.8 | °C/W |
| Ψ JT | Junction-to-top characterization parameter | LQFP-100 (PZ) | 1 | °C/W |
| Ψ JB | Junction-to-board characterization parameter | LQFP-100 (PZ) | 53.7 | °C/W |
| R θJC(bot) | Junction-to-case (bottom) thermal resistance | LQFP-100 (PZ) | N/A | °C/W |
| R θJA | Junction-to-ambient thermal resistance | LQFP-80 (PN) | 58.9 | °C/W |
| R θJC(top) | Junction-to-case (top) thermal resistance | LQFP-80 (PN) | 18.9 | °C/W |
| R θJB | Junction-to-board thermal resistance | LQFP-80 (PN) | 38.7 | °C/W |
| Ψ JT | Junction-to-top characterization parameter | LQFP-80 (PN) | 0.9 | °C/W |
| Ψ JB | Junction-to-board characterization parameter | LQFP-80 (PN) | 38.2 | °C/W |
| R θJC(bot) | Junction-to-case (bottom) thermal resistance | LQFP-80 (PN) | N/A | °C/W |
| R θJA | Junction-to-ambient thermal resistance | LQFP-64 (PM) | 62 | °C/W |
| R θJC(top) | Junction-to-case (top) thermal resistance | LQFP-64 (PM) | 21.6 | °C/W |
| R θJB | Junction-to-board thermal resistance | LQFP-64 (PM) | 39.1 | °C/W |
| Ψ JT | Junction-to-top characterization parameter | LQFP-64 (PM) | 1 | °C/W |
| Ψ JB | Junction-to-board characterization parameter | LQFP-64 (PM) | 38.7 | °C/W |
| R θJC(bot) | Junction-to-case (bottom) thermal resistance | LQFP-64 (PM) | N/A | °C/W |
| R θJA | Junction-to-ambient thermal resistance | LQFP-48 (PT) | 70.6 | °C/W |
| R θJC(top) | Junction-to-case (top) thermal resistance | LQFP-48 (PT) | 27 | °C/W |
| R θJB | Junction-to-board thermal resistance | LQFP-48 (PT) | 42.5 | °C/W |
| Ψ JT | Junction-to-top characterization parameter | LQFP-48 (PT) | 1.5 | °C/W |
| Ψ JB | Junction-to-board characterization parameter | LQFP-48 (PT) | 42.1 | °C/W |
| R θJC(bot) | Junction-to-case (bottom) thermal resistance | LQFP-48 (PT) | N/A | °C/W |
| THERMAL METRIC (1) | THERMAL METRIC (1) | PACKAGE | VALUE | UNIT |
| R θJA | Junction-to-ambient thermal resistance | VQFN-48 (RGZ) | 28.3 | °C/W |
| R θJC(top) | Junction-to-case (top) thermal resistance | VQFN-48 (RGZ) | 18.5 | °C/W |
| R θJB | Junction-to-board thermal resistance | VQFN-48 (RGZ) | 10.7 | °C/W |
| Ψ JT | Junction-to-top characterization parameter | VQFN-48 (RGZ) | 0.2 | °C/W |
| Ψ JB | Junction-to-board characterization parameter | VQFN-48 (RGZ) | 10.6 | °C/W |
| R θJC(bot) | Junction-to-case (bottom) thermal resistance | VQFN-48 (RGZ) | 2.8 | °C/W |
| R θJA | Junction-to-ambient thermal resistance | DSBGA-42 (YCJ) | TBD | °C/W |
| R θJC(top) | Junction-to-case (top) thermal resistance | DSBGA-42 (YCJ) | TBD | °C/W |
| R θJB | Junction-to-board thermal resistance | DSBGA-42 (YCJ) | TBD | °C/W |
| Ψ JT | Junction-to-top characterization parameter | DSBGA-42 (YCJ) | TBD | °C/W |
| Ψ JB | Junction-to-board characterization parameter | DSBGA-42 (YCJ) | TBD | °C/W |
| R θJC(bot) | Junction-to-case (bottom) thermal resistance | DSBGA-42 (YCJ) | TBD | °C/W |
| R θJA | Junction-to-ambient thermal resistance | VQFN-32 (RHB) | 31.3 | °C/W |
| R θJC(top) | Junction-to-case (top) thermal resistance | 22.6 | °C/W | |
| R θJB | Junction-to-board thermal resistance | 12.2 | °C/W | |
| Ψ JT | Junction-to-top characterization parameter | 0.3 | °C/W | |
| Ψ JB | Junction-to-board characterization parameter | 12.1 | °C/W | |
| R θJC(bot) | Junction-to-case (bottom) thermal resistance | 2.8 | °C/W |
Typical Application
Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI's customers are responsible for determining suitability of components for their purposes, as well as validating and testing their design implementation to confirm system functionality.
Package Information
PLASTIC BALL GRID ARRAY
- All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M.
Related Variants
The following components are covered by the same datasheet.
| Part Number | Manufacturer | Package |
|---|---|---|
| MSPM0G1519 | Texas Instruments | — |
| MSPM0G1519SPMR | Texas Instruments | 64-LQFP |
| MSPM0G1519SPNR | Texas Instruments | — |
| MSPM0G1519SPTR | Texas Instruments | — |
| MSPM0G1519SPZR | Texas Instruments | — |
| MSPM0G1519SRGZR | Texas Instruments | — |
| MSPM0G1519SRHBR | Texas Instruments | — |
| MSPM0G1519SZAWR | Texas Instruments | — |
| MSPM0G3518 | Texas Instruments | — |
| MSPM0G3519 | Texas Instruments | — |
| MSPM0GX51X | Texas Instruments | — |
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