LM5106SDX/NOPB.B
LM5106 100-V Half-Bridge Gate Driver With Programmable Dead-Time
Manufacturer
Texas Instruments
Overview
Part: LM5106 from Texas Instruments
Type: Half-Bridge Gate Driver
Key Specs:
- Peak Output Sink Current: 1.8 A
- Peak Output Source Current: 1.2 A
- Bootstrap Supply Voltage Range: up to 118 V DC
- Floating High-Side Driver Rail Voltage: up to 100 V
- Fast Turnoff Propagation Delay: 32 ns (Typical)
- Recommended VDD Operating Range: 8 V to 14 V
- Recommended Junction Temperature Range: -40 °C to 125 °C
Features:
- Drives Both a High-Side and Low-Side N-Channel
- Single TTL Compatible Input
- Programmable Turnon Delays (Dead-Time)
- Enable Input Pin
- Drives 1000 pF With 15-ns Rise and 10-ns Fall
- Supply Rail Undervoltage Lockout
- Low Power Consumption
Applications:
- Solid-State Motor Drives
- Half-Bridge and Full-Bridge Power Converters
- Two Switch Forward Power Converters
Package:
- WSON (10): 4 mm x 4 mm
- VSSOP (10): 3.00 mm × 3.00 mm
Features
- Drives Both a High-Side and Low-Side N-Channel
- 1.8-A Peak Output Sink Current
- 1.2-A Peak Output Source Current
- Bootstrap Supply Voltage Range up to 118-V DC
- Single TTL Compatible Input
- Programmable Turnon Delays (Dead-Time)
- Enable Input Pin
- Fast Turnoff Propagation Delays (32 ns Typical)
- Drives 1000 pF With 15-ns Rise and 10-ns Fall
- Supply Rail Undervoltage Lockout
- Low Power Consumption
- 10-Pin WSON Package (4 mm x 4 mm) and 10-Pin VSSOP Package
Applications
- Solid-State Motor Drives
- Half-Bridge and Full-Bridge Power Converters
- Two Switch Forward Power Converters
Pin Configuration
Pin Functions
| PIN | |
|---|---|
| NO. | NAME |
| 1 | VDD |
| 2 | HB |
| 3 | HO |
| 4 | HS High-side MOSFET source connection |
| 5 | NC |
| 6 | RDT |
| 7 | EN |
| 8 | IN |
| 9 | VSS |
| 10 | LO |
| — | EP |
Electrical Characteristics
MIN and MAX limits apply over the full operating junction temperature range. Unless otherwise specified, TJ = +25°C, VDD = HB = 12 V, VSS = HS = 0 V, EN = 5 V. No load on LO or HO. RDT= 100kΩ (1) .
| SYMBOL | PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT |
|---|---|---|---|---|---|---|
| SUPPLY CURRENTS | ||||||
| IDD | VDD Quiescent Current | IN = EN = 0 V | 0.34 | 0.6 | mA | |
| IDDO | VDD Operating Current | f = 500 kHz | 2.1 | 3.5 | mA | |
| IHB | Total HB Quiescent Current | IN = EN = 0 V | 0.06 | 0.2 | mA | |
| IHBO | Total HB Operating Current | f = 500 kHz | 1.5 | 3 | mA | |
| IHBS | HB to VSS Current, Quiescent | HS = HB = 100 V | 0.1 | 10 | μA | |
| IHBSO | HB to VSS Current, Operating | f = 500 kHz | 0.5 | mA | ||
| INPUT IN and EN | ||||||
| VIL | Low Level Input Voltage Threshold | 0.8 | 1.8 | V | ||
| VIH | High Level Input Voltage Threshold | 1.8 | 2.2 | V | ||
| Rpd | Input Pulldown Resistance Pin IN and EN | 100 | 200 | 500 | kΩ | |
| DEAD-TIME CONTROLS | ||||||
| VRDT | Nominal Voltage at RDT | 2.7 | 3 | 3.3 | V | |
| IRDT | RDT Pin Current Limit | RDT = 0 V | 0.75 | 1.5 | 2.25 | mA |
| UNDERVOLTAGE PROTECTION | ||||||
| VDDR | VDD Rising Threshold | 6.2 | 6.9 | 7.6 | V | |
| VDDH | VDD Threshold Hysteresis | 0.5 | V | |||
| VHBR | HB Rising Threshold | 5.9 | 6.6 | 7.3 | V | |
| VHBH | HB Threshold Hysteresis | 0.4 | V | |||
| LO GATE DRIVER | ||||||
| VOLL | Low-Level Output Voltage | ILO = 100 mA | 0.21 | 0.4 | V | |
| VOHL | High-Level Output Voltage | ILO = –100 mA, VOHL = VDD – VLO | 0.5 | 0.85 | V | |
| IOHL | Peak Pullup Current | LO = 0 V | 1.2 | A | ||
| IOLL | Peak Pulldown Current | LO = 12 V | 1.8 | A | ||
| HO GATE DRIVER | ||||||
| VOLH | Low-Level Output Voltage | IHO = 100 mA | 0.21 | 0.4 | V | |
| VOHH | High-Level Output Voltage | IHO = –100 mA, VOHH = HB – HO | 0.5 | 0.85 | V |
(1) Min and Max limits are 100% production tested at 25°C. Limits over the operating temperature range are ensured through correlation using Statistical Quality Control (SQC) methods. Limits are used to calculate Average Outgoing Quality Level (AOQL).
(2) Four-layer board with Cu finished thickness 1.5 oz, 1 oz, 1 oz, 1.5 oz. Maximum die size used. 5x body length of Cu trace on PCB top. 50-mm × 50-mm ground and power planes embedded in PCB. See Application Note AN-1187 Leadless Leadframe Package (LLP) (SNOA401).
Absolute Maximum Ratings
| MIN | MAX | UNIT | |
|---|---|---|---|
| VDD to VSS | –0.3 | 18 | V |
| HB to HS | –0.3 | 18 | V |
| IN and EN to VSS | –0.3 | VDD + 0.3 | V |
| LO to VSS | –0.3 | VDD + 0.3 | V |
| HO to VSS | HS – 0.3 | HB + 0.3 | V |
| (3) HS to VSS | 100 | V | |
| HB to VSS | 118 | V | |
| RDT to VSS | –0.3 | 5 | V |
| Junction Temperature | 150 | °C | |
| Storage temperature range, Tstg | –55 | 150 | °C |
- (1) Absolute Maximum Ratings indicate limits beyond which damage to the component may occur. Recommended Operating Conditions are conditions under which operation of the device is ensured. Operating Ratings do not imply ensured performance limits. For ensured performance limits and associated test conditions, see the Electrical Characteristics.
- (2) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/Distributors for availability and specifications.
- (3) In the application the HS node is clamped by the body diode of the external lower N-MOSFET, therefore the HS voltage will generally not exceed –1 V. However in some applications, board resistance and inductance may result in the HS node exceeding this stated voltage transiently. If negative transients occur on HS, the HS voltage must never be more negative than VDD - 15 V. For example, if VDD = 10 V, the negative transients at HS must not exceed –5 V.
6.2 ESD Ratings
| VALUE | UNIT | |||
|---|---|---|---|---|
| V(ESD) | Electrostatic discharge | Human body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) | ±1500 | V |
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
6.3 Recommended Operating Conditions
| MIN | MAX | UNIT | |
|---|---|---|---|
| VDD | 8 | 14 | V |
| HS(1) | –1 | 100 | V |
| HB | HS + 8 | HS + 14 | V |
| HS Slew Rate | < 50 | V/ns | |
| Junction Temperature | –40 | 125 | °C |
(1) In the application the HS node is clamped by the body diode of the external lower N-MOSFET, therefore the HS voltage will generally not exceed –1 V. However in some applications, board resistance and inductance may result in the HS node exceeding this stated voltage transiently. If negative transients occur on HS, the HS voltage must never be more negative than VDD - 15 V. For example, if VDD = 10 V, the negative transients at HS must not exceed –5 V.
6.4 Thermal Information
| LM5102 | |||
|---|---|---|---|
| THERMAL METRIC(1) | DGS | DPR(2) | |
| 10 PINS | 10 PINS | ||
| RθJA | Junction-to-ambient thermal resistance | 165.3 | 37.9 |
| RθJC(top) | Junction-to-case (top) thermal resistance | 58.9 | 38.1 |
| RθJB | Junction-to-board thermal resistance | 54.4 | 14.9 |
| ψJT | Junction-to-top characterization parameter | 6.2 | 0.4 |
| ψJB | Junction-to-board characterization parameter | 83.6 | 15.2 |
| RθJC(bot) | Junction-to-case (bottom) thermal resistance | N/A | 4.4 |
6.5 Electrical Characteristics
MIN and MAX limits apply over the full operating junction temperature range. Unless otherwise specified, TJ = +25°C, VDD = HB = 12 V, VSS = HS = 0 V, EN = 5 V. No load on LO or HO. RDT= 100kΩ (1) .
| SYMBOL | PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT |
|---|---|---|---|---|---|---|
| SUPPLY CURRENTS | ||||||
| IDD | VDD Quiescent Current | IN = EN = 0 V | 0.34 | 0.6 | mA | |
| IDDO | VDD Operating Current | f = 500 kHz | 2.1 | 3.5 | mA | |
| IHB | Total HB Quiescent Current | IN = EN = 0 V | 0.06 | 0.2 | mA | |
| IHBO | Total HB Operating Current | f = 500 kHz | 1.5 | 3 | mA | |
| IHBS | HB to VSS Current, Quiescent | HS = HB = 100 V | 0.1 | 10 | μA | |
| IHBSO | HB to VSS Current, Operating | f = 500 kHz | 0.5 | mA | ||
| INPUT IN and EN | ||||||
| VIL | Low Level Input Voltage Threshold | 0.8 | 1.8 | V | ||
| VIH | High Level Input Voltage Threshold | 1.8 | 2.2 | V | ||
| Rpd | Input Pulldown Resistance Pin IN and EN | 100 | 200 | 500 | kΩ | |
| DEAD-TIME CONTROLS | ||||||
| VRDT | Nominal Voltage at RDT | 2.7 | 3 | 3.3 | V | |
| IRDT | RDT Pin Current Limit | RDT = 0 V | 0.75 | 1.5 | 2.25 | mA |
| UNDERVOLTAGE PROTECTION | ||||||
| VDDR | VDD Rising Threshold | 6.2 | 6.9 | 7.6 | V | |
| VDDH | VDD Threshold Hysteresis | 0.5 | V | |||
| VHBR | HB Rising Threshold | 5.9 | 6.6 | 7.3 | V | |
| VHBH | HB Threshold Hysteresis | 0.4 | V | |||
| LO GATE DRIVER | ||||||
| VOLL | Low-Level Output Voltage | ILO = 100 mA | 0.21 | 0.4 | V | |
| VOHL | High-Level Output Voltage | ILO = –100 mA, VOHL = VDD – VLO | 0.5 | 0.85 | V | |
| IOHL | Peak Pullup Current | LO = 0 V | 1.2 | A | ||
| IOLL | Peak Pulldown Current | LO = 12 V | 1.8 | A | ||
| HO GATE DRIVER | ||||||
| VOLH | Low-Level Output Voltage | IHO = 100 mA | 0.21 | 0.4 | V | |
| VOHH | High-Level Output Voltage | IHO = –100 mA, VOHH = HB – HO | 0.5 | 0.85 | V |
(1) Min and Max limits are 100% production tested at 25°C. Limits over the operating temperature range are ensured through correlation using Statistical Quality Control (SQC) methods. Limits are used to calculate Average Outgoing Quality Level (AOQL).
(2) Four-layer board with Cu finished thickness 1.5 oz, 1 oz, 1 oz, 1.5 oz. Maximum die size used. 5x body length of Cu trace on PCB top. 50-mm × 50-mm ground and power planes embedded in PCB. See Application Note AN-1187 Leadless Leadframe Package (LLP) (SNOA401).
Recommended Operating Conditions
| MIN | MAX | UNIT | |
|---|---|---|---|
| VDD | 8 | 14 | V |
| HS(1) | –1 | 100 | V |
| HB | HS + 8 | HS + 14 | V |
| HS Slew Rate | < 50 | V/ns | |
| Junction Temperature | –40 | 125 | °C |
(1) In the application the HS node is clamped by the body diode of the external lower N-MOSFET, therefore the HS voltage will generally not exceed –1 V. However in some applications, board resistance and inductance may result in the HS node exceeding this stated voltage transiently. If negative transients occur on HS, the HS voltage must never be more negative than VDD - 15 V. For example, if VDD = 10 V, the negative transients at HS must not exceed –5 V.
Thermal Information
| LM5102 | |||
|---|---|---|---|
| THERMAL METRIC(1) | DGS | DPR(2) | |
| 10 PINS | 10 PINS | ||
| RθJA | Junction-to-ambient thermal resistance | 165.3 | 37.9 |
| RθJC(top) | Junction-to-case (top) thermal resistance | 58.9 | 38.1 |
| RθJB | Junction-to-board thermal resistance | 54.4 | 14.9 |
| ψJT | Junction-to-top characterization parameter | 6.2 | 0.4 |
| ψJB | Junction-to-board characterization parameter | 83.6 | 15.2 |
| RθJC(bot) | Junction-to-case (bottom) thermal resistance | N/A | 4.4 |
Related Variants
The following components are covered by the same datasheet.
| Part Number | Manufacturer | Package |
|---|---|---|
| LM5106 | Texas Instruments | — |
| LM5106MM/NOPB | Texas Instruments | — |
| LM5106MM/NOPB.A | Texas Instruments | — |
| LM5106MM/NOPB.B | Texas Instruments | — |
| LM5106MMX | Texas Instruments | — |
| LM5106MMX/NOPB | Texas Instruments | VSSOP-10-0.5mm |
| LM5106MMX/NOPB.A | Texas Instruments | — |
| LM5106MMX/NOPB.B | Texas Instruments | — |
| LM5106SD/NOPB | Texas Instruments | — |
| LM5106SD/NOPB.A | Texas Instruments | — |
| LM5106SD/NOPB.B | Texas Instruments | — |
| LM5106SDX | Texas Instruments | — |
| LM5106SDX/NOPB | Texas Instruments | — |
| LM5106SDX/NOPB.A | Texas Instruments | — |
| LM5406 | Texas Instruments | — |
| LM5X06 | Texas Instruments | — |
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