LM5106MM/NOPB

LM5106 100-V Half-Bridge Gate Driver With Programmable Dead-Time

Manufacturer

Texas Instruments

Overview

Part: LM5106 from Texas Instruments

Type: Half-Bridge Gate Driver

Key Specs:

  • Peak Output Sink Current: 1.8 A
  • Peak Output Source Current: 1.2 A
  • Bootstrap Supply Voltage Range: up to 118 V DC
  • Floating High-Side Driver Rail Voltage: up to 100 V
  • Fast Turnoff Propagation Delay: 32 ns (Typical)
  • Recommended VDD Operating Range: 8 V to 14 V
  • Recommended Junction Temperature Range: -40 °C to 125 °C

Features:

  • Drives Both a High-Side and Low-Side N-Channel
  • Single TTL Compatible Input
  • Programmable Turnon Delays (Dead-Time)
  • Enable Input Pin
  • Drives 1000 pF With 15-ns Rise and 10-ns Fall
  • Supply Rail Undervoltage Lockout
  • Low Power Consumption

Applications:

  • Solid-State Motor Drives
  • Half-Bridge and Full-Bridge Power Converters
  • Two Switch Forward Power Converters

Package:

  • WSON (10): 4 mm x 4 mm
  • VSSOP (10): 3.00 mm × 3.00 mm

Features

  • Drives Both a High-Side and Low-Side N-Channel
  • 1.8-A Peak Output Sink Current
  • 1.2-A Peak Output Source Current
  • Bootstrap Supply Voltage Range up to 118-V DC
  • Single TTL Compatible Input
  • Programmable Turnon Delays (Dead-Time)
  • Enable Input Pin
  • Fast Turnoff Propagation Delays (32 ns Typical)
  • Drives 1000 pF With 15-ns Rise and 10-ns Fall
  • Supply Rail Undervoltage Lockout
  • Low Power Consumption
  • 10-Pin WSON Package (4 mm x 4 mm) and 10-Pin VSSOP Package

Applications

  • Solid-State Motor Drives
  • Half-Bridge and Full-Bridge Power Converters
  • Two Switch Forward Power Converters

Pin Configuration

Pin Functions

PIN
NO.NAME
1VDD
2HB
3HO
4HS
High-side MOSFET source
connection
5NC
6RDT
7EN
8IN
9VSS
10LO
EP

Electrical Characteristics

MIN and MAX limits apply over the full operating junction temperature range. Unless otherwise specified, TJ = +25°C, VDD = HB = 12 V, VSS = HS = 0 V, EN = 5 V. No load on LO or HO. RDT= 100kΩ (1) .

SYMBOLPARAMETERTEST CONDITIONSMINTYPMAXUNIT
SUPPLY CURRENTS
IDDVDD Quiescent CurrentIN = EN = 0 V0.340.6mA
IDDOVDD Operating Currentf = 500 kHz2.13.5mA
IHBTotal HB Quiescent CurrentIN = EN = 0 V0.060.2mA
IHBOTotal HB Operating Currentf = 500 kHz1.53mA
IHBSHB to VSS Current, QuiescentHS = HB = 100 V0.110μA
IHBSOHB to VSS Current, Operatingf = 500 kHz0.5mA
INPUT IN and EN
VILLow Level Input Voltage Threshold0.81.8V
VIHHigh Level Input Voltage Threshold1.82.2V
RpdInput Pulldown Resistance Pin IN and EN100200500
DEAD-TIME CONTROLS
VRDTNominal Voltage at RDT2.733.3V
IRDTRDT Pin Current LimitRDT = 0 V0.751.52.25mA
UNDERVOLTAGE PROTECTION
VDDRVDD Rising Threshold6.26.97.6V
VDDHVDD Threshold Hysteresis0.5V
VHBRHB Rising Threshold5.96.67.3V
VHBHHB Threshold Hysteresis0.4V
LO GATE DRIVER
VOLLLow-Level Output VoltageILO = 100 mA0.210.4V
VOHLHigh-Level Output VoltageILO = –100 mA,
VOHL = VDD – VLO
0.50.85V
IOHLPeak Pullup CurrentLO = 0 V1.2A
IOLLPeak Pulldown CurrentLO = 12 V1.8A
HO GATE DRIVER
VOLHLow-Level Output VoltageIHO = 100 mA0.210.4V
VOHHHigh-Level Output VoltageIHO = –100 mA,
VOHH = HB – HO
0.50.85V

(1) Min and Max limits are 100% production tested at 25°C. Limits over the operating temperature range are ensured through correlation using Statistical Quality Control (SQC) methods. Limits are used to calculate Average Outgoing Quality Level (AOQL).

(2) Four-layer board with Cu finished thickness 1.5 oz, 1 oz, 1 oz, 1.5 oz. Maximum die size used. 5x body length of Cu trace on PCB top. 50-mm × 50-mm ground and power planes embedded in PCB. See Application Note AN-1187 Leadless Leadframe Package (LLP) (SNOA401).

Absolute Maximum Ratings

MINMAXUNIT
VDD to VSS–0.318V
HB to HS–0.318V
IN and EN to VSS–0.3VDD + 0.3V
LO to VSS–0.3VDD + 0.3V
HO to VSSHS – 0.3HB + 0.3V
(3)
HS to VSS
100V
HB to VSS118V
RDT to VSS–0.35V
Junction Temperature150°C
Storage temperature range, Tstg–55150°C
  • (1) Absolute Maximum Ratings indicate limits beyond which damage to the component may occur. Recommended Operating Conditions are conditions under which operation of the device is ensured. Operating Ratings do not imply ensured performance limits. For ensured performance limits and associated test conditions, see the Electrical Characteristics.
  • (2) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/Distributors for availability and specifications.
  • (3) In the application the HS node is clamped by the body diode of the external lower N-MOSFET, therefore the HS voltage will generally not exceed –1 V. However in some applications, board resistance and inductance may result in the HS node exceeding this stated voltage transiently. If negative transients occur on HS, the HS voltage must never be more negative than VDD - 15 V. For example, if VDD = 10 V, the negative transients at HS must not exceed –5 V.

6.2 ESD Ratings

VALUEUNIT
V(ESD)Electrostatic dischargeHuman body model (HBM), per ANSI/ESDA/JEDEC JS-001(1)±1500V

(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.

6.3 Recommended Operating Conditions

MINMAXUNIT
VDD814V
HS(1)–1100V
HBHS + 8HS + 14V
HS Slew Rate< 50V/ns
Junction Temperature–40125°C

(1) In the application the HS node is clamped by the body diode of the external lower N-MOSFET, therefore the HS voltage will generally not exceed –1 V. However in some applications, board resistance and inductance may result in the HS node exceeding this stated voltage transiently. If negative transients occur on HS, the HS voltage must never be more negative than VDD - 15 V. For example, if VDD = 10 V, the negative transients at HS must not exceed –5 V.

6.4 Thermal Information

LM5102
THERMAL METRIC(1)DGSDPR(2)
10 PINS10 PINS
RθJAJunction-to-ambient thermal resistance165.337.9
RθJC(top)Junction-to-case (top) thermal resistance58.938.1
RθJBJunction-to-board thermal resistance54.414.9
ψJTJunction-to-top characterization parameter6.20.4
ψJBJunction-to-board characterization parameter83.615.2
RθJC(bot)Junction-to-case (bottom) thermal resistanceN/A4.4

6.5 Electrical Characteristics

MIN and MAX limits apply over the full operating junction temperature range. Unless otherwise specified, TJ = +25°C, VDD = HB = 12 V, VSS = HS = 0 V, EN = 5 V. No load on LO or HO. RDT= 100kΩ (1) .

SYMBOLPARAMETERTEST CONDITIONSMINTYPMAXUNIT
SUPPLY CURRENTS
IDDVDD Quiescent CurrentIN = EN = 0 V0.340.6mA
IDDOVDD Operating Currentf = 500 kHz2.13.5mA
IHBTotal HB Quiescent CurrentIN = EN = 0 V0.060.2mA
IHBOTotal HB Operating Currentf = 500 kHz1.53mA
IHBSHB to VSS Current, QuiescentHS = HB = 100 V0.110μA
IHBSOHB to VSS Current, Operatingf = 500 kHz0.5mA
INPUT IN and EN
VILLow Level Input Voltage Threshold0.81.8V
VIHHigh Level Input Voltage Threshold1.82.2V
RpdInput Pulldown Resistance Pin IN and EN100200500
DEAD-TIME CONTROLS
VRDTNominal Voltage at RDT2.733.3V
IRDTRDT Pin Current LimitRDT = 0 V0.751.52.25mA
UNDERVOLTAGE PROTECTION
VDDRVDD Rising Threshold6.26.97.6V
VDDHVDD Threshold Hysteresis0.5V
VHBRHB Rising Threshold5.96.67.3V
VHBHHB Threshold Hysteresis0.4V
LO GATE DRIVER
VOLLLow-Level Output VoltageILO = 100 mA0.210.4V
VOHLHigh-Level Output VoltageILO = –100 mA,
VOHL = VDD – VLO
0.50.85V
IOHLPeak Pullup CurrentLO = 0 V1.2A
IOLLPeak Pulldown CurrentLO = 12 V1.8A
HO GATE DRIVER
VOLHLow-Level Output VoltageIHO = 100 mA0.210.4V
VOHHHigh-Level Output VoltageIHO = –100 mA,
VOHH = HB – HO
0.50.85V

(1) Min and Max limits are 100% production tested at 25°C. Limits over the operating temperature range are ensured through correlation using Statistical Quality Control (SQC) methods. Limits are used to calculate Average Outgoing Quality Level (AOQL).

(2) Four-layer board with Cu finished thickness 1.5 oz, 1 oz, 1 oz, 1.5 oz. Maximum die size used. 5x body length of Cu trace on PCB top. 50-mm × 50-mm ground and power planes embedded in PCB. See Application Note AN-1187 Leadless Leadframe Package (LLP) (SNOA401).

Recommended Operating Conditions

MINMAXUNIT
VDD814V
HS(1)–1100V
HBHS + 8HS + 14V
HS Slew Rate< 50V/ns
Junction Temperature–40125°C

(1) In the application the HS node is clamped by the body diode of the external lower N-MOSFET, therefore the HS voltage will generally not exceed –1 V. However in some applications, board resistance and inductance may result in the HS node exceeding this stated voltage transiently. If negative transients occur on HS, the HS voltage must never be more negative than VDD - 15 V. For example, if VDD = 10 V, the negative transients at HS must not exceed –5 V.

Thermal Information

LM5102
THERMAL METRIC(1)DGSDPR(2)
10 PINS10 PINS
RθJAJunction-to-ambient thermal resistance165.337.9
RθJC(top)Junction-to-case (top) thermal resistance58.938.1
RθJBJunction-to-board thermal resistance54.414.9
ψJTJunction-to-top characterization parameter6.20.4
ψJBJunction-to-board characterization parameter83.615.2
RθJC(bot)Junction-to-case (bottom) thermal resistanceN/A4.4

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