LM5106SDX
Half-Bridge Gate DriverThe LM5106SDX is a half-bridge gate driver from Texas Instruments. View the full LM5106SDX datasheet below including electrical characteristics, absolute maximum ratings.
Manufacturer
Texas Instruments
Category
Half-Bridge Gate Driver
Overview
Part: LM5106 — Texas Instruments
Type: Half-Bridge Gate Driver
Description: 100-V half-bridge gate driver with programmable dead-time, designed to drive both high-side and low-side N-channel MOSFETs with 1.8-A peak sink and 1.2-A peak source current.
Operating Conditions:
- Supply voltage (VDD): 8–14 V
- Operating temperature (Junction): -40 to 125 °C
- HS voltage: -1 to 100 V
- HB voltage: HS + 8 to HS + 14 V
Absolute Maximum Ratings:
- Max supply voltage (VDD to VSS): 18 V
- Max HB to VSS: 118 V
- Max junction temperature: 150 °C
- Max storage temperature: -55 to 150 °C
Key Specs:
- V DD Quiescent Current: 0.34 mA (Typ, IN = EN = 0 V)
- V DD Operating Current: 2.1 mA (Typ, f = 500 kHz)
- Low Level Input Voltage Threshold (VIL): 0.8 V (Min)
- High Level Input Voltage Threshold (VIH): 2.2 V (Max)
- Peak Pullup Current (IOHL/IOHH): 1.2 A (Typ)
- Peak Pulldown Current (IOLL/IOLH): 1.8 A (Typ)
- Lower/Upper Turn-Off Propagation Delay (tLPHL/tHPHL): 32 ns (Typ)
- Lower/Upper Turn-On Propagation Delay (tLPLH): 520 ns (Typ, RDT = 100k)
- Dead-time (DT1, DT2): 510 ns (Typ, RDT = 100k)
- Output Rise Time (tR): 15 ns (Typ, CL = 1000pF)
- Output Fall Time (tF): 10 ns (Typ, CL = 1000pF)
Features:
- Drives Both a High-Side and Low-Side N-Channel MOSFET
- 1.8-A Peak Output Sink Current
- 1.2-A Peak Output Source Current
- Bootstrap Supply Voltage Range up to 118-V DC
- Single TTL Compatible Input
- Programmable Turnon Delays (Dead-Time)
- Enable Input Pin
- Fast Turnoff Propagation Delays (32 ns Typical)
- Drives 1000 pF With 15-ns Rise and 10-ns Fall Time
- Supply Rail Undervoltage Lockout
- Low Power Consumption
Applications:
- Solid-State Motor Drives
- Half-Bridge and Full-Bridge Power Converters
- Two Switch Forward Power Converters
Package:
- VSSOP (10)
- WSON (10)
Features
- 1 · Drives Both a High-Side and Low-Side N-Channel MOSFET
- 1.8-A Peak Output Sink Current
- 1.2-A Peak Output Source Current
- Bootstrap Supply Voltage Range up to 118-V DC
- Single TTL Compatible Input
- Programmable Turnon Delays (Dead-Time)
- Enable Input Pin
- Fast Turnoff Propagation Delays (32 ns Typical)
- Drives 1000 pF With 15-ns Rise and 10-ns Fall Time
- Supply Rail Undervoltage Lockout
- Low Power Consumption
- 10-Pin WSON Package (4 mm × 4 mm) and 10Pin VSSOP Package
Applications
- Solid-State Motor Drives
- Half-Bridge and Full-Bridge Power Converters
Pin Configuration
Pin Functions
Pin Functions
| PIN | PIN | DESCRIPTION | APPLICATION INFORMATION |
|---|---|---|---|
| NO. | NAME | DESCRIPTION | APPLICATION INFORMATION |
| 1 | VDD | Positive gate drive supply | Decouple VDD to VSS using a low ESR/ESL capacitor, placed as close to the IC as possible. |
| 2 | HB | High-side gate driver bootstrap rail | Connect the positive terminal of bootstrap capacitor to the HB pin and connect negative terminal to HS. The Bootstrap capacitor should be placed as close to IC as possible. |
| 3 | HO | High-side gate driver output | Connect to the gate of high-side N-MOS device through a short, low inductance path. |
| 4 | HS | High-side MOSFET source connection | Connect to the negative terminal of the bootststrap capacitor and to the source of the high-side N-MOS device. |
| 5 | NC | Not connected | |
| 6 | RDT | Dead-time programming pin | A resistor from RDT to VSS programs the turnon delay of both the high- and low-side MOSFETs. The resistor should be placed close to the IC to minimize noise coupling from adjacent PC board traces. |
| 7 | EN | Logic input for driver Disable/Enable | TTL compatible threshold with hysteresis. LO and HO are held in the low state when EN is low. |
| 8 | IN | Logic input for gate driver | TTL compatible threshold with hysteresis. The high-side MOSFET is turned on and the low-side MOSFET turned off when IN is high. |
| 9 | VSS | Ground return | All signals are referenced to this ground. |
| 10 | LO | Low-side gate driver output | Connect to the gate of the low-side N-MOS device with a short, low inductance path. |
| - | EP | Exposed Pad | The exposed pad has no electrical contact. Connect to system ground plane for reduced thermal resistance. |
Electrical Characteristics
MIN and MAX limits apply over the full operating junction temperature range. Unless otherwise specified, TJ = +25°C, VDD = HB = 12 V, VSS = HS = 0 V, EN = 5 V. No load on LO or HO. RDT= 100k Ω (1) .
| SYMBOL | PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT |
|---|---|---|---|---|---|---|
| SUPPLY CURRENTS | SUPPLY CURRENTS | SUPPLY CURRENTS | SUPPLY CURRENTS | SUPPLY CURRENTS | SUPPLY CURRENTS | SUPPLY CURRENTS |
| I DD | V DD Quiescent Current | IN = EN = 0 V | 0.34 | 0.6 | mA | |
| I DDO | V DD Operating Current | f = 500 kHz | 2.1 | 3.5 | mA | |
| I HB | Total HB Quiescent Current | IN = EN = 0 V | 0.06 | 0.2 | mA | |
| I HBO | Total HB Operating Current | f = 500 kHz | 1.5 | 3 | mA | |
| I HBS | HB to V SS Current, Quiescent | HS = HB = 100 V | 0.1 | 10 | μA | |
| I HBSO | HB to V SS Current, Operating | f = 500 kHz | 0.5 | mA | ||
| INPUT IN and EN | INPUT IN and EN | INPUT IN and EN | INPUT IN and EN | INPUT IN and EN | INPUT IN and EN | INPUT IN and EN |
| V IL | Low Level Input Voltage Threshold | 0.8 | 1.8 | V | ||
| V IH | High Level Input Voltage Threshold | 1.8 | 2.2 | V | ||
| R pd | Input Pulldown Resistance Pin IN and EN | 100 | 200 | 500 | k Ω | |
| DEAD-TIME CONTROLS | DEAD-TIME CONTROLS | DEAD-TIME CONTROLS | DEAD-TIME CONTROLS | DEAD-TIME CONTROLS | DEAD-TIME CONTROLS | DEAD-TIME CONTROLS |
| VRDT | Nominal Voltage at RDT | 2.7 | 3 | 3.3 | V | |
| IRDT | RDT Pin Current Limit | RDT = 0 V | 0.75 | 1.5 | 2.25 | mA |
| UNDERVOLTAGE PROTECTION | UNDERVOLTAGE PROTECTION | UNDERVOLTAGE PROTECTION | UNDERVOLTAGE PROTECTION | UNDERVOLTAGE PROTECTION | UNDERVOLTAGE PROTECTION | UNDERVOLTAGE PROTECTION |
| V DDR | V DD Rising Threshold | 6.2 | 6.9 | 7.6 | V | |
| V DDH | V DD Threshold Hysteresis | 0.5 | V | |||
| V HBR | HB Rising Threshold | 5.9 | 6.6 | 7.3 | V | |
| V HBH | HB Threshold Hysteresis | 0.4 | V | |||
| LO GATE DRIVER | LO GATE DRIVER | LO GATE DRIVER | LO GATE DRIVER | LO GATE DRIVER | LO GATE DRIVER | LO GATE DRIVER |
| V OLL | Low-Level Output Voltage | I LO = 100 mA | 0.21 | 0.4 | V | |
| V OHL | High-Level Output Voltage | I LO = -100 mA, V OHL = V DD - V LO | 0.5 | 0.85 | V | |
| I OHL | Peak Pullup Current | LO = 0 V | 1.2 | A | ||
| I OLL | Peak Pulldown Current | LO = 12 V | 1.8 | A | ||
| HO GATE DRIVER | HO GATE DRIVER | HO GATE DRIVER | HO GATE DRIVER | HO GATE DRIVER | HO GATE DRIVER | HO GATE DRIVER |
| V OLH | Low-Level Output Voltage | I HO = 100 mA | 0.21 | 0.4 | V | |
| V OHH | High-Level Output Voltage | I HO = -100 mA, V OHH = HB - HO | 0.5 | 0.85 | V |
Absolute Maximum Ratings
| MIN | MAX | UNIT | |
|---|---|---|---|
| V DD to V SS | -0.3 | 18 | V |
| HB to HS | -0.3 | 18 | V |
| IN and EN to V SS | -0.3 | V DD + 0.3 | V |
| LO to V SS | -0.3 | V DD + 0.3 | V |
| HO to V SS | HS - 0.3 | HB + 0.3 | V |
| HS to V SS (3) | 100 | V | |
| HB to V SS | 118 | V | |
| RDT to V SS | -0.3 | 5 | V |
| Junction Temperature | 150 | °C | |
| Storage temperature range, T stg | -55 | 150 | °C |
Recommended Operating Conditions
| MIN | MAX | UNIT | |
|---|---|---|---|
| V DD | 8 | 14 | V |
| HS (1) | -1 | 100 | V |
| HB | HS + 8 | HS + 14 | V |
| HS Slew Rate | < 50 | V/ns | |
| Junction Temperature | -40 | 125 | °C |
Thermal Information
| LM5102 | LM5102 | ||
|---|---|---|---|
| THERMAL METRIC (1) | DGS | DPR (2) | |
| 10 PINS | 10 PINS | ||
| R θ JA | Junction-to-ambient thermal resistance | 165.3 | 37.9 |
| R θ JC(top) | Junction-to-case (top) thermal resistance | 58.9 | 38.1 |
| R θ JB | Junction-to-board thermal resistance | 54.4 | 14.9 |
| ψ JT | Junction-to-top characterization parameter | 6.2 | 0.4 |
| ψ JB | Junction-to-board characterization parameter | 83.6 | 15.2 |
| R θ JC(bot) | Junction-to-case (bottom) thermal resistance | N/A | 4.4 |
Typical Application
The LM5106 is one of the latest generation of high-voltage gate drivers which are designed to drive both the high-side and low-side N-channel MOSFETs in a half-bridge/full bridge configuration or in a synchronous buck circuit. The floating high-side driver can operate with supply voltages up to 110 V. This allows for N-channel MOSFET control in half-bridge, full-bridge, push-pull, two switch forward and active clamp topologies.
The outputs of the LM5106 are controlled from a single input. The rising edge of each output can be delayed with a programming resistor.
Table 1. Highlights
| FEATURE | BENEFIT |
|---|---|
| Programmable Turnon Delay | Allows optimization of gate drive timings in bridge topologies |
| Enable Pin | Reduces operating current when disabled to improved power system standby power |
| Low Power Consumption | Improves light load efficiency figures of the power stage. |
Related Variants
The following components are covered by the same datasheet.
| Part Number | Manufacturer | Package |
|---|---|---|
| LM5106 | Texas Instruments | — |
| LM5106MM/NOPB | Texas Instruments | — |
| LM5106MM/NOPB.A | Texas Instruments | — |
| LM5106MM/NOPB.B | Texas Instruments | — |
| LM5106MMX | Texas Instruments | VSS |
| LM5106MMX/NOPB | Texas Instruments | VSSOP-10-0.5mm |
| LM5106MMX/NOPB.A | Texas Instruments | — |
| LM5106MMX/NOPB.B | Texas Instruments | — |
| LM5106SD/NOPB | Texas Instruments | — |
| LM5106SD/NOPB.A | Texas Instruments | — |
| LM5106SD/NOPB.B | Texas Instruments | — |
| LM5106SDX/NOPB | Texas Instruments | — |
| LM5106SDX/NOPB.A | Texas Instruments | — |
| LM5106SDX/NOPB.B | Texas Instruments | — |
| LM5406 | Texas Instruments | — |
| LM5X06 | Texas Instruments | — |
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