FT232
USB UART ICThe FT232 is a usb uart ic from FTDI. View the full FT232 datasheet below including pinout, electrical characteristics, absolute maximum ratings.
Manufacturer
FTDI
Category
Interface ICsOverview
The 48-pin LQFP and 48-pin QFN have the same pin numbering for specific functions. This pin numbering is illustrated in the schematic symbol shown in Figure 3.1
Features
USB Hi-Speed to UART/FIFO Interface . The FT232H provides USB 2.0 Hi-Speed (480Mbits/s) to flexible and configurable UART/FIFO Interfaces.
Functional Integration . The FT232H integrates a USB protocol engine which controls the physical Universal Transceiver Macrocell Interface (UTMI) and handles all aspects of the USB 2.0 Hi-Speed interface. The FT232H includes an integrated +1.8V/3.3V Low Drop-Out (LDO) regulator. It also includes 1Kbytes Tx and Rx data buffers. The FT232H integrates the entire USB protocol on a chip with no firmware required.
MPSSE . MultiProtocol Synchronous Serial Engines (MPSSE), capable of speeds up to 30 Mbits/s, provides flexible synchronous interface configurations.
FT1248 interface. The FT232H supports a new proprietary half-duplex FT1248 interface with a variable bi-directional data bus interface that can be configured as 1, 2, 4, or 8-bits wide and this enables the flexibility to expand the size of the data bus to 8 pins. For details regarding 2-bit, 4-bit and 8-bit modes, please refer to application note AN_167_FT1248_Serial_Parallel Interface Basics available from the FTDI website.
Data Transfer rate. The FT232H supports a data transfer rate up to 12 Mbaud when configured as an RS232/RS422/RS485 UART interface upto 40 Mbytes/second over a synchronous 245 parallel FIFO interface or up to 8 Mbyte/Sec over a asynchronous 245 FIFO interface. Please note the FT232H does not support the baud rates of 7 Mbaud 9 Mbaud, 10 Mbaud and 11 Mbaud.
Latency Timer. A feature of the driver used as a timeout to transmit short packets of data back to the PC. The default is 16ms, but it can be altered between 0ms and 255ms.
Bus (ACBUS) functionality, signal inversion and drive strength selection. There are 11 configurable ACBUS I/O pins. These configurable options are:
- TXDEN - transmit enable for RS485 designs.
- PWREN# - Power control for high power, bus powered designs.
- TXLED# - for pulsing an LED upon transmission of data.
- RXLED# - for pulsing an LED upon receiving data.
- TX&RXLED# - which will pulse an LED upon transmission OR reception of data .
- SLEEP# - indicates that the device going into USB suspend mode.
- CLK30 / CLK15 / CLK7.5 30MHz, 15MHz and 7.5MHz clock output signal options.
- TriSt-PU - Input pulled up, not used
- DRIVE 1 - Output driving high
- DRIVE 0 - Output driving low
- I/O mode - ACBUS BitBang
The ACBUS pins can also be individually configured as GPIO pins, similar to asynchronous bit bang mode. It is possible to use this mode while the UART interface is being used, thus providing up to 4 general purpose I/O pins which are available during normal operation.
The ACBUS lines can be configured with any one of these input/output options by setting bits in the external EEPROM see section 3.4.
Applications
- Single chip USB to UART (RS232, RS422 or RS485)
- USB to FIFO
- USB to FT1248
- USB to JTAG
- USB to SPI
- USB to I 2 C
- USB to Bit-Bang
- USB to Fast Serial Interface
- USB to CPU target interface (as memory)
Pin Configuration
FT232R USB UART IC – 28-Pin SSOP Package Pinout
| Pin | Name | Type | Description |
|---|---|---|---|
| 1 | TXD | Output | Transmit Asynchronous Data Output |
| 2 | DTR# | Output | Data Terminal Ready Control Output / Handshake Signal |
| 3 | RTS# | Output | Request to Send Control Output / Handshake Signal |
| 4 | VCCIO | PWR | +1.8V to +5.25V supply to UART Interface and CBUS pins. Connect to 3V3OUT for +3.3V or VCC for +5V output levels |
| 5 | RXD | Input | Receiving Asynchronous Data Input |
| 6 | RI# | Input | Ring Indicator Control Input. When remote wake up enabled, 20ms low pulse resumes USB host from suspend |
| 7 | GND | PWR | Device ground |
| 8 | NC | NC | No internal connection |
| 9 | DSR# | Input | Data Set Ready Control Input / Handshake Signal |
| 10 | DCD# | Input | Data Carrier Detect Control Input |
| 11 | CTS# | Input | Clear To Send Control Input / Handshake Signal |
| 12 | CBUS4 | I/O | Configurable CBUS output-only pin. Factory default: SLEEP# |
| 13 | CBUS2 | I/O | Configurable CBUS I/O pin. Factory default: TXDEN |
| 14 | CBUS3 | I/O | Configurable CBUS I/O pin. Factory default: PWREN#. Use with 10kΩ pull-up resistor |
| 15 | USBDP | I/O | USB Data Signal Plus (includes internal series resistor and 1.5kΩ pull-up to 3.3V) |
| 16 | USBDM | I/O | USB Data Signal Minus (includes internal series resistor) |
| 17 | 3V3OUT | Output | +3.3V from integrated LDO regulator. Decoupled with 100nF capacitor. Up to 50mA available for external logic |
| 18 | GND | PWR | Device ground |
| 19 | RESET# | Input | Active low reset pin. Can be left unconnected or pulled to VCC if not used |
| 20 | VCC | PWR | +3.3V to +5.25V supply to device core |
| 21 | GND | PWR | Device ground |
| 22 | CBUS1 | I/O | Configurable CBUS I/O pin. Factory default: RXLED# |
| 23 | CBUS0 | I/O | Configurable CBUS I/O pin. Factory default: TXLED# |
| 24 | NC | NC | No internal connection |
| 25 | AGND | PWR | Device analogue ground for internal clock multiplier |
| 26 | TEST | Input | IC test mode pin. Must be tied to GND for normal operation |
| 27 | OSCI | Input | 12MHz Oscillator input (optional; can be left unconnected for internal oscillator) |
| 28 | OSCO | Output | 12MHz Oscillator output (optional; can be left unconnected for internal oscillator) |
Notes
- Input pins (RXD, RI#, DSR#, DCD#, CTS#) are pulled to VCCIO via internal 200kΩ resistors. Can be programmed to gently pull low during USB suspend when PWREN# = '1'.
- CBUS pins are fully configurable via internal EEPROM using FT_PPROG or MPROG utilities. See Table 3.9 in datasheet for all available signal options (TXDEN, PWREN#, TXLED#, RXLED#, TX&RXLED#, SLEEP#, CLK48/24/12/6, CBitBangI/O, BitBangWRn, BitBangRDn).
- VCC minimum is +4.0V when using internal clock generator; +3.3V operation requires external crystal oscillator.
- 3V3OUT can supply up to 50mA and is typically used to power external logic or supply VCCIO pin.
Electrical Characteristics
The I/O pins are +3.3v cells, which are +5V tolerant (except the USB PHY pins).
DC Characteristics (Ambient Temperature = -40°C to +85°C)
Table 5.2 Operating Voltage and Current (except PHY)
| Parameter | Description | Minimum | Typical | Maximum | Units | Conditions |
|---|---|---|---|---|---|---|
| VCORE | VCC Core Operating Supply Voltage | 1.62 | 1.8 | 1.98 | V | |
| VCCIO* | VCCIO Operating Supply Voltage | 2.97 | 3.63 | V | Cells are 5V tolerant | |
| VREGIN 5 Volts | VREGIN Voltage regulator Input | 3.6 | 5 | 5.5 | V | 5 volt input to VREGIN |
| VREGIN 3.3 Volts | VREGIN Voltage regulator Input | 3.3 | 3.3 | 3.6 | V | 3.3 volt input to VREGIN |
| Ireg | Regulator Current | 54 | mA | VREGIN +5V | ||
| Ireg | Regulator Current | 52 | mA | VREGIN +3.3V | ||
| Icc1 | Core Operating Supply Current | 24 | mA | VCORE = +1.8V Normal Operation | ||
| Icc1r | Core Reset Supply Current | 4.3 | mA | VCORE = +1.8V Device in reset state | ||
| Icc1s | Core Suspend Supply Current | 330 | μA | VCORE = +1.8V USB Suspend |
*NOTE: Failure to connect all VCCIO pins of the device will have unpredictable behaviour.
Table 5.2 Operating Voltage and Current (except PHY)
The I/O pins are +3.3v cells, which are +5V tolerant (except the USB PHY pins).
| Parameter | Description | Minimum | Typical | Maximum | Units | Conditions |
|---|---|---|---|---|---|---|
| Voh | Output Voltage High | 2.4 | VCCIO | VCCIO | V | Ioh = +/-2mA I/O Drive strength* = 4mA |
| Voh | Output Voltage High | 2.4 | VCCIO | VCCIO | V | I/O Drive strength* = 8mA |
| Voh | Output Voltage High | 2.4 | VCCIO | VCCIO | V | I/O Drive strength* = 12mA |
| Voh | Output Voltage High | 2.4 | VCCIO | VCCIO | V | I/O Drive strength* = 16mA |
| Vol | Output Voltage Low | 0 | 0.4 | V | Iol = +/-2mA I/O Drive strength* = 4mA | |
| Vol | Output Voltage Low | 0 | 0.4 | V | I/O Drive strength* = 8mA | |
| Vol | Output Voltage Low | 0 | 0.4 | V | I/O Drive strength* = 12mA | |
| Vol | Output Voltage Low | 0 | 0.4 | V | I/O Drive strength* = 16mA | |
| Vil | Input low Switching Threshold | 0.8 | V | LVTTL | ||
| Vih | Input High Switching Threshold | 2 | V | LVTTL | ||
| Vt | Switching Threshold | 1.5 | V | LVTTL | ||
| Vt- | Schmitt trigger negative going threshold voltage | 0.8 | 1.1 | V | ||
| Vt+ | Schmitt trigger positive going threshold voltage | 1.6 | 2.0 | V | ||
| Rpu | Input pull-up resistance | 40 | 75 | 190 | KΩ | Vin = 0 |
| Rpd | Input pull-down resistance | 40 | 75 | 190 | KΩ | Vin =VCCIO |
| Iin | Input Leakage Current | -10 | +/-1 | 10 | μA | Vin = 0 |
| Ioz | Tri-state output leakage current | -10 | +/-1 | 10 | μA | Vin = 5.5V or 0 |
Table 5.3 I/O Pin Characteristics VCCIO = +3.3V (except USB PHY pins)
- The I/O drive strength and slow slew-rate are configurable in the EEPROM.
FT232H SINGLE CHANNEL HI-SPEED USB TO MULTIPURPOSE UART/FIFO IC
DC Characteristics (Ambient Temperature = -40°C to +85°C)
| Parameter | Description | Minimum | Typical | Maximum | Units | Conditions |
|---|---|---|---|---|---|---|
| VPHY, VPLL | PHY Operating Supply Voltage | 3.0 | 3.3 | 3.6 | V | 3.3V I/O |
| Iccphy | PHY Operating Supply Current | --- | 30 | 60 | mA | Hi-speed operation at 480 MHz |
| Iccphy (susp) | PHY Operating Supply Current | --- | 10 | 50 | μA | USB Suspend |
Table 5.4 PHY Operating Voltage and Current
| Parameter | Description | Minimum | Typical | Maximum | Units | Conditions |
|---|---|---|---|---|---|---|
| Voh | Output Voltage High | VCORE- 0.2 | V | |||
| Vol | Output Voltage Low | 0.2 | V | |||
| Vil | Input low Switching Threshold | - | 0.8 | V | ||
| Vih | Input High Switching Threshold | 2.0 | - | V |
Absolute Maximum Ratings
The absolute maximum ratings for the FT232H devices are as follows. These are in accordance with the Absolute Maximum Rating System (IEC 60134). Exceeding these values may cause permanent damage to the device.
| Parameter | Value | Unit | Conditions |
|---|---|---|---|
| Storage Temperature | -65°C to 150°C | Degrees C | |
| Floor Life (Out of Bag) At Factory Ambient (30°C / 60% Relative Humidity) | 168 Hours (IPC/JEDEC J- STD-033A MSL Level 3 Compliant)* | Hours | |
| Ambient Operating Temperature (Power Applied) | -40°C to 85°C | Degrees C | |
| MTTF FT232HL | TBD | Hours | |
| MTTF FT232HL | TBD | Hours | |
| VCORE Supply Voltage | -0.3 to +2.0 | V | |
| VCCIO IO Voltage | -0.3 to +4.0 | V | |
| DC Input Voltage - USBDP and USBDM | -0.5 to +3.63 | V | |
| DC Input Voltage - High Impedance Bi-directionals (powered from VCCIO) | -0.3 to +5.8 | V | |
| DC Output Current - Outputs | 16 | mA |
- If devices are stored out of the packaging beyond this time limit the devices should be baked before use. The devices should be ramped up to a temperature of +125°C and baked for up to 17 hours.
Typical Application
- Single chip USB to UART (RS232, RS422 or RS485)
- USB to FIFO
- USB to FT1248
- USB to JTAG
- USB to SPI
- USB to I 2 C
- USB to Bit-Bang
- USB to Fast Serial Interface
- USB to CPU target interface (as memory)
Package Information
Figure 8.1 48 pin QFN Package Details
Related Variants
The following components are covered by the same datasheet.
| Part Number | Manufacturer | Package |
|---|---|---|
| FT232H | FTDI | — |
| FT232HL | FTDI | — |
| FT232HQ | FTDI | — |
| FT232HQ-XXXX | FTDI | — |
| FT232R | FTDI | — |
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