ESP32-S3

Part: ESP32-S3 Series

Type: Low-Power MCU-based System-on-Chip (SoC)

Key Specs:

• CPU: Xtensa® dual-core 32-bit LX7 microprocessor, up to 240 MHz
• Wi-Fi: IEEE 802.11 b/g/n (2.4 GHz), up to 150 Mbps
• Bluetooth: Bluetooth LE 5, up to 2 Mbps
• On-chip SRAM: 512 KB
• On-chip ROM: 384 KB
• Programmable GPIOs: 45

Features:

• 2.4 GHz Wi-Fi (IEEE 802.11b/g/n, Station, SoftAP, SoftAP + Station modes, 20/40 MHz bandwidth, 1T1R, WMM, A-MPDU/A-MSDU, Block ACK, Fragmentation/defragmentation, Beacon monitoring, 4 virtual Wi-Fi interfaces, Antenna diversity, 802.11mc FTM, External PA support)
• Bluetooth LE (Bluetooth 5, Bluetooth mesh, High power mode 20 dBm, Advertising extensions, Multiple advertisement sets,

WiFi

• IEEE 802.11 b/g/n-compliant
• Supports 20 MHz, 40 MHz bandwidth in 2.4 GHz band
• 1T1R mode with data rate up to 150 Mbps
• Wi-Fi Multimedia (WMM)
• TX/RX A-MPDU, TX/RX A-MSDU
• Immediate Block ACK
• Fragmentation and defragmentation
• Automatic Beacon monitoring (hardware TSF)
• 4 × virtual Wi-Fi interfaces
• Simultaneous support for Infrastructure BSS in Station, SoftAP, or Station + SoftAP modes Note that when ESP32-S3 scans in Station mode, the SoftAP channel will change along with the Station channel
• Antenna diversity
• 802.11mc FTM
• External PA is supported

Bluetooth

• Bluetooth LE: Bluetooth 5, Bluetooth mesh

• High power mode (20 dBm, share the same PA with Wi-Fi)
• Speed: 125 Kbps, 500 Kbps, 1 Mbps, 2 Mbps
• Advertising extensions
• Multiple advertisement sets
• Channel selection algorithm #2
• Internal co-existence mechanism between Wi-Fi and Bluetooth to share the same antenna

CPU and Memory

• Xtensa® dual-core 32-bit LX7 microprocessor, up to 240 MHz

• CoreMark® score:

  • 1 core at 240 MHz: 613.86 CoreMark; 2.56 CoreMark/MHz
  • 2 cores at 240 MHz: 1181.60 CoreMark; 4.92 CoreMark/MHz

• 128-bit data bus and SIMD commands

• 384 KB ROM

• 512 KB SRAM

• 16 KB SRAM in RTC

• SPI, Dual SPI, Quad SPI, Octal SPI, QPI and OPI

• interfaces that allow connection to multiple flash and external RAM

• Flash controller with cache is supported

• Flash in-Circuit Programming (ICP) is supported

Advanced Peripheral Interfaces

• 45 × programmable GPIOs

• Digital interfaces:

  • 4 × SPI
  • 1 × LCD interface (8-bit ~16-bit parallel RGB, I8080 and MOTO6800), supporting conversion between RGB565, YUV422, YUV420 and YUV411
  • 1 × DVP 8-bit ~16-bit camera interface
  • 3 × UART
  • 2 × I2C
  • 2 × I2S
  • 1 × RMT (TX/RX)
  • 1 × pulse counter
  • LED PWM controller, up to 8 channels
  • 1 × full-speed USB OTG
  • 1 × USB Serial/JTAG controller
  • 2 × MCPWM
  • 1 × SDIO host controller with 2 slots
  • General DMA controller (GDMA), with 5 transmit channels and 5 receive channels
  • 1 × TWAI® controller, compatible with ISO 11898-1 (CAN Specification 2.0)

• Analog interfaces:

  • 2 × 12-bit SAR ADCs, up to 20 channels
  • 1 × temperature sensor
  • 14 × touch sensing IOs

• Timers:

  • 4 × 54-bit general-purpose timers
  • 1 × 52-bit system timer
  • 3 × watchdog timers

Low Power Management

• Power Management Unit with five power modes
• Ultra-Low-Power (ULP) coprocessors:
  • ULP-RISC-V coprocessor
  • ULP-FSM coprocessor

Security

• Secure boot
• Flash encryption
• 4-Kbit OTP, up to 1792 bits for users
• Cryptographic hardware acceleration:
  • AES-128/256 (FIPS PUB 197)
  • Hash (FIPS PUB 180-4)
  • RSA
  • Random Number Generator (RNG)
  • HMAC
  • Digital signature

With low power consumption, ESP32-S3 is an ideal choice for IoT devices in the following areas:

• Smart Home

  • Light control
  • Smart button
  • Smart plug

• Industrial Automation

• Industrial robot

• Mesh network

• Human machine interface (HMI)

• Health Care

  • Health monitor

• Baby monitor

• Consumer Electronics

  • Smart watch and bracelet
  • Over-the-top (OTT) devices
  • Wi-Fi and bluetooth speaker
  • Logger toys and proximity sensing toys

• Smart Agriculture

  • Smart greenhouse
  • Smart irrigation
  • Agriculture robot

• Retail and Catering

  • POS machines
  • Service robot

• Audio Device

  • Internet music players
  • Live streaming devices

• Internet radio players

• Generic Low-power IoT Sensor Hubs

• Generic Low-power IoT Data Loggers

• Cameras for Video Streaming

• USB Devices

• Speech Recognition

• Image Recognition

• Wi-Fi + Bluetooth Networking Card

• Touch Sensing

  • Waterproof design
  • Distance sensing applications
  • Linear slider, wheel slider designs

Note:

ESP32-S3 Touch Sensor has not passed the Conducted Susceptibility (CS) test for now, and thus has limited application scenarios.

Table 2: Pin Description

| Name | No. | Type | Power Domain | Function | |------------|-----|-------|--------------|------------------------------------------------------|------------|-----------------|-----------|------------|------------|---------|--| | LNA_IN | 1 | I/O | _ | Low Noise Amplifier (RF LNA) input and output signal | | VDD3P3 | 2 | $P_A$ | | Analog power supply | | VDD3P3 | 3 | $P_A$ | _ | Analog power sup | oply | | | | | | High: on, enables | the chip. | | CHIP_PU | 4 | 1 | VDD3P3_RTC | Low: off, the chip | powers of | f. | | | | | | Note: Do not leav | e the CHIF | P_PU pin floati | ng. | | GPIO0 | 5 | I/O/T | VDD3P3_RTC | RTC_GPIO0, | GPIO0 | | GPIO1 | 6 | I/O/T | VDD3P3_RTC | RTC_GPIO1, | GPIO1, | TOUCH1, | ADC1_CH0 | | GPIO2 | 7 | I/O/T | VDD3P3_RTC | RTC_GPIO2, | GPIO2, | TOUCH2, | ADC1_CH1 | | GPIO3 | 8 | I/O/T | VDD3P3_RTC | RTC_GPIO3, | GPIO3, | TOUCH3, | ADC1_CH2 | | GPIO4 | 9 | I/O/T | VDD3P3_RTC | RTC_GPIO4, | GPIO4, | TOUCH4, | ADC1_CH3 | | GPIO5 | 10 | I/O/T | VDD3P3_RTC | RTC_GPIO5, | GPIO5, | TOUCH5, | ADC1_CH4 | | GPIO6 | 11 | I/O/T | VDD3P3_RTC | RTC_GPIO6, | GPIO6, | TOUCH6, | ADC1_CH5 | | GPIO7 | 12 | I/O/T | VDD3P3_RTC | RTC_GPIO7, | GPIO7, | TOUCH7, | ADC1_CH6 | | GPIO8 | 13 | I/O/T | VDD3P3_RTC | RTC_GPIO8, | GPIO8, | TOUCH8, | ADC1_CH7, | SUBSPICS1 | | GPIO9 | 14 | I/O/T | VDD3P3_RTC | RTC_GPIO9, | GPIO9, | TOUCH9, | ADC1_CH8, | SUBSPIHD, | FSPIHD | | GPIO10 | 15 | I/O/T | VDD3P3_RTC | RTC_GPIO10, | GPIO10, | TOUCH10, | ADC1_CH9, | FSPIIO4, | SUBSPICSO, | FSPICS0 | | GPIO11 | 16 | I/O/T | VDD3P3_RTC | RTC_GPIO11, | GPIO11, | TOUCH11, | ADC2_CH0, | FSPIIO5, | SUBSPID, | FSPID | | GPIO12 | 17 | I/O/T | VDD3P3_RTC | RTC_GPIO12, | GPIO12, | TOUCH12, | ADC2_CH1, | FSPIIO6, | SUBSPICLK, | FSPICLK | | GPIO13 | 18 | I/O/T | VDD3P3_RTC | RTC_GPIO13, | GPIO13, | TOUCH13, | ADC2_CH2, | FSPIIO7, | SUBSPIQ, | FSPIQ | | GPIO14 | 19 | I/O/T | VDD3P3_RTC | RTC_GPIO14, | GPIO14, | TOUCH14, | ADC2_CH3, | FSPIDQS, | SUBSPIWP, | FSPIWP | | VDD3P3_RTC | 20 | $P_A$ | | Analog power sup | oply | | XTAL_32K_P | 21 | I/O/T | VDD3P3_RTC | RTC_GPIO15, | GPIO15, | U0RTS, | ADC2_CH4, | XTAL_32K_P | | XTAL_32K_N | 22 | I/O/T | VDD3P3_RTC | RTC_GPIO16, | GPIO16, | U0CTS, | ADC2_CH5, | XTAL_32K_N | | GPIO17 | 23 | I/O/T | VDD3P3_RTC | RTC_GPIO17, | GPIO17, | U1TXD, | ADC2_CH6 | | GPIO18 | 24 | I/O/T | VDD3P3_RTC | RTC_GPIO18, | GPIO18, | U1RXD, | ADC2_CH7, | CLK_OUT3 | | Name | No. | Type | Power Domain | Function | |------------|-----|-------|----------------------|--------------------|-------------|-------------|-----------|-----------|--------| | GPIO19 | 25 | I/O/T | VDD3P3_RTC | RTC_GPIO19, | GPIO19, | U1RTS, | ADC2_CH8, | CLK_OUT2, | USB_D- | | GPIO20 | 26 | I/O/T | VDD3P3_RTC | RTC_GPIO20, | GPI020, | U1CTS, | ADC2_CH9, | CLK_OUT1, | USB_D+ | | GPIO21 | 27 | I/O/T | VDD3P3_RTC | RTC_GPIO21, | GPIO21 | | SPICS1 | 28 | I/O/T | VDD_SPI | SPICS1, | GPIO26 | | VDD_SPI | 29 | $P_D$ | _ | Output power su | pply: 1.8 V | or VDD3P3_F | RTC | | SPIHD | 30 | I/O/T | VDD_SPI | SPIHD, | GPIO27 | | SPIWP | 31 | I/O/T | VDD_SPI | SPIWP, | GPIO28 | | SPICS0 | 32 | I/O/T | VDD_SPI | SPICS0, | GPIO29 | | SPICLK | 33 | I/O/T | VDD_SPI | SPICLK, | GPIO30 | | SPIQ | 34 | I/O/T | VDD_SPI | SPIQ, | GPIO31 | | SPID | 35 | I/O/T | VDD_SPI | SPID, | GPIO32 | | SPICLK_N | 36 | I/O/T | VDD_SPI | SPICLK_N_DIFF, | GPIO48, | SUBSPICLK | _N_DIFF | | SPICLK_P | 37 | I/O/T | VDD_SPI | SPICLK_P_DIFF, | GPIO47, | SUBSPICLK | _P_DIFF | | GPIO33 | 38 | I/O/T | VDD3P3_CPU / VDD_SPI | SPIIO4, | GPIO33, | FSPIHD, | SUBSPIHD | | GPIO34 | 39 | I/O/T | VDD3P3_CPU / VDD_SPI | SPIIO5, | GPIO34, | FSPICS0, | SUBSPICS0 | | GPIO35 | 40 | I/O/T | VDD3P3_CPU / VDD_SPI | SPIIO6, | GPIO35, | FSPID, | SUBSPID | | GPIO36 | 41 | I/O/T | VDD3P3_CPU / VDD_SPI | SPIIO7, | GPIO36, | FSPICLK, | SUBSPICLK | | GPIO37 | 42 | I/O/T | VDD3P3_CPU / VDD_SPI | SPIDQS, | GPIO37, | FSPIQ, | SUBSPIQ | | GPIO38 | 43 | I/O/T | VDD3P3_CPU | GPIO38, | FSPIWP, | SUBSPIWP | | MTCK | 44 | I/O/T | VDD3P3_CPU | MTCK, | GPIO39, | CLK_OUT3, | SUBSPICS1 | | MTDO | 45 | I/O/T | VDD3P3_CPU | MTDO, | GPIO40, | CLK_OUT2 | | VDD3P3_CPU | 46 | $P_D$ | _ | Input power supp | oly for CPU | Ю | | MTDI | 47 | I/O/T | VDD3P3_CPU | MTDI, | GPI041, | CLK_OUT1 | | MTMS | 48 | I/O/T | VDD3P3_CPU | MTMS, | GPIO42 | | U0TXD | 49 | I/O/T | VDD3P3_CPU | U0TXD, | GPIO43, | CLK_OUT1 | | U0RXD | 50 | I/O/T | VDD3P3_CPU | U0RXD, | GPIO44, | CLK_OUT2 | | GPIO45 | 51 | I/O/T | VDD3P3_CPU | GPIO45 | | GPIO46 | 52 | I/O/T | VDD3P3_CPU | GPIO46 | | XTAL_N | 53 | _ | _ | External crystal o | output | 2 Pin Definition

^<sup>1 P: power pin; $P_A$ : analog power pin; $P_D$ : digital power pin; I: input; O: output; T: high impedance.

$^{^2}$ Pin functions in bold font are the default pin functions in SPI Boot mode. For pins No.38 $\sim$ 42, the default function is decided by eFuse bit.

^<sup>3 Power supply for GPIO33, GPIO34, GPIO35, GPIO36 and GPIO37 is configurable to be either VDD3P3_CPU (default) or VDD_SPI.

^<sup>4 The pin function in this table refers only to some fixed settings and do not cover all cases for signals that can be input and output through the GPIO matrix. For more information on the GPIO matrix, please refer to ESP32-S3 Technical Reference Manual.

Table 17: DC Characteristics (3.3 V, 25 °C)

¹ VDD is the I/O voltage for a particular power domain of pins.

Stresses beyond the absolute maximum ratings listed in the table below may cause permanent damage to the device. These are stress ratings only, and do not refer to the functional operation of the device.

Table 14: Absolute Maximum Ratings

^* The chip worked properly after a 24-hour test in ambient temperature at 25 °C, and the IOs in three domains (VDD3P3_RTC, VDD3P3_CPU, VDD_SPI) output high logic level to ground.

Table 15: Recommended Operating Conditions