EFP0103
Multi-Output Energy Friendly PMICThe EFP0103 is a multi-output energy friendly pmic from Silicon Labs. View the full EFP0103 datasheet below including key specifications, electrical characteristics, absolute maximum ratings.
EFP0103 shares its datasheet with EFP0101, whose page lists every part number it covers.
Official EFP0103 datasheet (PDF) — the source this page was extracted from.
EFP0103 Key Specifications
| Parameter | Value |
|---|---|
| Package | QFN20 3x3mm |
| Peak Efficiency | up to 94% |
| Temperature Grade | G (-40°C to 85°C) |
| Device Configuration | Wired Buck with LDO C |
| Communication Interface | I2C, with IRQ pin |
| VOA Output Voltage Range | 1.7V to 3.3V |
| VOC Output Voltage Range | 1.7V to 3.3V (linear regulator) |
| Family Input Voltage Range | 0.8V to 5.5V |
| Junction Temperature Range | -40°C to 100°C |
| VOA Default Output Voltage | 1.86V |
| VOB Startup Default (EFP0103) | 1.858V |
| VOB Output Voltage Range (EFP0103) | 0.8V to 3.3V |
| Input Voltage Range (VDDB, EFP0103) | 1.8V to 5.5V |
| Quiescent Current (EM2, No Outputs Enabled) | 150nA |
| Maximum Output Load Current (VOA, Wired Buck) | 150mA min |
| Quiescent Current (EM2, Single Output Enabled) | 300nA |
EFP0103 Overview
Part: EFP01 Energy Friendly PMIC Family (EFP0101–EFP0111, e.g. EFP0101GM20-E) — Silicon Labs
Type: Multi-output Power Management IC (Buck/Boost DC-DC, Buck DC-DC, LDOs, Coulomb Counter)
Description: 0.8–5.5 V input, 4-output PMIC with buck/boost DC-DC A, buck DC-DC B, LDO C and a switched output, up to 94% efficiency, 300 nA EM2 quiescent current (single output), and a lossless Coulomb counter.
Operating Conditions:
- Supply voltage: 0.8–5.5 V (OPN-dependent, e.g. 1.8–5.5 V for EFP0101/02/03/04/06/07; 0.8–1.8 V for EFP0108)
- Operating junction temperature: -40 to 100 °C (-G grade)
- VIO input voltage range: 1.7–5.5 V
- VOA: 1.7–5.2 V; VOB: 0.8–3.3 V (or 0.8–1.26 V on some OPNs); VOC: 1.7–3.3 V
Absolute Maximum Ratings:
- Max DC voltage on VDDA: 2.0 V
- Max DC voltage on VDDB: 5.5 V (transient 6.5 V, t < 30 μs, duty cycle < 0.01%)
- Max voltage on VIO: 5.5 V; on any I/O pin: VVIO + 0.3 V
- Max voltage on output pins (VOA, VOB, VOC, VOA_SW): 5.5 V
- Max on-chip power dissipation: 923 mW (2-layer PCB), 1136 mW (4-layer PCB), at TAMBIENT = 25 °C
- Storage temperature: -50 to 150 °C
- Max operating junction temperature: 105 °C (-G grade)
Key Specs:
- Quiescent current into VDDB, EM2: 300 nA typ (1 output enabled), 425 nA typ (2 outputs), 525 nA typ (3 outputs)
- Quiescent current into VDDB, EM4 (all coarse regulators enabled): 57 nA typ, 2060 nA max
- Quiescent current into VDDA (EM0/EM2, VDDA = 1.8 V): 24 nA typ, 670 nA max
- Bootup time to I2C ready: 1200 μs typ
- Power-on reset threshold: rising 1.702 V max; falling 1.58–1.68 V
- UVLO threshold: 1.2 V typ
- DCDC A buck PMOS RDS(on): 0.150 Ω typ, 0.676 Ω max (VDDB = 3.3 V)
- Recommended capacitors: CIN 10 μF typ, COUT 10 μF typ (25% tolerance)
Features:
- DCDC A configurable as Buck/Boost, Buck-only or Boost-only
- DCDC B buck with parallel internal linear regulator
- VOC linear regulator, usable independently or combined with DCDC A
- Switched output (VOA_SW) for powering down leaky external circuits
- Lossless Coulomb counter (no sense resistor)
- Fully configurable I2C, Direct Mode for fast energy-mode transitions, IRQ pin
- Programmable inrush current and short-circuit tolerant outputs
- UVLO, over-temperature monitoring and IRQ assertion
- Supports alkaline, lithium primary, NiMH/NiCd, Li-ion/LiPo, LiFePO4 and USB sources
Applications:
- IoT sensors and end devices
- Metering
- Home and building automation and security
- Health and wellness
- Wearables
- Smart accessories
- Human interface devices
Package:
- QFN20 3x3 mm
EFP0103 Features
- Provides 4 supply outputs:
- One Buck/Boost DC-DC Converter
- One Buck-only DC-DC Converter + LDO
- One LDO
- One Switched Output
- Up to 94% efficiency
EFP0103 Electrical Characteristics
Unless stated otherwise, all electrical parameters in all tables are specified under the following conditions:
- Typical values are based on T J =25 °C and V DDB =V IO =3.3V and VOA=VOB=VOC=1.8V, by production test and/or technology characterization.
- Unless stated otherwise, minimum and maximum values represent the worst conditions across supply voltage, process variation, and operating temperature.
- Energy mode (EM0/EM2/EM4) programming is defined in Table 3.8 Energy Modes Overview on page 22
- EM0: BIAS_SW.BIAS0=7, EM_CRSREG_CTRL.EM_STSEL=0
- EM2: BIAS_SW.BIAS2=1, EM_CRSREG_CTRL.EM_STSEL=2
- EM4: EM_CRSREG_CTRL.EM_STSEL=3
- Test board components:
- LDCDC = 2.2 μH (Samsung CIG22H2R2MAE)
- CIN = COUT = 10 μF (Murata GRM31CR71A106KA01)
EFP0103 Absolute Maximum Ratings
Stresses above those listed below may cause permanent damage to the device. This is a stress rating only and functional operation of the devices at those or any other conditions above those indicated in the operation listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. For more information on the available quality and reliability data, see the Quality and Reliability Monitor Report at https://www.silabs.com/about-us/corporate-responsibility/commitment-toquality.
Table 5.1. Absolute Maximum Ratings
| Parameter | Symbol | Test Condition | Min | Typ | Max | Unit |
|---|---|---|---|---|---|---|
| Storage temperature range | T STG | -50 | - | 150 | °C | |
| DC voltage on input supply pins VDDA 1 | V VDDA | -0.3 | - | 2.0 | V | |
| DC voltage on input supply pins VDDB 1 | V VDDB_DC | -0.3 | - | 5.5 | V | |
| Transient voltage on input supply pin VDDB 1 | V VDDB_TRN | t < 30 μs, duty cycle < 0.01% | - | - | 6.5 | V |
| DC voltage connected through inductor to LA2 pin in boost configurations. 1 | V VBOOST | -0.3 | - | 5.5 | V | |
| Voltage on output supply pins: VOA, VOB, VOC, VOA_SW | V OUT | -0.3 | - | 5.5 | V | |
| DC voltage on VIO supply pin | V VIO | -0.3 | - | 5.5 | V | |
| DC voltage on any I/O pin | V DIGPIN | -0.3 | - | V VIO +0.3 | V | |
| On-chip power dissipation 2 | P DIS | 2-layer PCB, THETA JA = 81.2 °C/W, T AMBIENT = 25 °C | - | - | 923 | mW |
| On-chip power dissipation 2 | P DIS | 4-layer PCB, THETA JA = 66.0 °C/W, T AMBIENT = 25 °C | - | - | 1136 | mW |
| Operating Junction tempera- ture | T J | -G grade devices | -40 | - | 105 | °C |
-
Note that there is no reverse battery insertion protection implemented on-chip. Applications that may be susceptible to a reverse battery insertion should incorporate external protection circuitry.
-
Max on-chip power dissipation is given by: P MAX = (100 °C - T AMBIENT ) / THETA JA
EFP0103 Thermal Information
Table 5.2. Thermal Characteristic
| Parameter | Symbol | Test Condition | Min | Typ | Max | Unit |
|---|---|---|---|---|---|---|
| Thermal impedance, junc- tion-to-ambient QFN20 (3x3mm) | THETA JA | 2 layer PCB, Natural Convection 1 | - | 81.2 | - | °C/W |
| Thermal impedance, junc- tion-to-ambient QFN20 (3x3mm) | THETA JA | 4 layer PCB, Natural Convection 1 | - | 66.0 | - | °C/W |
| Thermal impedance, junc- tion-to-board QFN20 (3x3mm) | THETA JB | 2 layer PCB, Natural Convection 1 | - | 37.9 | - | °C/W |
| Thermal impedance, junc- tion-to-board QFN20 (3x3mm) | THETA JB | 4 layer PCB, Natural Convection 1 | - | 27 | - | °C/W |
| Thermal impedance, junc- tion-to-case QFN20 (3x3mm) | THETA JC | 2 layer PCB, Natural Convection 1 | - | 46.5 | - | °C/W |
| Thermal impedance, junc- tion-to-case QFN20 (3x3mm) | THETA JC | 4 layer PCB, Natural Convection 1 | - | 34.6 | - | °C/W |
| Junction-to-top thermal char- acterization parameter QFN20 (3x3mm) | PSI JT | 2 layer PCB, Natural Convection 1 | - | 2.6 | - | °C/W |
| Junction-to-top thermal char- acterization parameter QFN20 (3x3mm) | PSI JT | 4 layer PCB, Natural Convection 1 | - | 1.9 | - | °C/W |
| Junction-to-bottom thermal characterization parameter QFN20 (3x3mm) | PSI JB | 2 layer PCB, Natural Convection 1 | - | 39.1 | - | °C/W |
| Junction-to-bottom thermal characterization parameter QFN20 (3x3mm) | PSI JB | 4 layer PCB, Natural Convection 1 | - | 26.7 | - | °C/W |
- Measured according to JEDEC standard JESD51-2A Integrated Circuit Thermal Test Method Environmental Conditions - Natural Convection (Still Air).
EFP0103 Package Information
Figure 9.1. QFN20 Package Drawing
Table 9.1. QFN20 Package Dimensions
| Dimension | Min | Typ | Max |
|---|---|---|---|
| A | 0.80 | 0.85 | 0.90 |
| A1 | 0.00 | 0.02 | 0.05 |
| A3 | 0.20 REF | 0.20 REF | 0.20 REF |
| b | 0.18 | 0.25 | 0.30 |
| c | 0.20 | 0.25 | 0.30 |
| D | 3.00 BSC | 3.00 BSC | 3.00 BSC |
| D2 | 1.60 | 1.70 | 1.80 |
| e | 0.50 BSC | 0.50 BSC | 0.50 BSC |
| E | 3.00 BSC | 3.00 BSC | 3.00 BSC |
| E2 | 1.60 | 1.70 | 1.80 |
| f | 2.45 BSC | 2.45 BSC | 2.45 BSC |
| K | 0.20 | - | - |
| L | 0.30 | 0.40 | 0.50 |
| R | 0.09 | - | 0.15 |
| aaa | - | - | 0.15 |
| bbb | - | - | 0.10 |
| ccc | - | - | 0.08 |
| ddd | - | - | 0.10 |
| eee | - | - | 0.10 |
| ggg | - | - | 0.05 |
| Note: | Note: | Note: | Note: |
Variants on the same datasheet
These parts have exact links to the same datasheet. They are candidates to compare, not verified drop-in replacements; check package, pinout and electrical limits.
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All Power Management datasheetsAll Silicon Labs datasheets (179)
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