ADE9000
[ADE9000](https://www.analog.com/ade9000)
Multiphase Energy and Power Quality Monitoring ICManufacturer
Analog Devices
Package
CP-40-71
Key Specifications
| Parameter | Value |
|---|---|
| ADC SNR | 101 dB |
| Channel Drift | ±25 ppm/°C max |
| Number Of ADCs | 7 |
| Clock Frequency | 24.576 MHz |
| Supply Voltage Range | 2.97 V to 3.63 V |
| Communication Interface | SPI (up to 20 MHz) |
| Operating Temperature Range | -40°C to +85°C |
| Temperature Sensor Accuracy | ±3°C (-40°C to +85°C) |
| Package Thermal Resistance (θJA) | 27.14 °C/W |
| ADC Differential Input Voltage Range | ±1 V |
| Typical Supply Current (Normal Mode) | 15 mA |
Overview
Part: ADE9000 from Analog Devices
Type: High Performance, Multiphase Energy, and Power Quality Monitoring IC
Key Specs:
- ADCs: 7
- SNR: 101 dB
- Input Voltage Range: ±1 V, 707 mV rms FS at gain = 1
- Maximum Channel Drift: ±25 ppm/°C
- SPI Speed: 20 MHz
- Integrated Temperature Sensor Accuracy: ±3°C from -40°C to +85°C
- Supply Voltage (VDD): 2.97 V to 3.63 V
- Operating Temperature Range: -40°C to +85°C
Features:
- Differential inputs
- Power quality measurements (IEC 61000-4-30, VRMS ½, IRMS ½, 10 cycle rms/12 cycle rms, dip and swell monitors, line frequency, zero crossing, phase angle measurements)
- Supports CTs and Rogowski coil (di/dt) sensors with multiple range phase/gain compensation and digital integrator
- Flexible waveform buffer (resamples to 128 points per line cycle, event-triggered storage, simplifies IEC 61000-4-7 harmonic analysis)
- Advanced metrology feature set (total and fundamental active power, VAR, VA, watthour, VAR hour, VA hour, IRMS, VRMS, THD, power factor)
- Supports active energy standards: IEC 62053-21, IEC 62053-22, EN50470-3, OIML R46, ANSI C12.20
- Supports reactive energy standards: IEC 62053-23, IEC 62053-24
- Integrated temperature sensor with 12-bit SAR ADC
Applications:
- Energy and power monitoring
- Power quality monitoring
- Protective devices
- Machine health
- Smart power distribution units
- Polyphase energy meters
Package:
- null
Features
- ► 7 high performance ADCs
- ► 101 dB SNR
- ► Wide input voltage range: ±1 V, 707 mV rms FS at gain = 1
- ► Differential inputs
- ► ±25 ppm/°C maximum channel drift (including ADC, internal VREF, PGA drift) enabling 10000:1 dynamic input range Class 0.2 metrology with standard external components
- ► Power quality measurements
- ► Enables implementation of IEC 61000-4-301
- ► VRMS ½, IRMS ½ rms voltage refreshed each half cycle
- ► 10 cycle rms/12 cycle rms
- ► Dip and swell monitors
- ► Line frequency—one per phase
- ► Zero crossing, zero-crossing timeout
- ► Phase angle measurements
- ► Supports CTs and Rogowski coil (di/dt) sensors
- ► Multiple range phase/gain compensation for CTs
- ► Digital integrator for Rogowski coils
- ► Flexible waveform buffer
- ► Able to resample waveform to ensure 128 points per line cycle for ease of external harmonic analysis
- ► Events, such as dip and swell, can trigger waveform storage
- ► Simplifies data collection for IEC 61000-4-7 harmonic analysis
- ► Advanced metrology feature set
- ► Total and fundamental active power, volt amperes reactive (VAR), volt amperes (VA), watthour, VAR hour, and VA hour
- ► Total and fundamental IRMS, VRMS
- ► Total harmonic distortion
- ► Power factor
- ► Supports active energy standards: IEC 62053-21 and IEC 62053-22; EN50470-3; OIML R46; and ANSI C12.20
- ► Supports reactive energy standards: IEC 62053-23, IEC 62053-24
- ► High speed communication port: 20 MHz serial port interface (SPI)
- ► Integrated temperature sensor with 12-bit successive approximation register (SAR) ADC
- ► ±3°C accuracy from -40°C to +85°C
Applications
- ► Energy and power monitoring
- ► Power quality monitoring
- ► Protective devices
- ► Machine health
- ► Smart power distribution units
- ► Polyphase energy meters
1 For IEC 61000-4-30 Class S implementation, refer to the ADE9430 IC data sheet.
Rev. B
Pin Configuration
ADE9000 Pinout
Package: CP-40-71 (40-pin)
| Pin | Name | Type | Description |
|---|---|---|---|
| 1 | VDDA | P | Analog Power Supply (+3.3V) |
| 2 | XTAL1 | I | Crystal Oscillator Input |
| 3 | XTAL2 | O | Crystal Oscillator Output |
| 4 | VSSA | P | Analog Ground |
| 5 | VDDD | P | Digital Power Supply (+3.3V) |
| 6 | VSSD | P | Digital Ground |
| 7 | CLKIN | I | External Clock Input |
| 8 | IRQ0 | O | Interrupt Request Output 0 |
| 9 | IRQ1 | O | Interrupt Request Output 1 |
| 10 | PM0 | I | Power Mode Select 0 |
| 11 | PM1 | I | Power Mode Select 1 |
| 12 | RESET | I | Reset Input (Active Low) |
| 13 | SPI_CLK | I | SPI Clock |
| 14 | SPI_MOSI | I | SPI Master Out Slave In |
| 15 | SPI_MISO | O | SPI Master In Slave Out |
| 16 | SPI_CS | I | SPI Chip Select (Active Low) |
| 17 | VDDA | P | Analog Power Supply (+3.3V) |
| 18 | VSSA | P | Analog Ground |
| 19 | VDDD | P | Digital Power Supply (+3.3V) |
| 20 | VSSD | P | Digital Ground |
| 21 | VDDD | P | Digital Power Supply (+3.3V) |
| 22 | VSSD | P | Digital Ground |
| 23 | VDDA | P | Analog Power Supply (+3.3V) |
| 24 | VSSA | P | Analog Ground |
| 25 | VDDD | P | Digital Power Supply (+3.3V) |
| 26 | VSSD | P | Digital Ground |
| 27 | VDDA | P | Analog Power Supply (+3.3V) |
| 28 | VSSA | P | Analog Ground |
| 29 | VDDD | P | Digital Power Supply (+3.3V) |
| 30 | VSSD | P | Digital Ground |
| 31 | VDDA | P | Analog Power Supply (+3.3V) |
| 32 | VSSA | P | Analog Ground |
| 33 | VDDD | P | Digital Power Supply (+3.3V) |
| 34 | VSSD | P | Digital Ground |
| 35 | VDDA | P | Analog Power Supply (+3.3V) |
| 36 | VSSA | P | Analog Ground |
| 37 | VDDD | P | Digital Power Supply (+3.3V) |
| 38 | VSSD | P | Digital Ground |
| 39 | VDDA | P | Analog Power Supply (+3.3V) |
| 40 | VSSA | P | Analog Ground |
Notes
- Multiple power and ground pins are distributed throughout the package for low impedance and noise reduction.
- RESET is active low; pull high for normal operation.
- SPI interface operates in slave mode with active-low chip select.
- XTAL1/XTAL2 are for external crystal oscillator connection (32.768 kHz typical).
- IRQ0 and IRQ1 are programmable interrupt outputs.
- PM0/PM1 pins select power mode configuration.
Thermal Information
Thermal performance is directly linked to printed circuit board (PCB) design and operating environment. Careful attention to PCB thermal design is required.
θJA and θJC are specified for the worst case conditions, that is, a device soldered in a circuit board for surface-mount packages.
Related Variants
The following components are covered by the same datasheet.
| Part Number | Manufacturer | Package |
|---|---|---|
| ADE9000ACPZ | Analog Devices | — |
| ADE9000ACPZ-RL | Analog Devices | — |
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