0603WAF2002T5E

Part: NTMD4184PFR2G — onsemi

Type: P-Channel MOSFET with Integrated Schottky Diode

Description: -30 V, -4.0 A P-Channel MOSFET with an integrated 20 V, 2.2 A Schottky diode in a surface mount package.

Operating Conditions:

• Operating temperature: -55 to +150 °C

Absolute Maximum Ratings:

• Max Drain-to-Source Voltage (MOSFET): -30 V
• Max Gate-to-Source Voltage (MOSFET): 20 V
• Max Peak Repetitive Reverse Voltage (Schottky): 20 V
• Max continuous Drain Current (MOSFET): -4.0 A (t < 10 s, T A = 25 °C)
• Max Average Rectified Forward Current (Schottky): 2.2 A (Steady State)
• Max Junction and Storage Temperature: -55 to +150 °C

Key Specs:

• Drain-to-Source Breakdown Voltage V(BR)DSS: -30 V (min, V GS = 0 V, I D = 250 μA)
• Drain-to-Source On Resistance R DS(on): 95 mΩ (max, V GS = -10 V, I D = -3.0 A)
• Gate Threshold Voltage V GS(TH): -1.0 V (min) to -3.0 V (max, V GS = V DS , I D = 250 μA)
• Total Gate Charge Q G(TOT): 8.8 nC (max, V GS = -10 V, V DS = -10 V, I D = -3.0 A)
• Input Capacitance C ISS: 360 pF (max, V GS = 0 V, V DS = -10 V, f = 1.0 MHz)
• Maximum Instantaneous Forward Voltage V F (Schottky): 0.58 V (max, I F = 2.0 A, T J = 25 °C)
• Maximum Instantaneous Reverse Current I R (Schottky): 0.05 mA (max, V R = 20 V, T J = 25 °C)
• Turn-On Delay Time t d(ON): 15 ns (max, V GS = -10 V, V DS = -10 V, I D = -1.0 A, R G = 6.0 Ω)

Features:

• FETKY Surface Mount Package Saves Board Space
• Independent Pin-Out for MOSFET and Schottky Allowing for Design Flexibility
• Low R DS(on) MOSFET and Low V F Schottky to Minimize Conduction Losses
• Optimized Gate Charge to Minimize Switching Losses
• Pb-Free Device

Applications:

• Disk Drives
• DC-DC Converters
• Printers

Package:

• SOIC-8 NB

• FETKY t Surface Mount Package Saves Board Space
• Independent Pin -Out for MOSFET and Schottky Allowing for Design Flexibility
• Low RDS(on) MOSFET and Low VF Schottky to Minimize Conduction Losses
• Optimized Gate Charge to Minimize Switching Losses
• This is a Pb -Free Device

C4184 Pinout – SOIC-8

Notes

• Package: SOIC-8 (Case 751, Style 18)
• Pin diagram shows: Pins numbered 1–8 around the package perimeter
• Marking: "4184P" indicates device code; "AYWW" indicates assembly location (A), year (Y), work week (WW); "G" indicates Pb-Free package
• This is a dual-device package containing multiple semiconductor elements (likely a dual MOSFET or similar configuration based on the pin names: Gate, Source, Drain, Anode, Collector)

ELECTRICAL CHARACTERISTICS (T J = 25 C unless otherwise noted) (continued)

1. Pulse Test: pulse width v 300 m s, duty cycle v 2%.
2. Switching characteristics are independent of operating junction temperatures.