UCC27517
Single-Channel, High-Speed, Low-Side Gate DriverThe UCC27517 is a single-channel, high-speed, low-side gate driver from Texas Instruments. View the full UCC27517 datasheet below including key specifications, electrical characteristics, absolute maximum ratings.
Official UCC27517 datasheet (PDF) — the source this page was extracted from.
UCC27517 Key Specifications
| Parameter | Value |
|---|---|
| Supply Voltage | 4.5V to 18V |
| Typical Fall Time | 7ns |
| Typical Rise Time | 9ns |
| Peak Output Current | 4A |
| Typical Propagation Delay | 13ns |
| Operating Temperature Range | -40°C to 140°C |
UCC27517 Overview
Part: UCC27517DBV (UCC27516 / UCC27517 family) — Texas Instruments
Type: Single-Channel, High-Speed, Low-Side Gate Driver
Description: 4.5–18 V single-supply, low-side gate driver with 4-A peak source and 4-A peak sink, 13 ns typical propagation delay, and dual inverting/noninverting inputs for driving MOSFETs, IGBTs and GaN devices.
Operating Conditions:
- Supply voltage (VDD): 4.5–18 V (12 V nominal)
- Operating junction temperature: -40 to 140 °C
- Input voltage, IN+ and IN-: 0 to 18 V
Absolute Maximum Ratings:
- Max supply voltage (VDD): 20 V
- Max output continuous current (source/sink): 0.3 A
- Max output pulsed current (0.5 μs): 4 A
- IN+, IN- voltage: -0.3 to 20 V
- OUT voltage (DC): -0.3 to VDD + 0.3 V
- Max operating virtual junction temperature: 150 °C
- Storage temperature: -65 to 150 °C
Key Specs:
- Peak drive current: 4 A source / 4 A sink (VDD = 12 V)
- Propagation delay: 13 ns typical
- Rise/fall time: 9 ns / 7 ns typical
- Input thresholds: TTL/CMOS compatible, independent of VDD
- UVLO holds output low outside the VDD operating range
- RθJA: 217.6 °C/W (SOT-23, 5 pin); 85.6 °C/W (WSON, 6 pin, UCC27516)
- ESD: HBM ±4000 V, CDM ±1000 V
Features:
- Low-cost replacement for discrete NPN/PNP gate-drive solutions
- Symmetrical 4-A source/sink drive
- Outputs held low during VDD UVLO for glitch-free power up/down
- Hysteretic input logic for high noise immunity
- Dual-input design: inverting (IN-) or noninverting (IN+) configuration
- Unused input can serve as enable/disable
- Output held low when inputs are floating
- Input pin absolute maximum voltage not restricted by VDD
Applications:
- Switched-mode power supplies
- DC-DC converters
- Companion gate drivers for digital-power controllers
- Solar power, motor control, UPS
- Gate driver for wide band-gap devices such as GaN
Package:
- UCC27517: SOT-23 (DBV), 5 pin, 2.90 mm × 1.60 mm
- UCC27516: WSON (DRS), 6 pin, 3.00 mm × 3.00 mm with exposed thermal pad
UCC27517 Applications
- 1 · Low-Cost Gate-Driver Device Offering Superior Replacement of NPN and PNP Discrete Solutions
- 4-A Peak-Source and 4-A Peak-Sink Symmetrical Drive
- Switched-Mode Power Supplies
- DC-DC Converters
- Companion Gate-Driver Devices for Digital-Power Controllers
- Fast Propagation Delays (13-ns Typical)
- Fast Rise and Fall Times (9-ns and 7-ns Typical)
- 4.5 to 18-V Single-Supply Range
- Outputs Held Low During VDD UVLO (Ensures Glitch-Free Operation at Power Up and Power Down)
- TTL and CMOS Compatible Input-Logic Threshold (Independent of Supply Voltage)
- Hysteretic-Logic Thresholds for High-Noise Immunity
- Dual Input Design (Choice of an Inverting (INpin) or Noninverting (IN+ Pin) Driver Configuration)
- -Unused Input Pin Can Be Used for Enable or Disable Function
- Output Held Low When Input Pins Are Floating
- Input Pin Absolute Maximum Voltage Levels Not Restricted by VDD Pin Bias Supply Voltage
- Operating Temperature Range of -40°C to 140°C
- 5-Pin DBV (SOT-23) and 6-Pin DRS (3-mm × 3-mm WSON With Exposed Thermal Pad) Package Options
- Solar Power, Motor Control, UPS
- Gate Driver for Emerging Wide Band-Gap Power Devices (such as GaN)
UCC27517 Pin Configuration
Table 1. UCC2751x Product Family Summary
UCC27517 Electrical Characteristics
VDD = 12 V, TA = TJ = -40°C to 140°C, 1-μF capacitor from VDD to GND. Currents are positive into, negative out of the specified pin.
| PARAMETER | PARAMETER | TEST | CONDITIONS | MIN | TYP | MAX | UNIT |
|---|---|---|---|---|---|---|---|
| BIAS CURRENTS | BIAS CURRENTS | BIAS CURRENTS | BIAS CURRENTS | BIAS CURRENTS | BIAS CURRENTS | BIAS CURRENTS | BIAS CURRENTS |
| I DD(off) | Startup current | VDD = 3.4 V | IN+ = VDD, IN- = GND | 40 | 100 | 160 | μA |
| I DD(off) | Startup current | VDD = 3.4 V | IN+ = IN- = GND or IN+ = IN- = VDD | 25 | 75 | 145 | μA |
| I DD(off) | Startup current | VDD = 3.4 V | IN+ = GND, IN- = VDD | 20 | 60 | 115 | μA |
| UNDERVOLTAGE LOCKOUT (UVLO) | UNDERVOLTAGE LOCKOUT (UVLO) | UNDERVOLTAGE LOCKOUT (UVLO) | UNDERVOLTAGE LOCKOUT (UVLO) | UNDERVOLTAGE LOCKOUT (UVLO) | UNDERVOLTAGE LOCKOUT (UVLO) | UNDERVOLTAGE LOCKOUT (UVLO) | UNDERVOLTAGE LOCKOUT (UVLO) |
| V ON | Supply start threshold | T A = 25°C | T A = 25°C | 3.91 | 4.20 | 4.5 | V |
| V ON | Supply start threshold | T A = -40°C to 140°C | T A = -40°C to 140°C | 3.70 | 4.20 | 4.65 | V |
| V OFF | Minimum operating voltage after supply start | 3.45 | 3.45 | 3.9 | 4.35 | V | |
| V DD_H | Supply voltage hysteresis | 0.2 | 0.2 | 0.3 | 0.5 | V | |
| INPUTS (IN+, IN-) | INPUTS (IN+, IN-) | INPUTS (IN+, IN-) | INPUTS (IN+, IN-) | INPUTS (IN+, IN-) | INPUTS (IN+, IN-) | INPUTS (IN+, IN-) | INPUTS (IN+, IN-) |
| V IN_H | Input signal high threshold | Output high for IN+ pin, Output low for IN- pin | Output high for IN+ pin, Output low for IN- pin | 2.2 | 2.4 | V | |
| V IN_L | Input signal low threshold | Output low for IN+ pin, Output high for IN- pin | Output low for IN+ pin, Output high for IN- pin | 1.0 | 1.2 | V | |
| V IN_HYS | Input signal hysteresis | 1.0 | V | ||||
| SOURCE/SINK CURRENT | SOURCE/SINK CURRENT | SOURCE/SINK CURRENT | SOURCE/SINK CURRENT | SOURCE/SINK CURRENT | SOURCE/SINK CURRENT | SOURCE/SINK CURRENT | SOURCE/SINK CURRENT |
| I SRC/SNK | Source/sink peak current (1) | C LOAD = 0.22 μF, F SW = 1 kHz | C LOAD = 0.22 μF, F SW = 1 kHz | ±4 | A | ||
| OUTPUTS (OUT) | OUTPUTS (OUT) | OUTPUTS (OUT) | OUTPUTS (OUT) | OUTPUTS (OUT) | OUTPUTS (OUT) | OUTPUTS (OUT) | OUTPUTS (OUT) |
| V DD - V OH | High output voltage | VDD = 12 V I OUT = -10 mA | VDD = 12 V I OUT = -10 mA | 50 | 90 | mV | |
| V DD - V OH | High output voltage | VDD = 4.5 V I OUT = -10 mA | VDD = 4.5 V I OUT = -10 mA | 60 | 130 | mV | |
| V OL | Low output voltage | VDD = 12 I OUT = 10 mA | VDD = 12 I OUT = 10 mA | 5 | 10 | mV | |
| V OL | Low output voltage | VDD = 4.5 V I OUT = 10 mA | VDD = 4.5 V I OUT = 10 mA | 6 | 12 | mV | |
| R OH | Output pullup resistance (2) | VDD = 12 V I OUT = -10 mA | VDD = 12 V I OUT = -10 mA | 5.0 | 7.5 | Ω | |
| R OH | Output pullup resistance (2) | VDD = 4.5 V I OUT = -10 mA | VDD = 4.5 V I OUT = -10 mA | 5.0 | 11.0 | Ω | |
| R OL | Output pulldown resistance | VDD = 12 V I OUT = 10 mA | VDD = 12 V I OUT = 10 mA | 0.5 | 1.0 | Ω | |
| R OL | Output pulldown resistance | VDD = 4.5 V I OUT = 10 mA | VDD = 4.5 V I OUT = 10 mA | 0.6 | 1.2 | Ω |
UCC27517 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)
| MIN | MAX | UNIT | ||
|---|---|---|---|---|
| Supply voltage | VDD | -0.3 | 20 | V |
| OUT voltage | DC | -0.3 | VDD + 0.3 | V |
| OUT voltage | Repetitive pulse less than 200 ns (4) | -2 | VDD + 0.3 | V |
| Output continuous current | I OUT_DC (source/sink) | 0.3 | A | |
| Output pulsed current (0.5 μs) | I OUT_pulsed (source/sink) | 4 | ||
| IN+, IN- (5) | IN+, IN- (5) | -0.3 | 20 | V |
| Operating virtual junction temperature, T J | Operating virtual junction temperature, T J | -40 | 150 | °C |
| Lead temperature | Soldering, 10 sec. | 300 | °C | |
| Lead temperature | Reflow | 260 | °C | |
| Storage temperature, T stg | Storage temperature, T stg | -65 | 150 | °C |
UCC27517 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
| MIN | NOM | MAX | UNIT | |
|---|---|---|---|---|
| Supply voltage range, VDD | 4.5 | 12 | 18 | V |
| Operating junction temperature range | -40 | 140 | °C | |
| Input voltage, IN+ and IN- | 0 | 18 | V |
UCC27517 Thermal Information
| THERMAL METRIC | (1) | UCC27516 WSON PINS - 6 | UCC27517 SOT-23 - 5 PINS | UNIT |
|---|---|---|---|---|
| R θ JA | Junction-to-ambient thermal resistance | 85.6 | 217.6 | °C/W |
| R θ JC(top) | Junction-to-case (top) thermal resistance | 100.1 | 85.8 | °C/W |
| R θ JB | Junction-to-board thermal resistance | 58.6 | 44.0 | °C/W |
| ψ JT | Junction-to-top characterization parameter | 7.5 | 4.0 | °C/W |
| ψ JB | Junction-to-board characterization parameter | 58.7 | 43.2 | °C/W |
| R θ JC(bot) | Junction-to-case (bottom) thermal resistance | 23.7 | n/a | °C/W |
UCC27517 Typical Application
High-current gate-driver devices are required in switching power applications for a variety of reasons. In order to effect fast switching of power devices and reduce associated switching power losses, a powerful gate driver is employed between the PWM output of controllers and the gates of the power-semiconductor devices. Further, gate drivers are indispensable when there are times that the PWM controller cannot directly drive the gates of the switching devices. With advent of digital power, this situation is often encountered because the PWM signal from the digital controller is often a 3.3-V logic signal, which is not capable of effectively turning on a power switch. A level-shifting circuitry is needed to boost the 3.3-V signal to the gate-drive voltage (such as 12 V) in order to fully turn on the power device and minimize conduction losses. Because traditional buffer-drive circuits based on NPN/PNP bipolar transistors in totem-pole arrangement, being emitter-follower configurations, lack level-shifting capability, the circuits prove inadequate with digital power. Gate drivers effectively combine both the level-shifting and buffer-drive functions. Gate drivers also find other needs such as minimizing the effect of highfrequency switching noise by locating the high-current driver physically close to the power switch, driving gatedrive transformers and controlling floating power-device gates, reducing power dissipation and thermal stress in controllers by moving gate-charge power losses into itself. Finally, emerging wide-bandgap power-device technologies, such as GaN based switches, which are capable of supporting very high switching frequency operation, are driving very special requirements in terms of gate-drive capability. These requirements include operation at low VDD voltages (5 V or lower), low propagation delays and availability in compact, low-inductance packages with good thermal capability. In summary gate-driver devices are extremely important components in switching power combining benefits of high-performance, low cost, component count and board space reduction with a simplified system design.
Variants on the same datasheet
These parts have exact links to the same datasheet. They are candidates to compare, not verified drop-in replacements; check package, pinout and electrical limits.
| Part Number | Manufacturer | Package |
|---|---|---|
| UCC27516 | Texas Instruments | SON-6 3.0x3.0mm |
| UCC27517DBV | Texas Instruments | SOT-23-6 |
| UCC27517DBVR | Texas Instruments | SOT-2 |
| UCC27517DBVT | Texas Instruments | SOT-23-6 |
Other Integrated Circuits
- STM32F103C8T6 – STMicroelectronics, Microcontroller
- STM32F405RGT6 – STMicroelectronics, ARM Cortex-M4 MCU
- SN74AVC4T245PWR – Texas Instruments, Dual-Supply Bus Transceiver Level Translator
- STM32F446RCT6 – STMicroelectronics, ARM Cortex-M4 MCU
- STM32G070RBT6 – STMicroelectronics, Arm Cortex-M0+ 32-bit MCU
- ADS131M08IPBSR – Texas Instruments, Delta-Sigma ADC
- ISO1540DR – Texas Instruments, Bidirectional I²C Isolator
- ISO7740DBQR – Texas Instruments, Digital Isolator
All Integrated Circuits datasheetsAll Texas Instruments datasheets (2,442)
Ask your AI agent about the UCC27517
Connect SheetsData to Claude, Cursor, Codex or any MCP client and your agent reads this datasheet for you: pinout, limits, register maps and design checks, with the numbers taken from the PDF.
claude mcp add --transport http sheetsdata https://mcp.sheetsdata.com/mcp
Then ask: "Can the UCC27517 run from my 12 V rail? Check it against the datasheet limits."
Create a free account $2 of usage every month, no card needed.