TUSB8041RGCT
TUSB8041 Four-Port USB 3.0 Hub
The TUSB8041RGCT is an electronic component from Texas Instruments. TUSB8041 Four-Port USB 3.0 Hub. View the full TUSB8041RGCT datasheet below including electrical characteristics, absolute maximum ratings.
Manufacturer
Texas Instruments
Overview
Part: TUSB8041 from Texas Instruments
Type: Four-Port USB 3.0 Hub
Key Specs:
- Number of ports: 4
- USB versions supported: USB 3.0, USB 2.0
- Clock input: 24 MHz
- Transaction Translators: 4
- Asynchronous Endpoint Buffers: 4 per Transaction Translator
- Universally Unique Identifier (UUID) size: 128-Bit
Features:
- Four Port USB 3.0 Hub
- USB 2.0 Hub Features including Multi Transaction Translator (MTT) Hub
- Supports Battery Charging (CDP Mode, DCP Mode, YD/T 1591-2009 compliance, D+/D- Divider Mode)
- Supports Operation as a USB 3.0 or USB 2.0 Compound Device
- Per Port or Ganged Power Switching and Over-Current Notification Inputs
- OTP ROM, Serial EEPROM or I2C/SMBus Slave Interface for Custom Configurations (VID, PID, Port Customizations, Manufacturer and Product Strings, Serial Number)
- Application Feature Selection Using Pin Selection or EEPROM/ or I2C/SMBus Slave Interface
- Provides 128-Bit Universally Unique Identifier (UUID)
- Supports On-Board and In-System OTP/EEPROM Programming Via the USB 2.0 Upstream Port
- Single Clock Input, 24-MHz Crystal or Oscillator
- No Special Driver Requirements
Applications:
- Computer Systems
- Docking Stations
- Monitors
- Set-Top Boxes
Package:
- VQFN (64): 9.00 mm × 9.00 mm
Features
- 1• Four Port USB 3.0 Hub
- USB 2.0 Hub Features
- Multi Transaction Translator (MTT) Hub: Four Transaction Translators
- Four Asynchronous Endpoint Buffers Per Transaction Translator
- • Supports Battery Charging
- CDP Mode (Upstream Port Connected)
- DCP Mode (Upstream Port Unconnected)
- DCP Mode Complies with Chinese Telecommunications Industry Standard YD/T 1591-2009
- D+/D- Divider Mode
- • Supports Operation as a USB 3.0 or USB 2.0 Compound Device
- Per Port or Ganged Power Switching and Over-Current Notification Inputs
- OTP ROM, Serial EEPROM or I 2C/SMBus Slave Interface for Custom Configurations:
- VID and PID
- Port Customizations
- Manufacturer and Product Strings (not by OTP ROM)
- Serial Number (not by OTP ROM)
- Application Feature Selection Using Pin Selection or EEPROM/ or I 2C/SMBus Slave Interface
- Provides 128-Bit Universally Unique Identifier (UUID)
- • Supports On-Board and In-System OTP/EEPROM Programming Via the USB 2.0 Upstream Port
- Single Clock Input, 24-MHz Crystal or Oscillator
- No Special Driver Requirements; Works Seamlessly on any Operating System with USB Stack Support
- 64-Pin QFN Package (RGC)
Applications
- Computer Systems
- Docking Stations
- Monitors
- Set-Top Boxes
Pin Configuration
4
TUSB8041 www.ti.com SLLSEE4E –JUNE 2014–REVISED JUNE 2016
Pin Functions
| PIN NAME | PIN NO. |
|---|---|
| USB_DP_DN1 | 1 |
| USB_DM_DN1 | 2 |
| USB_SSTXP_DN1 | 3 |
| USB_SSTXM_DN1 | 4 |
| VDD | 5 |
| USB_SSRXP_DN1 | 6 |
| USB_SSRXM_DN1 | 7 |
| VDD | 8 |
| USB_DP_DN2 | 9 |
| USB_DM_DN2 | 10 |
| USB_SSTXP_DN2 | 11 |
| USB_SSTXM_DN2 | 12 |
| VDD | 13 |
| USB_SSRXP_DN2 | 14 |
| USB_SSRXM_DN2 | 15 |
| VDD33 | 16 |
| USB_DP_DN3 | 17 |
| USB_DM_DN3 | 18 |
| USB_SSTXP_DN3 | 19 |
| USB_SSTXM_DN3 | 20 |
| VDD | 21 |
| USB_SSRXP_DN3 | 22 |
| USB_SSRXM_DN3 | 23 |
| USB_DP_DN4 | 24 |
| USB_DM_DN4 | 25 |
| USB_SSTXP_DN4 | 26 |
| USB_SSTXM_DN4 |
Electrical Characteristics
over operating free-air temperature range (unless otherwise noted)
| PARAMETER | OPERATION | TEST CONDITIONS | MIN | MAX | UNIT | |
|---|---|---|---|---|---|---|
| VIH | High-level input voltage(1) | VDD33 | 2 0 | VDD33 0.8 | V V | |
| VIL | Low-level input voltage(1) | VDD33 | JTAG pins only | 0 | 0.55 | V |
| VI | Input voltage | 0 | VDD33 | V | ||
| VO | Output voltage(2) | 0 | VDD33 | V | ||
| tt | Input transition time (trise and tfall) | 0 | 25 | ns | ||
| Vhys | Input hysteresis(3) | 0.13 x VDD33 | V | |||
| VOH | High-level output voltage | VDD33 | IOH = -4 mA | 2.4 | V | |
| VOL | Low-level output voltage | VDD33 | IOL = 4 mA | 0.4 | V | |
| IOZ | High-impedance, output current(2) | VDD33 | VI = 0 to VDD33 | ±20 | μA | |
| IOZP | High-impedance, output current with internal pullup or pulldown resistor(4) | VDD33 | VI = 0 to VDD33 | ±250 | μA | |
| II | Input current(5) | VDD33 | VI = 0 to VDD33 | ±15 | μA |
(1) Applies to external inputs and bidirectional buffers.
(2) Applies to external outputs and bidirectional buffers.
(3) Applies to GRSTz.
Spacer
(4) Applies to pins with internal pullups/pulldowns.
(5) Applies to external input buffers.
7.6 Timing Requirements, Power-Up
| PARAMETER | DESCRIPTION | MIN | TYP | MAX | UNIT |
|---|---|---|---|---|---|
| td1 | VDD33 stable before VDD stable(1) | See (2) | ms | ||
| td2 | VDD and VDD33 stable before de-assertion of GRSTz | 3 | ms | ||
| tsu_io | Setup for MISC inputs(3) sampled at the de-assertion of GRSTz | 0.1 | μs | ||
| thd_io | Hold for MISC inputs(3) sampled at the de-assertion of GRSTz | 0.1 | μs | ||
| tVDD33_RAMP | VDD33 supply ramp requirements | 0.2 | 100 | ms | |
| tVDD_RAMP | VDD supply ramp requirements | 0.2 | 100 | ms |
(1) An active reset is required if the VDD33 supply is stable before the VDD11 supply. This active Reset shall meet the 3ms power-up delay counting from both power supplies being stable to the de-assertion of GRSTz.
(2) There is no power-on relationship between VDD33 and VDD unless GRSTz is only connected to a capacitor to GND. Then VDD must be stable minimum of 10 μs before the VDD33.
(3) MISC pins sampled at de-assertion of GRSTz: FULLPWRMGMTz, GANGED, PWRCTL_POL, SMBUSz, BATEN[4:1], and AUTOENz.
Figure 2. Power-Up Timing Requirements
Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)
| MIN | MAX | UNIT | ||
|---|---|---|---|---|
| VDD Steady-state supply voltage | –0.3 | 1.4 | V | |
| Supply Voltage Range | VDD33 Steady-state supply voltage | –0.3 | 3.8 | V |
| USB_SSRXP_UP, USB_SSRXN_UP, USB_SSRXP_DN[4:1], USB_SSRXN_DP[4:1] and USB_VBUS terminals | -0.3 | 1.4 | V | |
| Voltage Range | XI terminals | -0.3 | 2.45 | V |
| All other terminals | -0.3 | 3.8 | V | |
| Storage temperature, Tstg | –65 | 150 | °C |
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
| MIN | NOM | MAX | UNIT | |||
|---|---|---|---|---|---|---|
| VDD(1) | 1.1V supply voltage | 0.99 | 1.1 | 1.26 | V | |
| VDD33 | 3.3V supply voltage | 3 | 3.3 | 3.6 | V | |
| USB_VBUS | Voltage at USB_VBUS PAD | 0 | 1.155 | V | ||
| TA | Operating free-air temperature | TUSB8041 | 0 | 70 | °C | |
| TUSB8041I | -40 | 85 | °C | |||
| TJ | Operating junction temperature | -40 | 105 | °C |
(1) A 1.05-V, 1.1-V, or 1.2-V supply may be used as long as minimum and maximum supply conditions are met.
Thermal Information
| THERMAL METRIC(1) | TUSB8041 RGC 64 PINS | UNIT | |
|---|---|---|---|
| RθJA | Junction-to-ambient thermal resistance(2) | 26 | °C/W |
| RθJCtop | Junction-to-case (top) thermal resistance(3) | 11.5 | °C/W |
| RθJB | Junction-to-board thermal resistance(4) | 5.3 | °C/W |
| ψJT | Junction-to-top characterization parameter(5) | 0.2 | °C/W |
| ψJB | Junction-to-board |
(2) The junction-to-ambient thermal resistance under natural convection is obtained in a simulation on a JEDEC-standard, high-K board, as specified in JESD51-7, in an environment described in JESD51-2a.
(3) The junction-to-case (top) thermal resistance is obtained by simulating a cold plate test on the package top. No specific JEDECstandard test exists, but a close description can be found in the ANSI SEMI standard G30-88.
(4) The junction-to-board thermal resistance is obtained by simulating in an environment with a ring cold plate fixture to control the PCB temperature, as described in JESD51-8.
(5) The junction-to-top characterization parameter, ψJT, estimates the junction temperature of a device in a real system and is extracted from the simulation data for obtaining RθJA, using a procedure described in JESD51-2a (sections 6 and 7).
(6) The junction-to-board characterization parameter, ψJB, estimates the junction temperature of a device in a real system and is extracted from the simulation data for obtaining RθJA, using a procedure described in JESD51-2a (sections 6 and 7).
(7) The junction-to-case (bottom) thermal resistance is obtained by simulating a cold plate test on the exposed (power) pad. No specific JEDEC standard test exists, but a close description can be found in the ANSI SEMI standard G30-88.
Typical Application
The TUSB8041 is a four-port USB 3.0 compliant hub. It provides simultaneous SuperSpeed USB and highspeed/full-speed connections on the upstream port and provides SuperSpeed USB, high-speed, full-speed, or low speed connections on the downstream port. The TUSB8041 can be used in any application that needs additional USB compliant ports. For example, a specific notebook may only have two downstream USB ports. By using the TUSB8041, the notebook can increase the downstream port count to five.
Related Variants
The following components are covered by the same datasheet.
| Part Number | Manufacturer | Package |
|---|---|---|
| TUSB8041 | Texas Instruments | VQFN-64 (RGC) |
| TUSB8041-Q1 | Texas Instruments | — |
| TUSB8041I | Texas Instruments | — |
| TUSB8041IRGCR | Texas Instruments | — |
| TUSB8041IRGCR.A | Texas Instruments | — |
| TUSB8041IRGCT | Texas Instruments | — |
| TUSB8041IRGCT.A | Texas Instruments | — |
| TUSB8041RGCR | Texas Instruments | — |
| TUSB8041RGCR.A | Texas Instruments | — |
| TUSB8041RGCT.A | Texas Instruments | — |
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