TSL2561CS

Part: TSL2560, TSL2561 from Texas Advanced Optoelectronic Solutions Inc.

Type: Light-to-digital converter

Key Specs:

• Digital Output Resolution: 16-Bit
• Dynamic Range: 1,000,000-to-1
• Active Power Consumption: 0.75 mW (Typical)
• SMBus Speed: 100 kHz (TSL2560)
• I2C Fast-Mode Speed: 400 kHz (TSL2561)
• Supply Voltage: 2.7 V to 3.6 V
• Operating Temperature: -30 °C to 70 °C

Features:

• Approximates Human Eye Response
• Programmable Interrupt Function with User-Defined Upper and Lower Threshold Settings
• Programmable Analog Gain and Integration Time
• Automatically Rejects 50/60-Hz Lighting Ripple
• Low Active Power with Power Down Mode
• RoHS Compliant
• Direct I2C (TSL2561) or SMBus (TSL2560) interface
• Combines broadband and infrared photodiodes on a single CMOS integrated circuit
• Double-buffered conversion results
• No external circuitry required for signal conditioning
• Digital output immune to noise

Applications:

• Display panels (LCD, OLED, etc.) for battery life extension and optimum viewing
• Keyboard illumination control
• Exposure control in digital cameras
• Notebook/tablet PCs, LCD monitors, flat-panel televisions, cell phones
• Street light control, security lighting, sunlight harvesting, machine vision, automotive instrumentation clusters

Package:

• Chipscale Package: 1.25 mm - 1.75 mm
• 6-LEAD TMB

	PARAMETER	TEST CONDITIONS	MIN	TYP	MAX	UNIT
I IDD		Active		0.24	0.6	mA
	Supply current	Power down		3.2	15	μA
V VOL		3 mA sink current	0		0.4	V
	INT SDA output low voltage INT, output	6 mA sink current	0		0.6	V
I LEAK	Leakage current		-5		5	μA

TAOS059M - DECEMBER 2008

Supply voltage, VDD (see Note 1) .	3.8 V
Digital output voltage range, VO .	-0.5 V to 3.8 V
Digital output current, IO .	-1 mA to 20 mA
Storage temperature range, Tstg .	-40 °C to 85°C
ESD tolerance, human body model .	2000 V

† Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

NOTE 1: All voltages are with respect to GND.

	MIN	NOM	MAX	UNIT
Supply voltage, VDD	2.7	3	3.6	V
Operating free-air temperature, TA	-30		70	°C
SCL, SDA input low voltage, VIL	-0.5		0.8	V
SCL, SDA input high voltage, VIH	2.1		3.6	V

Electrical Characteristics over recommended operating free-air temperature range (unless otherwise noted)

	PARAMETER	TEST CONDITIONS	MIN	TYP	MAX	UNIT
I IDD		Active		0.24	0.6	mA
	Supply current	Power down		3.2	15	μA
V VOL		3 mA sink current	0		0.4	V
	INT SDA output low voltage INT, output	6 mA sink current	0		0.6	V
I LEAK	Leakage current		-5		5	μA

TAOS059M - DECEMBER 2008

Operating Characteristics, High Gain (16**-**), VDD = 3 V, TA = 25C, (unless otherwise noted) (see Notes 2, 3, 4, 5)

				TSL2560T, TSL2561T			TSL2560CS, TSL2561CS
	PARAMETER	TEST CONDITIONS	CHANNEL	MIN TYP MAX		MIN TYP MAX
fosc	Oscillator frequency			690	735	780	690
			Ch0	0		4	0
	Dark ADC count value value	E Ee = 0, Tint = 0 T 402 ms	Ch1 Ch0	0		4 65535	0
		T int > 178 ms	Ch1			65535
	Full scale ADC count Full scale ADC	Tint = T 101 ms	Ch0			37177
	value (Note 6)		Ch1 Ch0			37177 5047
		T int = 13.7 13 7 ms	Ch1			5047
		λp = 640 nm, Tint = 101 ms p = 640 = 101 Ee = 36.3 μW/cm2	Ch0 Ch1	750	1000 200	1250
		= 101 λp = 940 nm, Tint = 101 ms p = 940 Ee = 119 μW/cm2	Ch0 Ch1	700	1000 820	1300
	ADC count value	λp = 640 nm, Tint = 101 ms p = 640 = 101 Ee = 41 μW/cm2	Ch0 Ch1				750
		λp = 940 nm, Tint = 101 ms p = 940 = 101 Ee = 135 μW/cm2	Ch0 Ch1				700
	ADC ADC count value ratio: ADC count value t l ti	λp = 640 nm, T nm Tint = 101 ms		0 15.	0 20.	0 25 0.25	0 14 0.14
	Ch1/Ch0	λp = 940 nm, T nm Tint = 101 ms		0 69.	0 82.	0 95 0.95	0 70 0.70
		λ p = 640 nm T nm, Tint = 101 ms	Ch0		27.5
			Ch1		5.5
R e	Irradiance responsivity	λ p = 940 nm T nm, Tint = 101 ms	Ch0 Ch1		8.4 6.9
		Fluorescent light source: Fluorescent light source:	Ch0		36
		Tint = 402 ms Incandescent light source: Incandescent light source: Tint = 402 ms	Ch1		4
R Rv	Illuminance responsivity Illuminance		Ch0 Ch1		144 72
	ADC count value ratio: ADC count value	Fluorescent light source: Tint = 402 ms			0.11
	Ch1/Ch0	Incandescent light source: Incandescent light source: Tint = 402 ms			0 5 0.5
			Ch0		2.3
	Illuminance responsivity, Illuminance	Fluorescent light source: Fluorescent light source: Tint = 402 ms	Ch1		0.25
R Rv	low gain mode (Note 7)	Incandescent light source: Incandescent light source: Tint = 402 ms	Ch0 Ch1		9 4.5
	(Sensor Lux) /	Fluorescent light source: Tint = 402 ms		0.65	1	1.35	0.65
	(actual Lux) high gain Lux), mode (Note 8)	Incandescent light source: Tint = 402 ms		0.60	1	1.40	0.60

TAOS059M - DECEMBER 2008

• NOTES: 2. Optical measurements are made using small-angle incident radiation from light-emitting diode optical sources. Visible 640 nm LEDs and infrared 940 nm LEDs are used for final product testing for compatibility with high-volume production.
  • 3. The 640 nm irradiance Ee is supplied by an AlInGaP light-emitting diode with the following characteristics: peak wavelength λp = 640 nm and spectral halfwidth Δλ½ = 17 nm.
  • 1. The 940 nm irradiance Ee is supplied by a GaAs light-emitting diode with the following characteristics: peak wavelength λp = 940 nm and spectral halfwidth Δλ½ = 40 nm.
  • 1. Integration time Tint, is dependent on internal oscillator frequency (fosc) and on the integration field value in the timing register as described in the Register Set section. For nominal fosc = 735 kHz, nominal Tint = (number of clock cycles)/fosc.

Field value 00: Tint = (11 × 918)/fosc = 13.7 ms

Field value 01: Tint = (81 × 918)/fosc = 101 ms

Field value 10: Tint = (322 × 918)/fosc = 402 ms

Scaling between integration times vary proportionally as follows: 11/322 = 0.034 (field value 00), 81/322 = 0.252 (field value 01), and 322/322 = 1 (field value 10).

1. Full scale ADC count value is limited by the fact that there is a maximum of one count per two oscillator frequency periods and also by a 2-count offset.

Full scale ADC count value = ((number of clock cycles)/2 - 2)

Field value 00: Full scale ADC count value = ((11 × 918)/2 - 2) = 5047

Field value 01: Full scale ADC count value = ((81 × 918)/2 - 2) = 37177

• Field value 10: Full scale ADC count value = 65535, which is limited by 16 bit register. This full scale ADC count value is reached for 131074 clock cycles, which occurs for Tint = 178 ms for nominal fosc = 735 kHz.
• 1. Low gain mode has 16lower gain than high gain mode: (1/16 = 0.0625).
• 1. The sensor Lux is calculated using the empirical formula shown on p. 22 of this data sheet based on measured Ch0 and Ch1 ADC count values for the light source specified. Actual Lux is obtained with a commercial luxmeter. The range of the (sensor Lux) / (actual Lux) ratio is estimated based on the variation of the 640 nm and 940 nm optical parameters. Devices are not 100% tested with fluorescent or incandescent light sources.

TAOS059M - DECEMBER 2008