TPS7A9101DSKT.A

Part: TPS7A91 (TPS7A9101DSKR) — Texas Instruments

Type: Low-Noise, High-PSRR Adjustable LDO Voltage Regulator

Description: 1.4–6.5 V input, 1 A low-dropout regulator with 1.0% accuracy, 4.7 μVRMS output noise, and 200 mV maximum dropout at 1 A, in a 2.5 mm × 2.5 mm 10-pin SON package.

Operating Conditions:

• Supply voltage (VIN): 1.4–6.5 V
• Operating junction temperature: -40 to 125 °C
• Output voltage range: 0.8–5.2 V
• Output current: 0–1 A

Absolute Maximum Ratings:

• Max voltage on IN, PG, EN: 7.0 V (7.5 V for 5% duty cycle, pulse ≤ 200 μs)
• Max voltage on OUT and SS_CTRL: VIN + 0.3 V
• Max voltage on NR/SS, FB: 3.6 V
• Max PG sink current: 5 mA
• Max operating junction temperature: 150 °C
• Storage temperature: -55 to 150 °C

Key Specs:

• Output voltage accuracy: ±1.0% (1.4 V ≤ VIN ≤ 6.5 V, 5 mA ≤ IOUT ≤ 1 A, over TJ -40 to 125 °C)
• Dropout voltage: 200 mV max (IOUT = 1 A, VIN ≥ 1.4 V)
• Output current limit: 1.5 / 1.7 / 1.9 A (min/typ/max)
• Ground pin current: 2.1 mA typ, 3.5 mA max (VIN = 6.5 V, IOUT = 5 mA); 4 mA max (VIN = 1.4 V, IOUT = 1 A)
• Shutdown GND pin current: 0.1 μA typ, 15 μA max (VEN = 0.4 V, VIN = 6.5 V)
• Output noise: 4.7 μVRMS (10 Hz–100 kHz, VIN = 1.8 V, VOUT = 0.8 V, IOUT = 1 A, CNR/SS = CFF = 10 nF)
• PSRR: 39 dB at 500 kHz (VIN = 3.8 V, VOUT = 3.3 V, IOUT = 750 mA, CNR/SS = CFF = 10 nF)
• UVLO (VIN rising): 1.31 V typ, 1.39 V max, with 290 mV hysteresis
• PG threshold: 88.9% typ of VOUT(NOM) (falling), 1% hysteresis
• Thermal shutdown: 160 °C (rising), 140 °C (reset)

Features:

• 1.0% accuracy over line, load, and temperature
• Low output noise: 4.7 μVRMS (10 Hz–100 kHz)
• High PSRR: -70 dB at DC, -40 dB at 100 kHz and 1 MHz
• Fast transient response
• Adjustable start-up in-rush control with selectable soft-start charging current (NR/SS, SS_CTRL)
• Open-drain power-good (PG) output
• Foldback current limiting
• Output active discharge (250 Ω typ)
• Adjustable output via external resistors

Applications:

• High-speed analog circuits: VCO, ADC, DAC, LVDS
• Imaging: CMOS sensors, video ASICs
• Test and measurement
• Instrumentation, medical, and audio
• Digital loads: SerDes, FPGA, DSP

Package:

• DSK (SON, 10 pins), 2.5 mm × 2.5 mm

• 1.0% accuracy over line, load, and temperature
• Low output noise: 4.7μVRMS (10Hz - 100kHz)
• Low dropout: 200mV (maximum) at 1A
• Wide input voltage range: 1.4V to 6.5V
• Wide output voltage range: 0.8V to 5.2V
• High power-supply rejection ratio (PSRR):
• -70dB at DC
• -40dB at 100kHz
• -40dB at 1MHz
• Fast transient response
• Adjustable start-up in-rush control with selectable soft-start charging current
• Open-drain power-good (PG) output
• 2.5mm × 2.5mm, 10-pin SON package

• High-speed analog circuits:
• -VCO, ADC, DAC, LVDS
• Imaging: CMOS sensors, video ASICs
• Test and measurement
• Instrumentation, medical, and audio
• Digital loads: SerDes, FPGA, DSP

Typical Application Circuit

Figure 4-1. DSK Package, 2.5mm × 2.5mm, 10-Pin SON (Top View)

Table 4-1. Pin Functions

(1) I = input, O = output

over operating temperature range (TJ = -40°C to +125°C), 1.4V ≤ VIN ≤ 6.5V, VOUT(NOM) = 0.8V, IOUT = 5mA, VEN = 1.4V, CIN = COUT = 10μF, CNR/SS = CFF = 0nF, SS_CTRL = GND, and PG pin pulled up to VIN with 100kΩ (unless otherwise noted); typical values are at TJ = 25°C

over operating junction temperature range and all voltages with respect to GND (unless otherwise noted) (1)

over operating junction temperature range (unless otherwise noted)

The TPS7A91 is a linear voltage regulator operating from 1.4V to 6.5V on the input, and regulates voltages from 0.8V to 5.0V within 1% accuracy and a 1A maximum output current. Efficiency is defined by the ratio of output voltage to input voltage because the TPS7A91 is a linear voltage regulator. To achieve high efficiency, the dropout voltage (VIN - VOUT) must be as small as possible, thus requiring a very low dropout LDO. Successfully implementing an LDO in an application depends on the application requirements. This section describes key device features and how to best implement the features to achieve a reliable design.

• (1) For more information, see the orderable addendum at the end of the datasheet.
• (2) The package size (length × width) is a nominal value and includes pins, where applicable.

Copyright © 2016, Texas Instruments Incorporated

Typical Application Diagram