TPS61023DRLR
Synchronous Boost ConverterThe TPS61023DRLR is a synchronous boost converter from Texas Instruments. View the full TPS61023DRLR datasheet below including electrical characteristics, absolute maximum ratings.
Manufacturer
Texas Instruments
Category
Boost ConvertersOverview
Part: TPS61023 from Texas Instruments
Type: Synchronous Boost Converter
Description: The TPS61023 is a synchronous boost converter with a 0.5 V to 5.5 V input voltage range, 3.7-A valley switching current limit, and up to 94% efficiency, designed for portable equipment and smart devices.
Operating Conditions:
- Supply voltage: 0.5 V to 5.5 V
- Operating temperature: -40 to 125 °C (junction)
- Output voltage setting range: 2.2 V to 5.5 V
- Switching frequency: 1 MHz (VIN > 1.5 V), 0.5 MHz (VIN < 1 V)
Absolute Maximum Ratings:
- Max supply voltage: 7 V (VIN, EN, FB, SW, VOUT terminals)
- Max continuous current: 3.7 A (Valley switching current limit)
- Max junction/storage temperature: 150 °C
Key Specs:
- Input voltage range: 0.5 V to 5.5 V
- Output voltage setting range: 2.2 V to 5.5 V
- Valley current limit: 3.7 A (typ) at VIN = 3.6 V, VOUT = 5.0 V
- High-side MOSFET on resistance: 68 mΩ (typ) at VOUT = 5.0 V
- Low-side MOSFET on resistance: 47 mΩ (typ) at VOUT = 5.0 V
- Switching frequency: 1 MHz (typ) at VIN = 3.6 V, VOUT = 5.0 V, PWM mode
- Quiescent current into VIN pin: 0.9 μA (typ) at IC enabled, No load, No switching
- Shutdown current into VIN and SW pin: 0.1 μA (typ) at IC disabled, VIN = VSW = 3.6 V, TJ = 25°C
Features:
- 1.8-V Minimum input voltage for start-up
- Two 47-mΩ (LS) / 68-mΩ (HS) MOSFETs
- 94% Efficiency at VIN = 3.6 V, VOUT = 5 V and IOUT = 1.5 A
- ±2.5% Reference voltage accuracy over -40°C to +125°C
- Auto PFM operation mode at light load
- True disconnection between input and output during shutdown
- Output overvoltage and thermal shutdown protections
- Output short-circuit protection
Applications:
- Electronic shelf label
- Video doorbell
- Remote controller
Package:
- SOT563 (DRL) 6-pin (1.2-mm × 1.6-mm)
Features
- Input voltage range: 0.5 V to 5.5 V
- 1.8-V Minimum input voltage for start-up
- Output voltage setting range: 2.2 V to 5.5 V
- Two 47-mΩ (LS) / 68-mΩ (HS) MOSFETs
- 3.7-A Valley switching current limit
- 94% Efficiency at VIN = 3.6 V, VOUT = 5 V and IOUT = 1.5 A
- 1-MHz Switching frequency when VIN > 1.5 V and 0.5-MHz switching frequency when VIN < 1 V
- Typical 0.1-μA shutdown current from VIN and SW
- ±2.5% Reference voltage accuracy over -40°C to +125°C
- Auto PFM operation mode at light load
- Pass-through mode when VIN > VOUT
- True disconnection between input and output during shutdown
- Output overvoltage and thermal shutdown protections
- Output short-circuit protection
- 1.2-mm × 1.6-mm SOT563 (DRL) 6-pin package
Applications
Pin Configuration
-
FB
-
VOUT
-
EN
-
VIN
-
SW
-
GND
Figure 5-1. DRL Package 6-Pin SOT563 Top View
Electrical Characteristics
TJ = -40°C to 125°C, VIN = 3.6 V and VOUT = 5.0 V. Typical values are at T J = 25°C (unless otherwise noted)
| PARAMETER | PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT |
|---|---|---|---|---|---|---|
| POWER SUPPLY | POWER SUPPLY | |||||
| V IN | Input voltage range | 0.5 | 5.5 | V | ||
| V IN rising | 1.7 | 1.8 | V | |||
| V IN_UVLO | Under-voltage lockout threshold | V IN falling | 0.4 | 0.5 | V | |
| I Q | Quiescent current into VIN pin | IC enabled, No load, No switching V IN = 1.8 V to 5.5 V, V FB = V REF + 0.1 V, T J up to 85°C | 0.9 | 3 | μA | |
| I Q | Quiescent current into VOUT pin | IC enabled, No load, No switching V OUT = 2.2 V to 5.5 V, V FB = V REF + 0.1 V, T J up to 85°C | 20 | 30 | μA | |
| I SD | Shutdown current into VIN and SW pin | IC disabled, V IN = V SW = 3.6 V, T J = 25°C | 0.1 | 0.2 | μA | |
| OUTPUT | ||||||
| V OUT | Output voltage setting range | 2.2 | 5.5 | V | ||
| V | PWM mode | 580 | 595 | 610 | mV | |
| REF | Reference voltage at the FB pin | PFM mode | 585 | 601 | mV | |
| V OVP | Output over-voltage protection threshold | V OUT rising | 5.5 | 5.7 | 6 | V |
| V OVP_HYS | Over-voltage protection hysteresis | 0.1 | V | |||
| I | Leakage current at FB pin | T J = 25°C | 4 | 20 | nA | |
| FB_LKG | T J = 125°C | 6 | nA | |||
| I VOUT_LKG | Leakage current into VOUT pin | IC disabled, V IN = 0 V, V SW = 0 V, V OUT = 5.5 V, T J = 25°C | 1 | 3 | μA | |
| t SS | Soft startup time | From active EN to VOUT regulation. V IN = 2.5 V, V OUT = 5.0 V, C OUT_EFF = 10μF, I OUT = 0 | 700 | μs | ||
| POWER SWITCH | POWER SWITCH | |||||
| R | High-side MOSFET on resistance | V OUT = 5.0 V | 68 | mΩ | ||
| DS(on) | Low-side MOSFET on resistance | V OUT = 5.0 V | 47 | mΩ | ||
| f | Switching frequency | V IN = 3.6 V, V OUT = 5.0 V, PWM mode | 1 | MHz | ||
| SW | V IN = 1.0 V, V OUT = 5.0 V, PWM mode | 0.5 | MHz | |||
| t ON_min | Minimum on time | 40 | 96 | 130 | ns | |
| t OFF_min | Minimum off time | 80 | 120 | ns | ||
| I LIM_SW | Valley current limit | V IN = 3.6 V, V OUT = 5.0 V | 2.7 | 3.7 | A | |
| I | Pre-charge current | V IN = 1.8 - 5.5 V, V OUT < 0.4 V | 200 | 350 | mA | |
| LIM_CHG | V IN = 2.4 V, V OUT = 2.15 V | 750 | 1200 | mA | ||
| LOGIC INTERFACE | LOGIC INTERFACE | |||||
| V EN_H | EN logic high threshold | V IN > 1.8 V or V OUT > 2.2 V | 1.2 | V | ||
| V EN_L | EN logic low threshold | V IN > 1.8 V or V OUT > 2.2 V | 0.35 | 0.42 | 0.45 | |
| PROTECTION | PROTECTION | |||||
| T SD | Thermal shutdown threshold | T J rising | 150 | °C | ||
| T SD_HYS | Thermal shutdown hysteresis | T J falling below T SD | 20 | °C |
Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted) (1)
| MIN | MAX | UNIT | ||
|---|---|---|---|---|
| Voltage range at terminals (2) | VIN, EN, FB, SW, VOUT | -0.3 | 7 | V |
| Voltage range at terminals (2) | SW spike at 10ns | -0.7 | 8 | V |
| SW spike at 1ns | -0.7 | 9 | V | |
| Operating junction temperature, T J | -40 | 150 | °C | |
| Storage temperature, T stg | -65 | 150 | °C |
Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
| MIN | NOM | MAX | UNIT | ||
|---|---|---|---|---|---|
| V IN | Input voltage range | 0.5 | 5.5 | V | |
| V OUT | Output voltage setting range | 2.2 | 5.5 | V | |
| L | Effective inductance range | 0.37 | 1 | 2.9 | μH |
| C IN | Effective input capacitance range | 1 | 4.7 | μF | |
| C OUT | Effective output capacitance range | 4 | 10 | 1000 | μF |
| T J | Operating junction temperature | -40 | 125 | °C |
Thermal Information
| THERMAL METRIC (1) | THERMAL METRIC (1) | TPS61023 DRL (SOT563) - 6 PINS Standard | TPS61023 DRL (SOT563) - 6 PINS EVM (2) | UNIT |
|---|---|---|---|---|
| Junction-to-ambient thermal resistance | °C/W | |||
| R θJA | 142.7 | 91.4 | ||
| R θJC | Junction-to-case thermal resistance | 55.7 | N/A | °C/W |
| R θJB | Junction-to-board thermal resistance | 31 | N/A | °C/W |
| Ψ JT | Junction-to-top characterization parameter | 1.4 | 5.3 | °C/W |
| Ψ JB | Junction-to-board characterization parameter | 30.7 | 38.1 | °C/W |
Typical Application
The TPS61023 is a synchronous boost converter designed to operate from an input voltage supply range between 0.5 V and 5.5 V with a typically 3.7-A valley switch current limit. The TPS61023 typically operates at a quasi-constant 1-MHz frequency PWM at moderate-to-heavy load currents when the input voltage is above 1.5 V. The switching frequency changes to 0.5 MHz gradually with the input voltage changing from 1.5 V to 1 V for better efficiency and high step-up ratio. When the input voltage is below 1 V, the switching frequency is fixed at a quasi-constant 0.5 MHz. At light load currents, the TPS61023 converter operates in power-save mode with PFM to achieve high efficiency over the entire load current range.
Related Variants
The following components are covered by the same datasheet.
| Part Number | Manufacturer | Package |
|---|---|---|
| TPS61023 | Texas Instruments | — |
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