TPA2016D2

Part: TPA2016D2 — Texas Instruments

Type: Stereo Class-D Audio Amplifier with Dynamic Range Compression and Automatic Gain Control

Description: 2.5–5.5 V supply, filter-free stereo Class-D audio amplifier delivering up to 2.8 W/Ch into 4 Ω at 5 V, with I²C-programmable DRC/AGC and -28 to +30 dB gain in 1-dB steps.

Operating Conditions:

• Supply voltage: 2.5–5.5 V (AVDD, PVDDR, PVDDL)
• Operating free-air temperature: -40 to +85 °C
• Logic input levels (SDZ, SDA, SCL): VIH min 1.3 V, VIL max 0.6 V
• I²C clock: up to 400 kHz

Absolute Maximum Ratings:

• Max supply voltage: 6 V (AVDD, PVDDR, PVDDL)
• Input voltage: -0.3 V to VDD + 0.3 V (SDZ, INR±, INL±); -0.3 V to 6 V (SDA, SCL)
• Max junction temperature: 150 °C
• Storage temperature: -65 to 150 °C
• ESD: ±2000 V HBM, ±500 V CDM

Key Specs:

• Maximum output power (THD+N = 10%): 1.72 W/Ch into 8 Ω at 5 V; 750 mW/Ch into 8 Ω at 3.6 V; 2.8 W/Ch into 4 Ω at 5 V; 1.5 W/Ch into 4 Ω at 3.6 V
• Supply current: 3.7 mA typ (4.7 mA max) at VDD = 3.6 V; 4.5 mA typ (5.5 mA max) at 5.5 V
• Shutdown quiescent current (SDZ = 0.35 V): 0.2 μA typ at 3.6 V (1 μA max)
• Software shutdown current: 50 μA typ (70 μA max) at 3.6 V; 75 μA typ (110 μA max) at 5.5 V
• Class-D switching frequency: 300 kHz typ (275–325 kHz)
• Start-up time: 5 ms typ (2.5 V ≤ VDD ≤ 5.5 V, CIN ≤ 1 μF)
• PSRR: -80 dB typ (VDD = 2.5–4.7 V); kSVR -68 dB at 217 Hz
• Output offset voltage: 2 mV typ (±10 mV max); gain accuracy ±0.5 dB (compression and limiter disabled, 0–30 dB)
• Efficiency: 90% typ (8 Ω, THD+N = 1%)
• Output integrated noise: 44 μV (Av = 6 dB); 33 μV A-weighted

Features:

• Filter-free Class-D architecture
• Programmable DRC and AGC parameters with selectable attack, release, and hold times
• 4 selectable compression ratios
• Digital I²C volume control; operation with or without I²C
• AGC and limiter enable/disable
• Independent software shutdown per channel
• Short-circuit and thermal protection

Applications:

• Wireless or cellular handsets and PDAs
• Portable navigation devices
• Portable DVD players
• Notebook PCs
• Portable radios and games
• Educational toys
• USB speakers

Package:

• DSBGA (YZH), 16 balls, 2.20 mm × 2.20 mm
• QFN (RTJ), 20 pins, 4.00 mm × 4.00 mm

• 1 · Filter-Free Class-D Architecture
• 1.7 W/Ch Into 8 Ω at 5 V (10% THD+N)
• 750 mW/Ch Into 8 Ω at 3.6 V (10% THD+N)
• 2.8 W/Ch Into 4 Ω at 5 V (10% THD+N)
• 1.5 W/Ch Into 4 Ω at 3.6 V (10% THD+N)
• Power Supply Range: 2.5 V to 5.5 V
• Flexible Operation With or Without I 2 C
• Programmable DRC and AGC Parameters
• Digital I 2 C Volume Control
• Selectable Gain from -28 dB to 30 dB in 1-dB Steps (When Compression is Used)
• Selectable Attack, Release, and Hold Times
• 4 Selectable Compression Ratios
• Low Supply Current: 3.5 mA
• Low Shutdown Current: 0.2 μ A
• High PSRR: 80 dB
• Fast Start-Up Time: 5 ms
• AGC Enable or Disable Function
• Limiter Enable or Disable Function
• Short-Circuit and Thermal Protection
• Space-Saving Package
• -2.2 mm × 2.2 mm Nano-Free™ DSBGA (YZH)

• Wireless or Cellular Handsets and PDAs
• Portable Navigation Devices
• Portable DVD Players
• Notebook PCs
• Portable Radios
• Portable Games
• Educational Toys
• USB Speakers

1

YZH Package 16-Pin DSBGA Top View

at TA = 25°C, VDD = 3.6 V, SDZ = 1.3 V, and RL = 8 Ω + 33 μ H (unless otherwise noted).

over operating free-air temperature range (unless otherwise noted). (1)

Copyright © 2016, Texas Instruments Incorporated

• (1) Circuit traces from NSMD defined PWB lands should be 75 μ m to 100 μ m wide in the exposed area inside the solder mask opening. Wider trace widths reduce device stand off and impact reliability.
• (2) Best reliability results are achieved when the PWB laminate glass transition temperature is above the operating the range of the intended application.
• (3) Recommend solder paste is Type 3 or Type 4.
• (4) For a PWB using a Ni/Au surface finish, the gold thickness should be less 0.5 mm to avoid a reduction in thermal fatigue performance.
• (5) Solder mask thickness should be less than 20 μ m on top of the copper circuit pattern
• (6) Best solder stencil performance is achieved using laser cut stencils with electro polishing. Use of chemically etched stencils results in inferior solder paste volume control.
• (7) Trace routing away from DSBGA device should be balanced in X and Y directions to avoid unintentional component movement due to solder wetting forces.

Figure 45. Land Pattern Dimensions