TMUX1574PWR

TEXAS INSTRUMENTS

Manufacturer

Texas Instruments

Package

TSSOP-16

Overview

Part: TMUX1574 from Texas Instruments

Type: Low-Capacitance, 2:1 (SPDT) 4-Channel, Powered-Off Protected Switch

Key Specs:

Supply range: 1.5 V to 5.5 V
Low on-capacitance: 7.5 pF
Low on-resistance: 2 Ω
High bandwidth: 2 GHz
Operating temperature: -40°C to +125°C
Powered-off protection signal voltage: up to 3.6 V
Maximum input/output voltage: 5.5 V

Features:

1.8 V Logic Compatible
Supports Input Voltage Beyond Supply (up to VDD x 2, max 5.5V)
Integrated Pull Down Resistor on Logic Pins
Bidirectional Signal Path
Fail-Safe Logic
Powered-off Protection up to 3.6 V Signals
Pinout compatible to SN74CBTLV3257
CMOS switch
2:1 SPDT switch configuration with 4-channels

Applications:

Flash memory sharing
JTAG multiplexing
SPI multiplexing
eMMC multiplexing
Servers
Data center switches & routers
Wireless infrastructure
PC & notebooks
Building automation
Grid infrastructure
ePOS
Appliances

Package:

TSSOP (16): 5.00 mm × 4.40 mm
UQFN (16): 2.60 mm x 1.80 mm
SOT-23-THIN (16): 4.20 mm x 2.00 mm

Features

¹• Wide supply range: 1.5 V to 5.5 V • Low on-capacitance: 7.5 pF

• Low on-resistance: 2 Ω • High bandwidth: 2 GHz

• -40°C to +125°C operating temperature

• 1.8 V Logic Compatible

• Supports Input Voltage Beyond Supply

• Integrated Pull Down Resistor on Logic Pins

• Bidirectional Signal Path

• Fail-Safe Logic

• Powered-off Protection up to 3.6 V Signals

– Pinout compatible to SN74CBTLV3257

Applications

Flash memory sharing
JTAG multiplexing
SPI multiplexing
eMMC multiplexing
Servers
Data center switches & routers
Wireless infrastructure
PC & notebooks
Building automation
Grid infrastructure
• ePOS
• Appliances

Pin Configuration

Pin Functions

NAME
SEL
S1A
S1B
D1
S2A
S2B
D2
GND
D3
S3B
S3A
D4
S4B
S4A
EN
VDD

⁽¹⁾ I = input, O = output, I/O = input and output, P = power

⁽²⁾ Refer to Device Functional Modes for what to do with unused pins.

Electrical Characteristics

VDD = 1.5 V to 5.5 V, GND = 0V, T^A = –40°C to +125°C

Typical values are at VDD = 3.3 V, T^A = 25°C, (unless otherwise noted).

	PARAMETER	TEST CONDITIONS	MIN	TYP	MAX	UNIT
POWER SUPPLY
VDD	Power supply voltage		1.5		5.5	V
IDD	Active supply current	VSEL = 0 V, 1.4V or VDD VS = 0 V to 5.5 V		40	68	μA
IDD_STANDB Y	Supply current when disabled	VEN = 1.4 V or VDD VS = 0 V to 5.5 V		7.5	15	μA
	DC CHARACTERISTICS
RON	On-resistance	VS = 0 V to VDD*2 VS(max) = 5.5 V ISD = 8 mA Refer to ON-State Resistance Figure		2	4.5	Ω
ΔRON	On-resistance match between channels	VS = VDD ISD = 8 mA Refer to ON-State Resistance Figure		0.07	0.28	Ω
RON (FLAT)	On-resistance flatness	VS = 0 V to VDD ISD = 8 mA Refer to ON-State Resistance Figure		1	1.8	Ω
IPOFF	Powered-off I/O pin leakage current	VDD = 0 V VS = 0 V to 3 V VD = 0 V TA = 25°C Refer to Ipoff Leakage Figure	–10	0.01	10	nA
IPOFF	Powered-off I/O pin leakage current	VDD = 0 V VS = 0 V to 3.6 V VD = 0 V Refer to Ipoff Leakage Figure	–2	0.01	2	μA
IS(OFF) ID(OFF)	OFF leakage current	Switch Off VD = 0.8VDD / 0.2VDD VS = 0.2VDD / 0.8VDD Refer to Off Leakage Figure	–100	0.03	100	nA
ID(ON) IS(ON)	ON leakage current	Switch On VD = 0.8VDD / 0.2VDD, S pins floating or VS = 0.8VDD / 0.2VDD, D pins floating Refer to On Leakage Figure	–50	0.01	50	nA
LOGIC INPUTS
VIH	Input logic high		1.2		5.5	V
VIL	Input logic low		0		0.45	V
IIH	Input high leakage current	VSEL = 1.8 V, VDD		1	±2	μA
IIL	Input low leakage current	VSEL = 0 V		0.2	±2	μA
RPD	Internal pull-down resistor on logic pins			6		MΩ
CI	Logic input capacitance	VSEL = 0 V, 1.8 V or VDD f = 1 MHz		3		pF

Absolute Maximum Ratings

Over operating free-air temperature range (unless otherwise noted).(1)(2)(3)

		MIN	MAX	UNIT
VDD	Supply voltage	–0.5	6	V
VSEL or VEN	Logic control input pin voltage (SEL or EN)	–0.5	6	V
ISEL or IEN	Logic control input pin current (SEL or EN)	–30	30	mA
VS or VD	Source or drain pin voltage	–0.5	6	V
IS or ID (CONT)	Source and drain pin continuous current: (SxA, SxB, Dx)	–25	25	mA
Tstg	Storage temperature	–65	150	°C
TJ	Junction temperature		150	°C

⁽¹⁾ Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2) The algebraic convention, whereby the most negative value is a minimum and the most positive value is a maximum.
(3) All voltages are with respect to ground, unless otherwise specified.

Recommended Operating Conditions

		MIN	MAX	UNIT
VDD	Supply voltage	1.5	5.5	V
VS or VD	(1) Signal path input/output voltage (source or drain pin), VDD ≥ 1.5 V	0	VDD x 2	V
VS_off or VD_off	(2) Signal path input/output voltage (source or drain pin), VDD < 1.5 V	0	3.6	V
VSEL or VEN	Logic control input voltage (EN, SEL)	0	5.5	V
TA	Ambient temperature	–40	125	°C

(1) Device input and output can operate up to VDD x 2, with a maximum input and output voltage of 5.5 V.
(2) VS_off and VD_off refers to the voltage at the source or drain pins when supply is less than 1.5 V.

6.4 Thermal Information

		DEVICE	DEVICE	DEVICE
	THERMAL METRIC(1)	PW (TSSOP)	DYY (SOT-23)	RSV (UQFN)
		16 PINS	16 PINS	16 PINS
RθJA	Junction-to-ambient thermal resistance	117.4	123.0	129.2
RθJC(top)	Junction-to-case (top) thermal resistance	47.9	70.5	69.7
RθJB	Junction-to-board thermal resistance	63.7	50.4	58.7
ΨJT	Junction-to-top characterization parameter	6.9	5.0	3.6
ΨJB	Junction-to-board characterization parameter	63.1	50.3	56.8
RθJC(bot)	Junction-to-case (bottom) thermal resistance	N/A	N/A	N/A

⁽¹⁾ For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.

6.5 Electrical Characteristics

VDD = 1.5 V to 5.5 V, GND = 0V, T^A = –40°C to +125°C

Typical values are at VDD = 3.3 V, T^A = 25°C, (unless otherwise noted).

	PARAMETER	TEST CONDITIONS	MIN	TYP	MAX	UNIT
POWER SUPPLY
VDD	Power supply voltage		1.5		5.5	V
IDD	Active supply current	VSEL = 0 V, 1.4V or VDD VS = 0 V to 5.5 V		40	68	μA
IDD_STANDB Y	Supply current when disabled	VEN = 1.4 V or VDD VS = 0 V to 5.5 V		7.5	15	μA
	DC CHARACTERISTICS
RON	On-resistance	VS = 0 V to VDD*2 VS(max) = 5.5 V ISD = 8 mA Refer to ON-State Resistance Figure		2	4.5	Ω
ΔRON	On-resistance match between channels	VS = VDD ISD = 8 mA Refer to ON-State Resistance Figure		0.07	0.28	Ω
RON (FLAT)	On-resistance flatness	VS = 0 V to VDD ISD = 8 mA Refer to ON-State Resistance Figure		1	1.8	Ω
IPOFF	Powered-off I/O pin leakage current	VDD = 0 V VS = 0 V to 3 V VD = 0 V TA = 25°C Refer to Ipoff Leakage Figure	–10	0.01	10	nA
IPOFF	Powered-off I/O pin leakage current	VDD = 0 V VS = 0 V to 3.6 V VD = 0 V Refer to Ipoff Leakage Figure	–2	0.01	2	μA
IS(OFF) ID(OFF)	OFF leakage current	Switch Off VD = 0.8VDD / 0.2VDD VS = 0.2VDD / 0.8VDD Refer to Off Leakage Figure	–100	0.03	100	nA
ID(ON) IS(ON)	ON leakage current	Switch On VD = 0.8VDD / 0.2VDD, S pins floating or VS = 0.8VDD / 0.2VDD, D pins floating Refer to On Leakage Figure	–50	0.01	50	nA
LOGIC INPUTS
VIH	Input logic high		1.2		5.5	V
VIL	Input logic low		0		0.45	V
IIH	Input high leakage current	VSEL = 1.8 V, VDD		1	±2	μA
IIL	Input low leakage current	VSEL = 0 V		0.2	±2	μA
RPD	Internal pull-down resistor on logic pins			6		MΩ
CI	Logic input capacitance	VSEL = 0 V, 1.8 V or VDD f = 1 MHz		3		pF

6.6 Dynamic Characteristics

VDD = 1.5 V to 5.5 V, GND = 0V, T^A = –40°C to +125°C

Typical values are at VDD = 3.3 V, T^A = 25°C, (unless otherwise noted).

	PARAMETER	TEST CONDITIONS		TYP	MAX	UNIT
COFF	Source and drain off capacitance	VS = 2.5 V VSEL= 0 V f = 1 MHz Refer to Capacitance Figure	Switch OFF	3.5	6	pF
CON	Source and drain on capacitance	VS = 2.5 V VSEL= 0 V f = 1 MHz Refer to Capacitance Figure	Switch ON	7.5	12	pF
QC	Charge Injection	VS = VDD/2 RS = 0 Ω, CL =1 nF Refer to Charge Injection Figure	Switch ON	3.5		pC
		RL = 50 Ω f = 100 kHz Refer to Off Isolation Figure	Switch OFF	–90		dB
OISO	Off isolation	RL = 50 Ω f = 1 MHz Refer to Off Isolation Figure	Switch OFF	–75		dB
XTALK	Channel to Channel crosstalk	RL = 50 Ω f = 100 kHz Refer to Crosstalk Figure	Switch ON	–90		dB
BW	Bandwidth	RL = 50 Ω Refer to Bandwidth Figure	Switch ON	2		GHz
ILOSS	Insertion loss	RL = 50 Ω f = 1 MHz Refer to Bandwidth Figure	Switch ON	–0.12		dB

6.7 Timing Requirements

VDD = 1.5 V to 5.5 V, GND = 0V, T^A = –40°C to +125°C

Typical values are at VDD = 3.3 V, T^A = 25°C, (unless otherwise noted).

	PARAMETER	TEST CONDITIONS	MIN	NOM	MAX	UNIT
tTRAN	Transition time from control input	VDD = 2.5 V to 5.5 V VS = VDD RL = 200 Ω, CL = 15pF Refer to Transition Timing Figure		160	350	ns
tTRAN	Transition time from control input	VDD < 2.5 V VS = VDD RL = 200 Ω, CL = 15pF Refer to Transition Timing Figure		180	580	ns
tON(EN)	Device turn on time from enable pin	VS = VDD RL = 200 Ω, CL = 15pF Refer to Ton(EN) & Toff(EN) Figure		12	35	μs
tOFF(EN)	Device turn off time from enable pin	VS = VDD RL = 200 Ω, CL = 15pF Refer to Ton(EN) & Toff(EN) Figure		50	95	ns
tON(VDD)	Device turn on time (VDD to output)	VS = 3.6 V VDD rise time = 1us RL = 200 Ω, CL = 15pF Refer to Ton(vdd) & Toff(vdd) Figure		20	60	μs
tOFF(VDD)	Device turn off time (VDD to output)	VS = 3.6 V VDD fall time = 1us RL = 200 Ω, CL = 15pF Refer to Ton(vdd) & Toff(vdd) Figure		1.2	2.7	μs
tOPEN (BBM)	Break before make time	VS = 1 V RL = 200 Ω, CL = 15pF Refer to Topen(BBM) Figure	0.5			ns
tSK(P)	Inter - channel skew - QFN (RSV)	Refer to Tsk Figure		5		ps
tSK(P)	Inter - channel skew - DYY (SOT-23)	Refer to Tsk Figure		9		ps
tSK(P)	Inter - channel skew - TSSOP (PW)	Refer to Tsk Figure		18		ps
tPD	Propagation delay - QFN (RSV)	Refer to Tpd Figure		50		ps
tPD	Propagation delay - DYY (SOT-23)	Refer to Tpd Figure		75		ps
tPD	Propagation delay - TSSOP (PW)	Refer to Tpd Figure		95		ps

6.8 Typical Characteristics

At T_A = 25 °C, V_DD = 5 V (unless otherwise noted).

Submit Documentation Feedback

Thermal Information

		DEVICE	DEVICE	DEVICE
	THERMAL METRIC(1)	PW (TSSOP)	DYY (SOT-23)	RSV (UQFN)
		16 PINS	16 PINS	16 PINS
RθJA	Junction-to-ambient thermal resistance	117.4	123.0	129.2
RθJC(top)	Junction-to-case (top) thermal resistance	47.9	70.5	69.7
RθJB	Junction-to-board thermal resistance	63.7	50.4	58.7
ΨJT	Junction-to-top characterization parameter	6.9	5.0	3.6
ΨJB	Junction-to-board characterization parameter	63.1	50.3	56.8
RθJC(bot)	Junction-to-case (bottom) thermal resistance	N/A	N/A	N/A

⁽¹⁾ For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.

Related Variants

The following components are covered by the same datasheet.

Part Number	Manufacturer	Package
TMUX1574	Texas Instruments	—
TMUX1574DYYR	Texas Instruments	—
TMUX1574DYYR.A	Texas Instruments	—
TMUX1574PWR.A	Texas Instruments	—
TMUX1574PWRG4	Texas Instruments	—
TMUX1574PWRG4.A	Texas Instruments	—
TMUX1574RSVR	Texas Instruments	—
TMUX1574RSVR.A	Texas Instruments	—

Data on this page is extracted from publicly available manufacturer datasheets using automated tools including AI. It may contain errors or omissions. Always verify specifications against the official manufacturer datasheet before making design or purchasing decisions. See our Terms of Service. Rights holders can submit a takedown request.

Get structured datasheet data via API

Get started free