The TAS5711 is a 20-W, efficient, digital audio power amplifier for driving stereo bridge-tied speakers. One serial data input allows processing of up to two discrete audio channels and seamless integration to most digital audio processors and MPEG decoders. The device accepts a wide range of input data and data rates. A fully programmable data path routes these channels to the internal speaker drivers.

The TAS5711 is an I 2 S slave-only device receiving all clocks from external sources. The TAS5711 operates with a PWM carrier between 384-kHz switching rate and 352-KHz switching rate depending on the input sample rate. Oversampling combined with a fourth-order noise shaper provides a flat noise floor and excellent dynamic range from 20 Hz to 20 kHz.

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.

• 2 · Audio Input/Output
• -20-W Into an 8Ω Load From an 18-V Supply
• -Wide PVDD Range, From 8 V to 26 V
• -Efficient Class-D Operation Eliminates Need for Heatsinks
• -One Serial Audio Input (Two Audio Channels)
• -2.1 Mode (2 SE + 1 BTL)
• -2.0 Mode (2 BTL)
• -Single-Filter PBTL Mode Support
• -I 2 C Address Selection Pin (Chip Select)
• -Supports 8-kHz to 48-kHz Sample Rate (LJ/RJ/I 2 S)
• Audio/PWM Processing
• -Independent Channel Volume Controls With 24-dB to Mute
• -Separate Dynamic Range Control for Satellite and Subchannels
• -21 Programmable Biquads for Speaker EQ and Other Audio Processing Features
• -Programmable Coefficients for DRC Filters
• -DC Blocking Filters
• -Support for 3D Effects
• General Features
• -Serial Control Interface Operational Without MCLK
• -Factory-Trimmed Internal Oscillator for Automatic Rate Detection
• -Surface Mount, 48-Pin, 7-mm × 7-mm HTQFP Package
• -Thermal and Short-Circuit Protection
• -Support for AD or BD Mode

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• -Up to 90% Efficient
• -AD and BD Filter Mode Support
• -SNR: 106 dB, A-Weighted
• -EQ: Speaker Equalization Improves Audio Performance
• -DRC: Dynamic Range Compression. Can Be Used As Power Limiter. Enables Speaker Protection, Easy Listening, Night-Mode Listening.
• -Separate DRC for Satellite and Subchannels
• -Autobank Switching: Preload Coefficients for Different Sample Rates. No Need to Write new Coefficients to the Part When Sample Rate Changes.
• -Autodetect: Automatically Detects Sample-Rate Changes. No Need for External Microprocessor Intervention
• Requires Only 3.3 V and PVDD

TAS5711PHPR Pinout

Package: 48-PowerTQFP

Pin	Name	Type	Description
1	OUT_A	O	Audio Output A
2	PVDD_A	P	Power Supply A
3	PVDD_A	P	Power Supply A
4	BST_A	P	Boost Supply A
5	GVDD_OUT	P	Gate Driver Supply Output
6	SSTIMER	I	Soft Start Timer
7	OC_ADJ	I	Overcurrent Adjustment
8	PBTL	I	PBTL Mode Select
9	AVSS	P	Analog Ground
10	PLL_FLTM	I	PLL Filter Mode
11	PLL_FLTP	I	PLL Filter Pole
12	VR_ANA	I	Analog Reference Voltage
13	AVDD	P	Analog Power Supply
14	A_SEL	I	Address Select
15	MCLK	I	Master Clock
16	OSC_RES	I	Oscillator Resistor
17	DVSS	P	Digital Ground
18	VR_DIG	I	Digital Reference Voltage
19	PDN	I	Power Down
20	LRCLK	I	Left/Right Clock
21	SCLK	I	Serial Clock
22	SDN	I	Serial Data In
23	SDOUT	O	Serial Data Out
24	SCL	I	I²C Clock
25	RESET	I	Reset
26	STEST	I	Self Test
27	DVDD	P	Digital Power Supply
28	DVSS	P	Digital Ground
29	GND	P	Ground
30	AGND	P	Analog Ground
31	VREG	O	Voltage Regulator Output
32	GVDD_OUT	P	Gate Driver Supply Output
33	BST_D	P	Boost Supply D
34	PVDD_D	P	Power Supply D
35	PVDD_D	P	Power Supply D
36	OUT_D	O	Audio Output D
37	PVDD_D	P	Power Supply D
38	PVDD_C	P	Power Supply C
39	OUT_C	O	Audio Output C
40	PVDD_C	P	Power Supply C
41	BST_C	P	Boost Supply C
42	BST_B	P	Boost Supply B
43	PVDD_B	P	Power Supply B
44	PVDD_B	P	Power Supply B
45	OUT_B	O	Audio Output B
46	OUT_B	O	Audio Output B
47	PVDD_AB	P	Power Supply AB
48	PVDD_AB	P	Power Supply AB

Notes

• Power pins (P): PVDD_A, PVDD_B, PVDD_C, PVDD_D, PVDD_AB, BST_A, BST_B, BST_C, BST_D, GVDD_OUT, AVSS, DVSS, GND, AGND, VREG, AVDD, DVDD — all require appropriate decoupling and bulk capacitance per application circuit.
• Multiple instances: Several pins appear twice (e.g., PVDD_A at pins 2 and 3; PVDD_D at pins 34, 35, 37; PVDD_B at pins 43, 44; PVDD_AB at pins 47, 48; OUT_B at pins 45, 46). These are intentional for current distribution and must all be connected.
• Four-channel amplifier: Outputs OUT_A, OUT_B, OUT_C, OUT_D correspond to four independent audio channels with separate power supplies and boost circuits.
• Digital interface: Supports I²C (SCL, SDN/SDA), I²S (SCLK, LRCLK, SDOUT), and SPI-like serial protocols.
• Pin 48 is the exposed thermal pad (PowerTQFP package); it should be connected to ground for thermal management.

TA = 25°, PVCC_x = 18V, DVDD = AVDD = 3.3V, RL= 8 Ω , BTL AD Mode, FS = 48KHz (unless otherwise noted)

PARAMETER	PARAMETER	PARAMETER	TEST CONDITIONS	MIN TYP	MAX	UNIT
V OH	High-level output voltage	A_SEL and SDA	I OH = -4 mA DVDD = AVDD = 3 V	2.4		V
V OL	Low-level output voltage	A_SEL and SDA	I OL = 4 mA DVDD = AVDD = 3 V		0.5	V
I IL	Low-level input current		V I < V IL ; DVDD = AVDD = 3.6V		75	m A
I IH	High-level input current		V I > V IH ; DVDD = AVDD = 3.6V		75 (1)	m A
I DD	3.3 V supply current	3.3 V supply voltage (DVDD, AVDD)	Normal Mode	48	70	mA
I DD	3.3 V supply current	3.3 V supply voltage (DVDD, AVDD)	Reset (RESET = low, PDN = high)	24	32	mA
I PVDD	Half-bridge supply current	No load (PVDD_x)	Normal Mode	30	55	mA
I PVDD	Half-bridge supply current	No load (PVDD_x)	Reset (RESET = low, PDN = high)	5	13	mA
r DS(on) (2)	Drain-to-source resistance, LS	T J = 25°C, includes metallization resistance	T J = 25°C, includes metallization resistance	180	m Ω
r DS(on) (2)	Drain-to-source resistance, HS	T J = 25°C, includes metallization resistance	T J = 25°C, includes metallization resistance	180	m Ω
I/O Protection	I/O Protection	I/O Protection	I/O Protection	I/O Protection	I/O Protection	I/O Protection
V uvp	Undervoltage protection limit	PVDD falling	PVDD falling	7.2		V
V uvp,hyst	Undervoltage protection limit	PVDD rising	PVDD rising	7.6		V
OTE (3)	Overtemperature error			150		°C
OTE HYST (3)	Extra temperature drop required to recover from error			30		°C
OLPC	Overload protection counter	f PWM = 384 kHz	f PWM = 384 kHz	0.63		ms
I OC	Overcurrent limit protection	Resistor-programmable, max. current, R OCP = 22 k Ω	Resistor-programmable, max. current, R OCP = 22 k Ω	4.5		A
I OCT	Overcurrent response time			150		ns
R OCP	OC programming resistor range	Resistor tolerance = 5% for typical value; the minimum resistance should not be less than 20 k Ω .	Resistor tolerance = 5% for typical value; the minimum resistance should not be less than 20 k Ω .	20 22		k Ω
R PD	Internal pulldown resistor at the output of each half-bridge	Connected when drivers are tristated to provide bootstrap capacitor charge.	Connected when drivers are tristated to provide bootstrap capacitor charge.	3		k Ω

over operating free-air temperature range (unless otherwise noted) (1)

		VALUE	UNIT
Supply voltage	DVDD, AVDD	-0.3 to 3.6	V
Supply voltage	PVDD_x	-0.3 to 30	V
	OC_ADJ	-0.3 to 4.2	V
	3.3-V digital input	-0.5 to DVDD + 0.5	V
	5-V tolerant (2) digital input (except MCLK)	-0.5 to DVDD + 2.5 (3)	V
	5-V tolerant MCLK input	-0.5 to AVDD + 2.5 (3)	V
OUT_x to PGND_x	OUT_x to PGND_x	32 (4)	V
BST_x to PGND_x	BST_x to PGND_x	43 (4)	V
Input clamp current, I IK	Input clamp current, I IK	±20	mA
Output clamp current, I OK	Output clamp current, I OK	±20	mA
Operating free-air temperature	Operating free-air temperature	0 to 85	°C
Operating junction temperature range	Operating junction temperature range	0 to 150	°C
Storage temperature range, T stg	Storage temperature range, T stg	-40 to 125	°C

			MIN	NOM	MAX	UNIT
	Digital/analog supply voltage	DVDD, AVDD	3	3.3	3.6	V
	Half-bridge supply voltage	PVDD_x	8		26	V
V IH	High-level input voltage	5-V tolerant	2			V
V IL	Low-level input voltage	5-V tolerant			0.8	V
T A	Operating ambient temperature range		0		85	°C
T J (1)	Operating junction temperature range		0		125	°C
R L (BTL)	Load impedance	Output filter: L = 15 m H, C = 680 nF.	6	8		Ω
L O (BTL)	Output-filter inductance	Minimum output inductance under short-circuit condition	10			m H

THERMAL METRIC (1)(2)	THERMAL METRIC (1)(2)	TAS5711 PHP (48 PIN)	UNITS
q JA	Junction-to-ambient thermal resistance	29.9	°C/W
q JCtop	Junction-to-case (top) thermal resistance	20.5	°C/W
q JB	Junction-to-board thermal resistance	12.5	°C/W
y JT	Junction-to-top characterization parameter	0.3	°C/W
y JB	Junction-to-board characterization parameter	7.3	°C/W
q JCbot	Junction-to-case (bottom) thermal resistance	0.7	°C/W