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STM8S103F2

8-bit Microcontroller

The STM8S103F2 is a 8-bit microcontroller from STMicroelectronics. View the full STM8S103F2 datasheet below including electrical characteristics, absolute maximum ratings.

Manufacturer

STMicroelectronics

Category

8-bit Microcontroller

Overview

Part: STM8S103F2/F3/K3 — STMicroelectronics

Type: 8-bit Microcontroller (MCU)

Description: 16 MHz STM8S 8-bit MCU with up to 8 Kbytes Flash, 640 bytes data EEPROM, 1 Kbyte RAM, 10-bit ADC, 3 timers, and multiple communication interfaces (UART, SPI, I²C), operating from 2.95 V to 5.5 V.

Operating Conditions:

  • Supply voltage: 2.95 to 5.5 V
  • Operating temperature: -40 to +125 °C
  • Max CPU frequency: 16 MHz

Absolute Maximum Ratings:

  • Max supply voltage: 6.5 V
  • Max junction/storage temperature: -55 to +150 °C

Key Specs:

  • Program memory: 8 Kbyte Flash (STM8S103F3/K3), 4 Kbyte Flash (STM8S103F2)
  • Data memory: 640 byte true data EEPROM
  • RAM: 1 Kbyte
  • ADC resolution: 10-bit, ±1 LSB
  • SPI interface speed: up to 8 Mbit/s
  • I2C interface speed: up to 400 kbit/s
  • Run mode current consumption (Vdd=5V, fCPU=16MHz): 6.5 mA (typ)
  • Halt mode current consumption (Vdd=5V): 2.5 μA (typ)

Features:

  • 16 MHz advanced STM8 core with Harvard architecture and 3-stage pipeline
  • Data retention 20 years at 55 °C after 10 kcycle for Flash
  • Endurance 300 kcycle for true data EEPROM
  • Flexible clock control with 4 master clock sources
  • Low-power modes (wait, active-halt, halt)
  • Nested interrupt controller with 32 interrupts
  • Up to 28 I/Os, including 21 high sink outputs
  • 96-bit unique key for each device

Applications:

Package:

  • UFQFPN32 (32-pin, 5x5 mm)
  • LQFP32 (32-pin, 7x7 mm)
  • SDIP32 (32-pin)
  • TSSOP20 (20-pin)
  • SO20 (20-pin)
  • UFQFPN20 (20-lead, 3x3 mm)

Features

  • Clock prescaler: to get the best compromise between speed and current consumption the clock frequency to the CPU and peripherals can be adjusted by a programmable prescaler.
  • Safe clock switching: clock sources can be changed safely on the fly in run mode through a configuration register. The clock signal is not switched until the new clock source is ready. The design guarantees glitch-free switching.
  • Clock management: to reduce power consumption, the clock controller can stop the clock to the core, individual peripherals or memory.
  • Master clock sources: four different clock sources can be used to drive the master clock:
  • -1-16 MHz high-speed external crystal (HSE)
  • -Up to 16 MHz high-speed user-external clock (HSE user-ext)
  • -16 MHz high-speed internal RC oscillator (HSI)
  • -128 kHz low-speed internal RC (LSI)
  • Startup clock: After reset, the microcontroller restarts by default with an internal 2 MHz clock (HSI/8). The prescaler ratio and clock source can be changed by the application program as soon as the code execution starts.
  • Clock security system (CSS): This feature can be enabled by software. If an HSE clock failure occurs, the internal RC (16 MHz/8) is automatically selected by the CSS and an interrupt can optionally be generated.
  • Configurable main clock output (CCO): This outputs an external clock for use by the application.

Table 2. Peripheral clock gating bit assignments in CLK_PCKENR1/2 registers

BitPeripheral clockBitPeripheral clockBitPeripheral clockBitPeripheral clock
PCKEN17TIM1PCKEN13UART1PCKEN27ReservedPCKEN23ADC
PCKEN16ReservedPCKEN12ReservedPCKEN26ReservedPCKEN22AWU
PCKEN15TIM2PCKEN11SPIPCKEN25ReservedPCKEN21Reserved
PCKEN14TIM4PCKEN10I2CPCKEN24ReservedPCKEN20Reserved

Table 2. Peripheral clock gating bit assignments in CLK_PCKENR1/2 registers

20

Pin Configuration

Table 4. Legend/abbreviations for pin description tables

TypeI= Input, O = Output, S = Power supplyI= Input, O = Output, S = Power supply
LevelInputCM = CMOS
LevelOutputHS = High sink
Output speedO1 = Slow (up to 2 MHz) O2 = Fast (up to 10 MHz) O3 = Fast/slow programmability with slow as default state O4 = Fast/slow programmability with fast as default stateO1 = Slow (up to 2 MHz) O2 = Fast (up to 10 MHz) O3 = Fast/slow programmability with slow as default state O4 = Fast/slow programmability with fast as default state
Port and control configurationInputfloat = floating, wpu = weak pull-up
Port and control configurationOutputT = True open drain, OD = Open drain, PP = Push pull
Reset stateUnlessstate is the same during

Table 4. Legend/abbreviations for pin description tables

30

Electrical Characteristics

Subject to general operating conditions for V DD , f MASTER , and T A unless otherwise specified.

Table 45. ADC characteristics

SymbolParameterConditionsMinTypMaxUnit
f ADCADC clock frequencyV DD = 2.95 to 5.5 V1-4MHz
f ADCADC clock frequencyV DD = 4.5 to 5.5 V1-6MHz
V AINConversion voltage range (1)-V SS-V DDV
C ADCInternal sample and hold capacitor--3-pF
t S (1)Minimum sampling timef ADC = 4 MHz-0.75-μs
t S (1)Minimum sampling timef ADC = 6 MHz-0.5-μs
t STABWakeup time from standby--7.0-μs
t CONVMinimum total conversion time (including sampling time, 10- bit resolution)f ADC = 4 MHz3.53.53.5μs
t CONVMinimum total conversion time (including sampling time, 10- bit resolution)f ADC = 6 MHz2.332.332.33μs
t CONVMinimum total conversion time (including sampling time, 10- bit resolution)-1414141/f ADC

Table 45. ADC characteristics

Table 46. ADC accuracy with R AIN < 10 k Ω , V DD = 5 V

Table 46. ADC accuracy with R AIN < 10 k Ω , V DD = 5 V

SymbolParameterConditionsTypMax (1)Unit
\E T \Total unadjusted error (2)f ADC = 2 MHz1.6
\E T \Total unadjusted error (2)f ADC = 4 MHz2.2
\E T \Total unadjusted error (2)f ADC = 6 MHz2.4
\E O \Offset error (2)f ADC = 2 MHz1.1
\E O \Offset error (2)f ADC = 4 MHz1.5
\E O \Offset error (2)f ADC = 6 MHz1.8
\E G \Gain error (2)f ADC = 2 MHz1.5
\E G \Gain error (2)f ADC = 4 MHz2.1
\E G \Gain error (2)f ADC = 6 MHz2.2
\E D \Differential linearity error (2)f ADC = 2 MHz0.7
\E D \Differential linearity error (2)f ADC = 4 MHz0.7
\E D \Differential linearity error (2)f ADC = 6 MHz0.7
\E L \Integral linearity error (2)f ADC = 2 MHz0.6
\E L \Integral linearity error (2)f ADC = 4 MHz0.8
\E L \Integral linearity error (2)f ADC = 6 MHz0.8

Table 47. ADC accuracy with R AIN < 10 k Ω , V DD = 3.3 V

SymbolParameterConditionsTypMax (1)Unit
\E T \Total unadjusted error (2)f ADC = 2 MHz1.6
\E T \Total unadjusted error (2)f ADC = 4 MHz1.9
\E O \Offset error (2)f ADC = 2 MHz1
\E O \Offset error (2)f ADC = 4 MHz1.5
\E G \Gain error (2)f ADC = 2 MHz1.3
\E G \Gain error (2)f ADC = 4 MHz2
\E D \Differential linearity error (2)f ADC = 2 MHz0.7
\E D \Differential linearity error (2)f ADC = 4 MHz0.7
\E L \Integral linearity error (2)f ADC = 2 MHz0.6
\E L \Integral linearity error (2)f ADC = 4 MHz0.8
  1. ADC accuracy vs. negative injection current: Injecting negative current on any of the analog input pins should be avoided as this significantly reduces the accuracy of the conversion being performed on another analog input. It is recommended to add a Schottky diode (pin to ground) to standard analog pins which may potentially inject negative current. Any positive injection current within the limits specified for I INJ(PIN) and Σ I INJ(PIN) in Section 10.3.6 does not affect the ADC accuracy.
  2. Example of an actual transfer curve
  3. The ideal transfer curve
  4. End point correlation line
  5. EO = Offset error: deviation between the first actual transition and the first ideal one.
  6. ET = Total unadjusted error: maximum deviation between the actual and the ideal transfer curves.
  7. EG = Gain error: deviation between the last ideal transition and the last actual one.
  8. EL = Integral linearity error: maximum deviation between any actual transition and the end point correlation line.
  9. ED = Differential linearity error: maximum deviation between actual steps and the ideal one.

Figure 43. ADC accuracy characteristics

Figure 44. Typical application with ADC

  1. Legend: R AIN = external resistance, C AIN = capacitors, C samp = internal sample and hold capacitor.

88

Absolute Maximum Ratings

Stresses above the absolute maximum ratings listed in Table 16: Voltage characteristics , Table 17: Current characteristics and Table 18: Thermal characteristics may cause permanent damage to the device. These are stress ratings only and a functional operation of the device at these conditions is not implied. Exposure to maximum rating conditions for extended periods may affect the device's reliability.

The device's mission profile (application conditions) is compliant with the JEDEC JESD47 Qualification Standard, the extended mission profiles are available on demand.

Table 16. Voltage characteristics

SymbolRatingsMinMaxUnit
V DDx - V SSSupply voltage (1)-0.36.5V
V INInput voltage on true open drain pins (2)V SS - 0.36.5V
V INInput voltage on any other pin (2)V SS - 0.3V DD + 0.3V
\V DDx - V DD \Variations between different power pins-
\V SSx - V SS \Variations between all the different ground pins-
V ESDElectrostatic discharge voltagesee Absolute maximum ratings (electrical sensitivity) on page 87see Absolute maximum ratings (electrical sensitivity) on page 87see Absolute maximum ratings (electrical sensitivity) on page 87

Table 17. Current characteristics

SymbolRatingsMax. (1)Unit
I VDDTotal current into V DD power lines (source) (2)100mA
I VSSTotal current out of V SS ground lines (sink) (1)80mA
I IOOutput current sunk by any I/O and control pin20mA
I IOOutput current source by any I/Os and control pin-20mA

88

Table 17. Current characteristics (continued)

SymbolRatingsMax. (1)Unit
I INJ(PIN) (3) (4)Injected current on NRST pin±4mA
I INJ(PIN) (3) (4)Injected current on OSCIN pin±4mA
I INJ(PIN) (3) (4)Injected current on any other pin (5)±4mA
Σ I INJ (3)Total injected current (sum of all I/O and control pins) (5)±20mA
  1. Guaranteed by characterization results.
  2. All power (V DD ) and ground (V SS ) pins must always be connected to the external supply.
  3. I INJ must never be exceeded. This condition is implicitly insured if V IN maximum is respected. If V IN maximum cannot be respected, the injection current must be limited externally to the I INJ(PIN) value. A positive injection is induced by V IN > V DD while a negative injection is induced by V IN < V SS . For true opendrain pads, there is no positive injection current allowed and the corresponding V IN maximum must always be respected.
  4. ADC accuracy vs. negative injection current: Injecting negative current on any of the analog input pins should be avoided as this significantly reduces the accuracy of the conversion being performed on another analog input. It is recommended to add a Schottky diode (pin to ground) to standard analog pins which may potentially inject negative current. Any positive injection current within the limits specified for IINJ(PIN) and Σ I INJ(PIN) in the I/O port pin characteristics section does not affect the ADC accuracy.
  5. When several inputs are submitted to a current injection, the maximum Σ I INJ(PIN) is the absolute sum of the positive and negative injected currents (instantaneous values). These results are based on characterization with Σ I INJ(PIN) maximum current injection on four I/O port pins of the device.

Table 18. Thermal characteristics

SymbolRatingsValueUnit
T STGStorage temperature range- 65 to 150°C
T JMaximum junction temperature150°C

Thermal Information

The maximum junction temperature (T Jmax ) of the device must never exceed the values specified in Table 19: General operating conditions , otherwise the functionality of the device cannot be guaranteed.

The maximum junction temperature T Jmax , in degrees Celsius, may be calculated using the following equation:

Package Information

In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK ® packages, depending on their level of environmental compliance. ECOPACK ® specifications, grade definitions and product status are available at: www.st.com . ECOPACK ® is an ST trademark.

Related Variants

The following components are covered by the same datasheet.

Part NumberManufacturerPackage
STM8S103STMicroelectronics
STM8S103F3STMicroelectronics
STM8S103F3P6STMicroelectronicsUFQFPN
STM8S103K3STMicroelectronics
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