STM32L151C8T6

Part: STM32L15x Type: Ultra-low-power 32-bit Arm® Cortex®-M3 MCU

Description: Ultra-low-power 32-bit Arm® Cortex®-M3 MCU with up to 256 KB Flash, 32 KB SRAM, 8 KB EEPROM, LCD driver, USB, 12-bit ADC, and DAC.

Operating Conditions:

• Supply voltage: 1.65 V to 3.6 V
• Operating temperature: -40°C to 105°C
• Max CPU frequency: 32 MHz

Absolute Maximum Ratings:

• Max supply voltage: 4.0 V
• Max continuous current: 120 mA (total into VDD_x)
• Max storage temperature: 150 °C

Key Specs:

• Flash memory: 256 Kbytes with ECC
• RAM: 32 Kbytes
• EEPROM: 8 Kbytes true EEPROM with ECC
• CPU: Arm® Cortex®-M3 32-bit, up to 32 MHz
• ADC: 12-bit, 1 Msps, up to 40 channels
• DAC: 12-bit, 2 channels with output buffers
• Standby mode current: 305 nA (3 wakeup pins)
• Run mode current: 230 μA/MHz

Features:

• Ultra-low-power platform
• Up to 116 fast I/Os (102 I/Os 5V tolerant)
• LCD driver (up to 8x40 segments)
• DMA controller 12x channels
• USB 2.0 (internal 48 MHz PLL)
• Up to 23 capacitive sensing channels

Package:

• UFBGA132 (7 × 7 mm)
• LQFP144 (20 × 20 mm)
• LQFP100 (14 × 14 mm)
• LQFP64 (10 × 10 mm)
• WLCSP64 (0.4 mm pitch)

• Ultra-low-power platform
• -1.65 V to 3.6 V power supply
• --40°C to 105°C temperature range
• -305 nA standby mode (3 wakeup pins)
• -1.15 μA standby mode + RTC
• -0.475 μA stop mode (16 wakeup lines)
• -1.35 μA stop mode + RTC
• -11 μA Low-power run mode
• -230 μA/MHz run mode
• -10 nA ultra-low I/O leakage
• -8 μs wakeup time
• Core: Arm ® Cortex ® -M3 32-bit CPU
• -From 32 kHz up to 32 MHz max
• -1.25 DMIPS/MHz (Dhrystone 2.1)
• -Memory protection unit
• Up to 23 capacitive sensing channels
• CRC calculation unit, 96-bit unique ID
• Reset and supply management
• -Low-power, ultrasafe BOR (brownout reset) with 5 selectable thresholds
• -Ultra-low-power POR/PDR
• -Programmable voltage detector (PVD)
• Clock sources
• -1 to 24 MHz crystal oscillator
• -32 kHz oscillator for RTC with calibration
• -High Speed Internal 16 MHz factorytrimmed RC (+/- 1%)
• -Internal low-power 37 kHz RC
• -Internal multispeed low-power 65 kHz to 4.2 MHz
• -PLL for CPU clock and USB (48 MHz)
• Pre-programmed bootloader
• -USB and USART supported
• Serial wire debug, JTAG and trace

Table 1. Device summary

Table 1. Device summary

Figure 3. STM32L15xRC-A LQFP64 pinout

Figure 4. STM32L15xRC WLCSP64 ballout

1. This figure shows the package top view.

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Figure 5. STM32L15xVC-A LQFP100 pinout

Figure 6. STM32L15xQC UFBGA132 ballout

1. This figure shows the package top view.

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Figure 7. STM32L15xZC LQFP144 pinout

Table 7. Legend/abbreviations used in the pinout table

Table 8. STM32L151xC/C-A and STM32L152xC/C-A pin definitions

Table 8. STM32L151xC/C-A and STM32L152xC/C-A pin definitions

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1. I = input, O = output, S = supply.
2. Function availability depends on the chosen device.
3. Applicable to STM32L152xD devices only. In STM32L151xD devices, this pin should be connected to V DD .
4. The PC14 and PC15 I/Os are only configured as OSC32_IN/OSC32_OUT when the LSE oscillator is ON (by setting the LSEON bit in the RCC_CSR register). The LSE oscillator pins OSC32_IN/OSC32_OUT can be used as general-purpose PH0/PH1 I/Os, respectively, when the LSE oscillator is off (after reset, the LSE oscillator is off). The LSE has priority over the GPIO function. For more details, refer to Using the OSC32_IN/OSC32_OUT pins as GPIO PC14/PC15 port pins section in the STM32L151xx, STM32L152xx and STM32L162xx reference manual (RM0038).
5. The PH0 and PH1 I/Os are only configured as OSC_IN/OSC_OUT when the HSE oscillator is ON (by setting the HSEON bit in the RCC_CR register). The HSE oscillator pins OSC_IN/OSC_OUT can be used as general-purpose PH0/PH1 I/Os, respectively, when the HSE oscillator is off ( after reset, the HSE oscillator is off ). The HSE has priority over the GPIO function.

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The definition and values of input/output AC characteristics are given in Figure 18 and Table 44 , respectively.

Unless otherwise specified, the parameters given in Table 44 are derived from tests performed under the conditions summarized in Table 13 .

Table 44. I/O AC characteristics (1)

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Figure 18. I/O AC characteristics definition

Stresses above the absolute maximum ratings listed in Table 10: Voltage characteristics , Table 11: Current characteristics , and Table 12: Thermal characteristics may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these conditions is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability.

Table 10. Voltage characteristics

Table 11. Current characteristics

1. Positive current injection is not possible on these I/Os. A negative injection is induced by V IN <VSS . I INJ(PIN) must never be exceeded. Refer to Table 10 for maximum allowed input voltage values.
2. A positive injection is induced by V IN > V DD while a negative injection is induced by V IN < V SS . I INJ(PIN) must never be exceeded. Refer to Table 10: Voltage characteristics for the maximum allowed input voltage values.
3. When several inputs are submitted to a current injection, the maximum Σ I INJ(PIN) is the absolute sum of the positive and negative injected currents (instantaneous values).

Table 12. Thermal characteristics

The maximum chip-junction temperature, T J max, in degrees Celsius, may be calculated using the following equation:

T J max = T A max + (P D max × Θ JA )

In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com . ECOPACK is an ST trademark.