STM32L053C8T6
MicrocontrollerThe STM32L053C8T6 is a microcontroller from STMicroelectronics. View the full STM32L053C8T6 datasheet below including key specifications, electrical characteristics, absolute maximum ratings.
Manufacturer
STMicroelectronics
Category
Microcontroller
Package
48-LQFP
Key Specifications
| Parameter | Value |
|---|---|
| Connectivity | I2C, IrDA, SPI, UART/USART, USB |
| Core Processor | ARM® Cortex®-M0+ |
| Core Size | 32-Bit |
| Data Converters | A/D 10x12b; D/A 1x12b |
| DigiKey Programmable | Not Verified |
| EEPROM Size | 2K x 8 |
| Mounting Type | Surface Mount |
| Number of I/O | 37 |
| Operating Temperature | -40°C ~ 85°C (TA) |
| Oscillator Type | Internal |
| Package / Case | 48-LQFP |
| Peripherals | Brown-out Detect/Reset, DMA, I2S, LCD, POR, PWM, WDT |
| Flash Memory Size | 64KB (64K x 8) |
| Program Memory Type | FLASH |
| RAM Size | 8K x 8 B |
| Clock Speed | 32MHz |
| Supplier Device Package | 48-LQFP (7x7) |
| Supply Voltage | 1.65V ~ 3.6V |
Overview
Part: STM32L053C6, STM32L053C8, STM32L053R6, STM32L053R8
Type: Ultra-low-power 32-bit MCU Arm Cortex-M0+
Description: Ultra-low-power 32-bit Arm Cortex-M0+ MCU with up to 64KB Flash, 8KB SRAM, 2KB EEPROM, LCD, USB, ADC, DAC, and a maximum CPU frequency of 32 MHz.
Operating Conditions:
- Supply voltage: 1.65 V to 3.6 V
- Operating temperature: -40 to 125 °C
- Max CPU frequency: 32 MHz
Absolute Maximum Ratings:
- Max supply voltage: 4.0 V
- Max continuous current: 120 mA (IVDD total)
- Max junction/storage temperature: 125 °C (Junction), 150 °C (Storage)
Key Specs:
- Max CPU frequency: 32 MHz
- Flash memory: Up to 64 KB
- SRAM: 8 KB
- EEPROM: 2 KB
- ADC resolution: 12-bit
- ADC sampling rate: 1.14 Msps
- DAC resolution: 12-bit
- Run mode current: 88 μA/MHz
- Standby mode current: 0.27 μA
Features:
- Ultra-low-power platform
- Arm 32-bit Cortex-M0+ core with MPU
- Up to 64 KB Flash memory with ECC
- 8 KB RAM, 2 KB data EEPROM with ECC
- 12-bit ADC (1.14 Msps, up to 16 channels)
- 12-bit 1-channel DAC with output buffers
- 2x ultra-low-power comparators
- Up to 24 capacitive sensing channels
- 7-channel DMA controller
- 8x peripheral communication interfaces (USB 2.0, 2x USART, 1x UART, up to 4x SPI, 2x I2C)
- 9x timers (16-bit, ultra-low-power, SysTick, RTC, basic, 2x watchdogs)
- LCD driver for up to 8x28 segments
- CRC calculation unit, 96-bit unique ID, True RNG and firewall protection
Package:
- LQFP64 10x10 mm
- LQFP48 7x7 mm
- TFBGA64 5x5 mm
Features
- Ultra-low-power platform
- -1.65 V to 3.6 V power supply
- --40 to 125 °C temperature range
- -0.27 μA Standby mode (2 wakeup pins)
- -0.4 μA Stop mode (16 wakeup lines)
- -0.8 μA Stop mode + RTC + 8 KB RAM retention
- -88 μA/MHz in Run mode
- -3.5 μs wakeup time (from RAM)
- -5 μs wakeup time (from Flash memory)
- Core: Arm ® 32-bit Cortex ® -M0+ with MPU
- -From 32 kHz up to 32 MHz max.
- -0.95 DMIPS/MHz
- Memories
- -Up to 64 KB Flash memory with ECC
- -8KB RAM
- -2 KB of data EEPROM with ECC
- -20-byte backup register
- -Sector protection against R/W operation
- Up to 51 fast I/Os (45 I/Os 5V tolerant)
- Reset and supply management
- -Ultra-safe, low-power BOR (brownout reset) with 5 selectable thresholds
- -Ultra-low-power POR/PDR
- -Programmable voltage detector (PVD)
- Clock sources
- -1 to 25 MHz crystal oscillator
- -32 kHz oscillator for RTC with calibration
- -High speed internal 16 MHz factory-trimmed RC (+/- 1%)
- -Internal low-power 37 kHz RC
- -Internal multispeed low-power 65 kHz to 4.2 MHz RC
- All packages are ECOPACK ® 2
- -PLL for CPU clock
- Pre-programmed bootloader
- -USART, SPI supported
- Development support
- -Serial wire debug supported
- LCD driver for up to 8×28segments
- -Support contrast adjustment
- -Support blinking mode
- -Step-up converted on board
Pin Configuration
Figure 3. STM32L053x6/8 LQFP64 pinout - 10 x 10 mm
- The above figure shows the package top view.
- I/O pin supplied by VDD_USB.
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Figure 4. STM32L053x6/8 TFBGA64 ballout - 5x 5 mm
- The above figure shows the package top view.
- I/O pin supplied by VDD_USB.
Figure 5. STM32L053x6/8 LQFP48 pinout - 7 x 7 mm
- The above figure shows the package top view.
- I/O pin supplied by VDD_USB.
Table 14. Legend/abbreviations used in the pinout table
| Name | Abbreviation | Definition |
|---|---|---|
| Pin name | Unless otherwise specified in brackets below the pin name, the pin function during and after reset is the same as the actual pin name | Unless otherwise specified in brackets below the pin name, the pin function during and after reset is the same as the actual pin name |
| Pin type | S | Supply pin |
| Pin type | I | Input only pin |
| Pin type | I/O | Input / output pin |
| I/O structure | FT | 5 V tolerant I/O |
| I/O structure | FTf | 5 V tolerant I/O, FM+ capable |
| I/O structure | TC | Standard 3.3V I/O |
| I/O structure | B | Dedicated BOOT0 pin |
| I/O structure | RST | Bidirectional reset pin with embedded weak pull-up resistor |
| Notes | Unless otherwise specified by a note, all I/Os are set as floating inputs during and after reset. | Unless otherwise specified by a note, all I/Os are set as floating inputs during and after reset. |
Table 14. Legend/abbreviations used in the pinout table
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Table 14. Legend/abbreviations used in the pinout table (continued)
| Name | Name | Abbreviation | Definition |
|---|---|---|---|
| Pin functions | Alternate functions | Functions selected through GPIOx_AFR registers | Functions selected through GPIOx_AFR registers |
| Pin functions | Additional functions | Functions directly selected/enabled through | peripheral registers |
Electrical Characteristics
The definition and values of input/output AC characteristics are given in Figure 23 and Table 60 , respectively.
Unless otherwise specified, the parameters given in Table 60 are derived from tests performed under ambient temperature and V DD supply voltage conditions summarized in Table 24 .
Table 60. I/O AC characteristics (1)
| OSPEEDRx[1:0] bit value (1) | Symbol | Parameter | Conditions | Min | Max (2) | Unit |
|---|---|---|---|---|---|---|
| 00 | f max(IO)out | Maximum frequency (3) | C L = 50 pF, V DD = 2.7 V to 3.6 V | - | 400 | kHz |
| 00 | f max(IO)out | Maximum frequency (3) | C L = 50 pF, V DD = 1.65 V to 2.7 V | - | 100 | kHz |
| 00 | t f(IO)out t r(IO)out | Output rise and fall time | C L = 50 pF, V DD = 2.7 V to 3.6 V | - | 125 | ns |
| 00 | t f(IO)out t r(IO)out | Output rise and fall time | C L = 50 pF, V DD = 1.65 V to 2.7 V | - | 320 | ns |
| 01 | f max(IO)out | Maximum frequency (3) | C L = 50 pF, V DD = 2.7 V to 3.6 V | - | 2 | MHz |
| 01 | f max(IO)out | Maximum frequency (3) | C L = 50 pF, V DD = 1.65 V to 2.7 V | - | 0.6 | MHz |
| 01 | t f(IO)out t r(IO)out | Output rise and fall time | C L = 50 pF, V DD = 2.7 V to 3.6 V | - | 30 | ns |
| 01 | t f(IO)out t r(IO)out | Output rise and fall time | C L = 50 pF, V DD = 1.65 V to 2.7 V | - | 65 | ns |
| 10 | F max(IO)out | Maximum frequency (3) | C L = 50 pF, V DD = 2.7 V to 3.6 V | - | 10 | MHz |
| 10 | F max(IO)out | Maximum frequency (3) | C L = 50 pF, V DD = 1.65 V to 2.7 V | - | 2 | MHz |
| 10 | t f(IO)out t r(IO)out | Output rise and fall time | C L = 50 pF, V DD = 2.7 V to 3.6 V | - | 13 | ns |
| 10 | t f(IO)out t r(IO)out | Output rise and fall time | C L = 50 pF, V DD = 1.65 V to 2.7 V | - | 28 | ns |
| 11 | F max(IO)out | Maximum frequency (3) | C L = 30 pF, V DD = 2.7 V to 3.6 V | - | 35 | MHz |
| 11 | F max(IO)out | Maximum frequency (3) | C L = 50 pF, V DD = 1.65 V to 2.7 V | - | 10 | MHz |
| 11 | t f(IO)out t r(IO)out | Output rise and fall time | C L = 30 pF, V DD = 2.7 V to 3.6 V | - | 6 | ns |
| 11 | t f(IO)out t r(IO)out | Output rise and fall time | C L = 50 pF, V DD = 1.65 V to 2.7 V | - | 17 | ns |
| Fm+ configuration (4) | f max(IO)out | Maximum frequency (3) | C L = 50 pF, V DD = 2.5 V to 3.6 V | - | 1 | MHz |
| Fm+ configuration (4) | t f(IO)out | Output fall time | C L = 50 pF, V DD = 2.5 V to 3.6 V | - | 10 | ns |
| Fm+ configuration (4) | t r(IO)out | Output rise time | C L = 50 pF, V DD = 2.5 V to 3.6 V | - | 30 | ns |
| Fm+ configuration (4) | f max(IO)out | Maximum frequency (3) | C L = 50 pF, V DD = 2.5 V to 3.6 V | - | 350 | KHz |
| Fm+ configuration (4) | t f(IO)out | Output fall time | C L = 50 pF, V DD = 1.65 V to 3.6 V | - | 15 | ns |
| Fm+ configuration (4) | t r(IO)out | Output rise time | C L = 50 pF, V DD = 2.5 V to 3.6 V | - | 60 | ns |
| - | t EXTIpw | Pulse width of external signals detected by the EXTI controller | - | 8 | - | ns |
- The maximum frequency is defined in Figure 23 .
- When Fm+ configuration is set, the I/O speed control is bypassed. Refer to the line reference manual for a detailed description of Fm+ I/O configuration.
Figure 23. I/O AC characteristics definition
Figure 23. I/O AC characteristics definition
Absolute Maximum Ratings
Stresses above the absolute maximum ratings listed in Table 21: Voltage characteristics , Table 22: Current characteristics , and Table 23: Thermal characteristics may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these conditions is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. Device mission profile (application conditions) is compliant with JEDEC JESD47 Qualification Standard. Extended mission profiles are available on demand.
Table 21. Voltage characteristics
| Symbol | Definition | Min | Max | Unit |
|---|---|---|---|---|
| V DD -V SS | External main supply voltage (including V DDA , V DD_USB , V DD ) (1) | -0.3 | 4.0 | V |
| V IN (2) | Input voltage on FT and FTf pins | V SS - 0.3 | V DD +4.0 | V |
| V IN (2) | Input voltage on TC pins | V SS - 0.3 | 4.0 | V |
| V IN (2) | Input voltage on BOOT0 | V SS | V DD + 4.0 | V |
| V IN (2) | Input voltage on any other pin | V SS - 0.3 | 4.0 | V |
| \ | ∆ V DD \ | Variations between different V DDx power pins | - | |
| \ | V DDA -V DDx \ | Variations between any V DDx and V DDA power pins (3) | - | |
| \ | ∆ V SS \ | Variations between all different ground pins | - | |
| V REF+ -V DDA | Allowed voltage difference for V REF+ > V DDA | - | 0.4 | V |
| V ESD(HBM) | Electrostatic discharge voltage (human body model) | see Section 6.3.11 | see Section 6.3.11 |
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Table 22. Current characteristics
| Symbol | Ratings | Max. | Unit |
|---|---|---|---|
| Σ I VDD (2) | Total current into sum of all V DD power lines (source) (1) | 105 | mA |
| Σ I VSS (2) | Total current out of sum of all V SS ground lines (sink) (1) | 105 | mA |
| Σ I VDD_USB | Total current into V DD_USB power lines (source) | 25 | mA |
| I VDD(PIN) | Maximum current into each V DD power pin (source) (1) | 100 | mA |
| I VSS(PIN) | Maximum current out of each V SS ground pin (sink) (1) | 100 | mA |
| I IO | Output current sunk by any I/O and control pin except FTf pins | 16 | mA |
| I IO | Output current sunk by FTf pins | 22 | mA |
| I IO | Output current sourced by any I/O and control pin | -16 | mA |
| Σ I IO(PIN) | Total output current sunk by sum of all IOs and control pins except PA11 and PA12 (2) | 90 | mA |
| Σ I IO(PIN) | Total output current sunk by PA11 and PA12 | 25 | mA |
| Σ I IO(PIN) | Total output current sourced by sum of all IOs and control pins (2) | -90 | mA |
| I INJ(PIN) | Injected current on FT, FTf, RST and B pins | -5/+0 (3) | mA |
| I INJ(PIN) | Injected current on TC pin | ± 5 (4) | mA |
| Σ I INJ(PIN) | Total injected current (sum of all I/O and control pins) (5) | ± 25 | mA |
- This current consumption must be correctly distributed over all I/Os and control pins. The total output current must not be sunk/sourced between two consecutive power supply pins referring to high pin count LQFP packages.
- Positive current injection is not possible on these I/Os. A negative injection is induced by V IN <V SS . I INJ(PIN) must never be exceeded. Refer to Table 21 for maximum allowed input voltage values.
- A positive injection is induced by V IN > V DD while a negative injection is induced by V IN < V SS . I INJ(PIN) must never be exceeded. Refer to Table 21: Voltage characteristics for the maximum allowed input voltage values.
- When several inputs are submitted to a current injection, the maximum Σ I INJ(PIN) is the absolute sum of the positive and negative injected currents (instantaneous values).
Table 23. Thermal characteristics
| Symbol | Ratings | Value | Unit |
|---|---|---|---|
| T STG | Storage temperature range | -65 to +150 | °C |
| T J | Maximum junction temperature | 150 | °C |
Table 23. Thermal characteristics
Thermal Information
The maximum chip-junction temperature, T J max, in degrees Celsius, may be calculated using the following equation:
T J max = T A max + (P D max × Θ JA )
Package Information
In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK ® packages, depending on their level of environmental compliance. ECOPACK ® specifications, grade definitions and product status are available at www.st.com. ECOPACK ® is an ST trademark.
Related Variants
The following components are covered by the same datasheet.
| Part Number | Manufacturer | Package |
|---|---|---|
| STM32L053C6 | STMicroelectronics | — |
| STM32L053C8 | STMicroelectronics | — |
| STM32L053R6 | STMicroelectronics | — |
| STM32L053R8 | STMicroelectronics | — |
| STM32L053X | STMicroelectronics | — |
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