STM32L052K8T7
The STM32L052K8T7 is an electronic component from STMicroelectronics. View the full STM32L052K8T7 datasheet below including key specifications, pinout, electrical characteristics, absolute maximum ratings.
Manufacturer
STMicroelectronics
Category
Microcontrollers
Package
32-LQFP
Lifecycle
Production (Last Updated: 6 months ago)
Key Specifications
| Parameter | Value |
|---|---|
| ADC Channels (Resolution) | 10-Ch 12-Bit |
| Case/Package | LQFP |
| China RoHS | Compliant |
| Connectivity | I2C, IrDA, SPI, UART/USART, USB |
| Core Architecture | ARM Cortex-M0+ |
| Core Processor | ARM® Cortex®-M0+ |
| Core Size | 32-Bit |
| DAC Channels (Resolution) | 1-Ch 12-Bit |
| Data Bus Width | 32 b |
| Data Converters | A/D 10x12b; D/A 1x12b |
| DigiKey Programmable | Not Verified |
| EEPROM Memory Size | 2 kB |
| EEPROM Size | 2K x 8 |
| Flash Memory Size | 64 kB |
| Frequency | 32 MHz |
| Height - Seated (Max) | 1.6 mm |
| Interface | I2C, USB |
| Length | 7 mm |
| Lifecycle Status | Production (Last Updated: 6 months ago) |
| Max Frequency | 32 MHz |
| Max Operating Temperature | 105 °C |
| Max Power Dissipation | 526 mW |
| Max Supply Voltage | 3.6 V |
| Memory Size | 64 kB |
| Memory Type | FLASH |
| Min Operating Temperature | -40 °C |
| Min Supply Voltage | 1.65 V |
| Mounting Type | Surface Mount |
| Nominal Supply Current | 290 nA |
| Nominal Supply Voltage (DC) | 3.3 V |
| Number of Channels | 10 |
| Number of D/A Converters | 1 |
| Number of I/O | 27 |
| Number of I/Os | 25 |
| Number of I2C Channels | 1 |
| Number of Pins | 32 |
| Number of Programmable I/O | 25 |
| Number of SPI Channels | 1 |
| Number of Terminals | 32 |
| Number of Timers/Counters | 6 |
| Number of USART Channels | 2 |
| Operating Temperature | -40°C ~ 105°C (TA) |
| Oscillator Type | Internal |
| Oscillator Type | Internal |
| Package / Case | 32-LQFP |
| Packaging | Tray |
| Peripherals | Brown-out Detect/Reset, DMA, POR, PWM, WDT |
| Peripherals | POR |
| Flash Memory Size | 64KB (64K x 8) |
| Program Memory Type | FLASH |
| RAM Size | 8 kB |
| RAM Size | 8K x 8 B |
| REACH SVHC | Yes |
| RoHS | Compliant |
| Clock Speed | 32MHz |
| Standard Pack Qty | 1500 |
| Supplier Device Package | 32-LQFP (7x7) |
| Temperature Grade | Industrial |
| Terminal Pitch | 800 µm |
| Supply Voltage | 1.65V ~ 3.6V |
| Watchdog Timer | Yes |
| Width | 7 mm |
Overview
The ultra-low-power STM32L052x6/8 microcontrollers incorporate the connectivity power of the universal serial bus (USB 2.0 crystal-less) with the high-performance Arm Cortex-M0+ 32-bit RISC core operating at a 32 MHz frequency, a memory protection unit (MPU), highspeed embedded memories (64 Kbytes of Flash program memory, 2 Kbytes of data EEPROM and 8 Kbytes of RAM) plus an extensive range of enhanced I/Os and peripherals.
The STM32L052x6/8 devices provide high power efficiency for a wide range of performance. It is achieved with a large choice of internal and external clock sources, an internal voltage adaptation and several low-power modes.
The STM32L052x6/8 devices offer several analog features, one 12-bit ADC with hardware oversampling, one DAC, two ultra-low-power comparators, several timers, one low-power timer (LPTIM), three general-purpose 16-bit timers and one basic timer, one RTC and one SysTick which can be used as timebases. They also feature two watchdogs, one watchdog with independent clock and window capability and one window watchdog based on bus clock.
Moreover, the STM32L052x6/8 devices embed standard and advanced communication interfaces: up to two I2C, two SPIs, one I2S, two USARTs, a low-power UART (LPUART), and a crystal-less USB. The devices offer up to 24 capacitive sensing channels to simply add touch sensing functionality to any application.
The STM32L052x6/8 also include a real-time clock and a set of backup registers that remain powered in Standby mode.
The ultra-low-power STM32L052x6/8 devices operate from a 1.8 to 3.6 V power supply (down to 1.65 V at power down) with BOR and from a 1.65 to 3.6 V power supply without BOR option. They are available in the -40 to +125 °C temperature range. A comprehensive set of power-saving modes allows the design of low-power applications.
37
Pin Configuration
| Pin | Name | Type | Description |
|---|---|---|---|
| 1 | VDD | P | |
| 2 | PC14-OSC32_IN | I/O | alt: RCC_OSC32_IN |
| 3 | PC15-OSC32_OUT | I/O | alt: RCC_OSC32_OUT |
| 4 | NRST | RST | |
| 5 | VDDA | P | |
| 6 | PA0 | I/O | alt: ADC_IN0, COMP1_INM, COMP1_OUT, RTC_TAMP2, SYS_WKUP1, TIM2_CH1, TIM2_ETR, TSC_G1_IO1, USART2_CTS |
| 7 | PA1 | I/O | alt: ADC_IN1, COMP1_INP, TIM21_ETR, TIM2_CH2, TSC_G1_IO2, USART2_DE, USART2_RTS |
| 8 | PA2 | I/O | alt: ADC_IN2, COMP2_INM, COMP2_OUT, TIM21_CH1, TIM2_CH3, TSC_G1_IO3, USART2_TX |
| 9 | PA3 | I/O | alt: ADC_IN3, COMP2_INP, TIM21_CH2, TIM2_CH4, TSC_G1_IO4, USART2_RX |
| 10 | PA4 | I/O | alt: ADC_IN4, COMP1_INM, COMP2_INM, DAC_OUT1, SPI1_NSS, TIM22_ETR, TSC_G2_IO1, USART2_CK |
| 11 | PA5 | I/O | alt: ADC_IN5, COMP1_INM, COMP2_INM, SPI1_SCK, TIM2_CH1, TIM2_ETR, TSC_G2_IO2 |
| 12 | PA6 | I/O | alt: ADC_IN6, COMP1_OUT, SPI1_MISO, TIM22_CH1, TSC_G2_IO3 |
| 13 | PA7 | I/O | alt: ADC_IN7, COMP2_OUT, SPI1_MOSI, TIM22_CH2, TSC_G2_IO4 |
| 14 | PB0 | I/O | alt: ADC_IN8, SYS_VREF_OUT_PB0, TSC_G3_IO2 |
| 15 | PB1 | I/O | alt: ADC_IN9, SYS_VREF_OUT_PB1, TSC_G3_IO3 |
| 16 | VSS | P | |
| 17 | VDD | P | |
| 18 | PA8 | I/O | alt: CRS_SYNC, RCC_MCO, USART1_CK |
| 19 | PA9 | I/O | alt: DAC_EXTI9, RCC_MCO, TSC_G4_IO1, USART1_TX |
| 20 | PA10 | I/O | alt: TSC_G4_IO2, USART1_RX |
| 21 | PA11 | I/O | alt: ADC_EXTI11, COMP1_OUT, SPI1_MISO, TSC_G4_IO3, USART1_CTS, USB_DM |
| 22 | PA12 | I/O | alt: COMP2_OUT, SPI1_MOSI, TSC_G4_IO4, USART1_DE, USART1_RTS, USB_DP |
| 23 | PA13 | I/O | alt: SYS_SWDIO, USB_NOE |
| 24 | PA14 | I/O | alt: SYS_SWCLK, USART2_TX |
| 25 | PA15 | I/O | alt: SPI1_NSS, TIM2_CH1, TIM2_ETR, USART2_RX |
| 26 | PB3 | I/O | alt: COMP2_INM, SPI1_SCK, TIM2_CH2, TSC_G5_IO1 |
| 27 | PB4 | I/O | alt: COMP2_INP, SPI1_MISO, TIM22_CH1, TSC_G5_IO2 |
| 28 | PB5 | I/O | alt: COMP2_INP, I2C1_SMBA, LPTIM1_IN1, SPI1_MOSI, TIM22_CH2 |
| 29 | PB6 | I/O | alt: COMP2_INP, I2C1_SCL, LPTIM1_ETR, TSC_G5_IO3, USART1_TX |
| 30 | PB7 | I/O | alt: COMP2_INP, I2C1_SDA, LPTIM1_IN2, SYS_PVD_IN, TSC_G5_IO4, USART1_RX |
| 31 | BOOT0 | I | |
| 32 | VSS | P |
Electrical Characteristics
The definition and values of input/output AC characteristics are given in Figure 26 and Table 61 , respectively.
Unless otherwise specified, the parameters given in Table 61 are derived from tests performed under ambient temperature and V DD supply voltage conditions summarized in Table 25 .
Table 61. I/O AC characteristics (1)
| OSPEEDRx[1:0] bit value (1) | Symbol | Parameter | Conditions | Min | Max (2) | Unit |
|---|---|---|---|---|---|---|
| 00 | f max(IO)out | Maximum frequency (3) | C L = 50 pF, V DD = 2.7 V to 3.6 V | - | 400 | kHz |
| 00 | f max(IO)out | Maximum frequency (3) | C L = 50 pF, V DD = 1.65 V to 2.7 V | - | 100 | kHz |
| 00 | t f(IO)out t r(IO)out | Output rise and fall time | C L = 50 pF, V DD = 2.7 V to 3.6 V | - | 125 | ns |
| 00 | t f(IO)out t r(IO)out | Output rise and fall time | C L = 50 pF, V DD = 1.65 V to 2.7 V | - | 320 | ns |
| 01 | f max(IO)out | Maximum frequency (3) | C L = 50 pF, V DD = 2.7 V to 3.6 V | - | 2 | MHz |
| 01 | f max(IO)out | Maximum frequency (3) | C L = 50 pF, V DD = 1.65 V to 2.7 V | - | 0.6 | MHz |
| 01 | t f(IO)out t r(IO)out | Output rise and fall time | C L = 50 pF, V DD = 2.7 V to 3.6 V | - | 30 | ns |
| 01 | t f(IO)out t r(IO)out | Output rise and fall time | C L = 50 pF, V DD = 1.65 V to 2.7 V | - | 65 | ns |
| 10 | F max(IO)out | Maximum frequency (3) | C L = 50 pF, V DD = 2.7 V to 3.6 V | - | 10 | MHz |
| 10 | F max(IO)out | Maximum frequency (3) | C L = 50 pF, V DD = 1.65 V to 2.7 V | - | 2 | MHz |
| 10 | t f(IO)out t r(IO)out | Output rise and fall time | C L = 50 pF, V DD = 2.7 V to 3.6 V | - | 13 | ns |
| 10 | t f(IO)out t r(IO)out | Output rise and fall time | C L = 50 pF, V DD = 1.65 V to 2.7 V | - | 28 | ns |
| 11 | F max(IO)out | Maximum frequency (3) | C L = 30 pF, V DD = 2.7 V to 3.6 V | - | 35 | MHz |
| 11 | F max(IO)out | Maximum frequency (3) | C L = 50 pF, V DD = 1.65 V to 2.7 V | - | 10 | MHz |
| 11 | t f(IO)out t r(IO)out | Output rise and fall time | C L = 30 pF, V DD = 2.7 V to 3.6 V | - | 6 | ns |
| 11 | t f(IO)out t r(IO)out | Output rise and fall time | C L = 50 pF, V DD = 1.65 V to 2.7 V | - | 17 | ns |
| Fm+ configuration (4) | f max(IO)out | Maximum frequency (3) | C L = 50 pF, V DD = 2.5 V to 3.6 V | - | 1 | MHz |
| Fm+ configuration (4) | t f(IO)out | Output fall time | C L = 50 pF, V DD = 2.5 V to 3.6 V | - | 10 | ns |
| Fm+ configuration (4) | t r(IO)out | Output rise time | C L = 50 pF, V DD = 2.5 V to 3.6 V | - | 30 | ns |
| Fm+ configuration (4) | f max(IO)out | Maximum frequency (3) | C L = 50 pF, V DD = 2.5 V to 3.6 V | - | 350 | KHz |
| Fm+ configuration (4) | t f(IO)out | Output fall time | C L = 50 pF, V DD = 1.65 V to 3.6 V | - | 15 | ns |
| Fm+ configuration (4) | t r(IO)out | Output rise time | C L = 50 pF, V DD = 2.5 V to 3.6 V | - | 60 | ns |
| - | t EXTIpw | Pulse width of external signals detected by the EXTI controller | - | 8 | - | ns |
- The maximum frequency is defined in Figure 26 .
- When Fm+ configuration is set, the I/O speed control is bypassed. Refer to the line reference manual for a detailed description of Fm+ I/O configuration.
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Figure 26. I/O AC characteristics definition
Absolute Maximum Ratings
Stresses above the absolute maximum ratings listed in Table 22: Voltage characteristics , Table 23: Current characteristics , and Table 24: Thermal characteristics may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these conditions is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. Device mission profile (application conditions) is compliant with JEDEC JESD47 Qualification Standard. Extended mission profiles are available on demand.
Table 22. Voltage characteristics
| Symbol | Definition | Min | Max | Unit |
|---|---|---|---|---|
| V DD -V SS | External main supply voltage (including V DDA , V DD_USB , V DD ) (1) | -0.3 | 4.0 | V |
| V IN (2) | Input voltage on FT and FTf pins | V SS - 0.3 | V DD +4.0 | V |
| V IN (2) | Input voltage on TC pins | V SS - 0.3 | 4.0 | V |
| V IN (2) | Input voltage on BOOT0 | V SS | V DD + 4.0 | V |
| V IN (2) | Input voltage on any other pin | V SS - 0.3 | 4.0 | V |
| \ | ∆ V DD \ | Variations between different V DDx power pins | - | |
| \ | V DDA -V DDx \ | Variations between any V DDx and V DDA power pins (3) | - | |
| \ | ∆ V SS \ | Variations between all different ground pins | - | |
| V REF+ -V DDA | Allowed voltage difference for V REF+ > V DDA | - | 0.4 | V |
| V ESD(HBM) | Electrostatic discharge voltage (human body model) | see Section 6.3.11 | see Section 6.3.11 |
Table 23. Current characteristics
Table 23. Current characteristics
| Symbol | Ratings | Max. | Unit |
|---|---|---|---|
| Σ I VDD (2) | Total current into sum of all V DD power lines (source) (1) | 105 | mA |
| Σ I VSS (2) | Total current out of sum of all V SS ground lines (sink) (1) | 105 | mA |
| Σ I VDD_USB | Total current into V DD_USB power lines (source) | 25 | mA |
| I VDD(PIN) | Maximum current into each V DD power pin (source) (1) | 100 | mA |
| I VSS(PIN) | Maximum current out of each V SS ground pin (sink) (1) | 100 | mA |
| I IO | Output current sunk by any I/O and control pin except FTf pins | 16 | mA |
| I IO | Output current sunk by FTf pins | 22 | mA |
| I IO | Output current sourced by any I/O and control pin | -16 | mA |
| Σ I IO(PIN) | Total output current sunk by sum of all IOs and control pins except PA11 and PA12 (2) | 90 | mA |
| Σ I IO(PIN) | Total output current sunk by PA11 and PA12 | 25 | mA |
| Σ I IO(PIN) | Total output current sourced by sum of all IOs and control pins (2) | -90 | mA |
| I INJ(PIN) | Injected current on FT, FTf, RST and B pins | -5/+0 (3) | mA |
| I INJ(PIN) | Injected current on TC pin | ± 5 (4) | mA |
| Σ I INJ(PIN) | Total injected current (sum of all I/O and control pins) (5) | ± 25 | mA |
- This current consumption must be correctly distributed over all I/Os and control pins. The total output current must not be sunk/sourced between two consecutive power supply pins referring to high pin count LQFP packages.
- Positive current injection is not possible on these I/Os. A negative injection is induced by V IN <V SS . I INJ(PIN) must never be exceeded. Refer to Table 22 for maximum allowed input voltage values.
- A positive injection is induced by V IN > V DD while a negative injection is induced by V IN < V SS . I INJ(PIN) must never be exceeded. Refer to Table 22: Voltage characteristics for the maximum allowed input voltage values.
- When several inputs are submitted to a current injection, the maximum Σ I INJ(PIN) is the absolute sum of the positive and negative injected currents (instantaneous values).
Table 24. Thermal characteristics
| Symbol | Ratings | Value | Unit |
|---|---|---|---|
| T STG | Storage temperature range | -65 to +150 | °C |
| T J | Maximum junction temperature | 150 | °C |
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Thermal Information
The maximum chip-junction temperature, T J max, in degrees Celsius, may be calculated using the following equation:
T J max = T A max + (P D max × Θ JA )
Package Information
In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at www.st.com. ECOPACK is an ST trademark.
Related Variants
The following components are covered by the same datasheet.
| Part Number | Manufacturer | Package |
|---|---|---|
| STM32L052K8 | STMicroelectronics | — |
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