STM32L052K8T7
32-bit MicrocontrollerThe STM32L052K8T7 is a 32-bit microcontroller from STMicroelectronics. View the full STM32L052K8T7 datasheet below including key specifications, electrical characteristics, absolute maximum ratings.
Official STM32L052K8T7 datasheet (PDF) — the source this page was extracted from.
Manufacturer
STMicroelectronicsCategory
Microcontrollers (MCU)Package
32-LQFP
Lifecycle
Production (Last Updated: 6 months ago)
STM32L052K8T7 Key Specifications
| Parameter | Value |
|---|---|
| ADC Channels (Resolution) | 10-Ch 12-Bit |
| Case/Package | LQFP |
| China RoHS | Compliant |
| Connectivity | I2C, IrDA, SPI, UART/USART, USB |
| Core Architecture | ARM Cortex-M0+ |
| Core Processor | ARM® Cortex®-M0+ |
| Core Size | 32-Bit |
| DAC Channels (Resolution) | 1-Ch 12-Bit |
| Data Bus Width | 32 b |
| Data Converters | A/D 10x12b; D/A 1x12b |
| DigiKey Programmable | Not Verified |
| EEPROM Memory Size | 2 kB |
| EEPROM Size | 2K x 8 |
| Flash Memory Size | 64 kB |
| Frequency | 32 MHz |
| Height - Seated (Max) | 1.6 mm |
| Interface | I2C, USB |
| Length | 7 mm |
| Lifecycle Status | Production (Last Updated: 6 months ago) |
| Max Frequency | 32 MHz |
| Max Operating Temperature | 105 °C |
| Max Power Dissipation | 526 mW |
| Max Supply Voltage | 3.6 V |
| Memory Size | 64 kB |
| Memory Type | FLASH |
| Min Operating Temperature | -40 °C |
| Min Supply Voltage | 1.65 V |
| Mounting Type | Surface Mount |
| Nominal Supply Current | 290 nA |
| Nominal Supply Voltage (DC) | 3.3 V |
| Number of Channels | 10 |
| Number of D/A Converters | 1 |
| Number of I/O | 27 |
| Number of I/Os | 25 |
| Number of I2C Channels | 1 |
| Number of Pins | 32 |
| Number of Programmable I/O | 25 |
| Number of SPI Channels | 1 |
| Number of Terminals | 32 |
| Number of Timers/Counters | 6 |
| Number of USART Channels | 2 |
| Operating Temperature | -40°C ~ 105°C (TA) |
| Oscillator Type | Internal |
| Oscillator Type | Internal |
| Package / Case | 32-LQFP |
| Packaging | Tray |
| Peripherals | Brown-out Detect/Reset, DMA, POR, PWM, WDT |
| Peripherals | POR |
| Flash Memory Size | 64KB (64K x 8) |
| Program Memory Type | FLASH |
| RAM Size | 8 kB |
| RAM Size | 8K x 8 B |
| REACH SVHC | Yes |
| RoHS | Compliant |
| Clock Speed | 32MHz |
| Standard Pack Qty | 1500 |
| Supplier Device Package | 32-LQFP (7x7) |
| Temperature Grade | Industrial |
| Terminal Pitch | 800 µm |
| Supply Voltage | 1.65V ~ 3.6V |
| Watchdog Timer | Yes |
| Width | 7 mm |
STM32L052K8T7 Overview
Part: STM32L052K8T7 — STMicroelectronics (STM32L052x6/x8 family)
Type: Ultra-low-power ARM Cortex-M0+ MCU
Description: 32-bit Arm Cortex-M0+ MCU at up to 32 MHz with up to 64 KB Flash, 8 KB SRAM and 2 KB data EEPROM, 1.65–3.6 V supply, USB 2.0, 12-bit ADC and DAC.
Operating Conditions:
- Supply voltage (VDD): 1.65–3.6 V (BOR disabled); 1.8–3.6 V at power-on with BOR enabled
- Operating temperature: -40 to 105 °C for the T7 suffix (range 7); range 6 is -40 to 85 °C and range 3 is -40 to 125 °C
- Max CPU/bus clock: 32 MHz
- Junction temperature range (range 7): -40 to 125 °C
- VIN on FT/FTf/RST pins: up to 5.5 V (VDD ≥ 2.0 V), 5.2 V (VDD 1.65–2.0 V)
Absolute Maximum Ratings:
- Max supply voltage (VDD − VSS): 4.0 V
- Input voltage on FT/FTf pins: VSS − 0.3 to VDD + 4.0 V
- Total current into all VDD lines: 105 mA
- Max current per VDD or VSS pin: 100 mA
- Max output current sunk by any I/O (except FTf): 16 mA; FTf pins: 22 mA
- Max output current sourced by any I/O: -16 mA
- Max junction temperature: 150 °C
- Storage temperature: -65 to +150 °C
Key Specs:
- Supply range: 1.65–3.6 V
- Max HCLK/PCLK frequency: 32 MHz
- Run mode consumption: 88 μA/MHz
- Stop mode: 0.4 μA; Standby mode: 0.27 μA (2 wakeup pins)
- Stop mode with RTC and 8 KB RAM retention: 0.8 μA
- Wakeup time: 3.5 μs (from RAM), 5 μs (from Flash)
- 12-bit ADC: 1.14 Msps, up to 16 channels (down to 1.65 V)
- VDD_USB: 3.0–3.6 V when USB is used
- Power dissipation at TA = 105 °C (range 7): 351 mW (LQFP32), 526 mW (UFQFPN32)
Features:
- Arm Cortex-M0+ core with MPU, 0.95 DMIPS/MHz
- Up to 64 KB Flash with ECC, 8 KB RAM, 2 KB data EEPROM with ECC, 20-byte backup registers
- Up to 51 fast I/Os (45 are 5 V tolerant)
- BOR with 5 selectable thresholds, POR/PDR, PVD
- 12-bit ADC, 1-channel 12-bit DAC, 2 ultra-low-power comparators
- Up to 24 capacitive sensing channels
- 7-channel DMA controller
- USB 2.0 crystal-less with battery charging detection and LPM
- 2x USART, 1x low-power UART, up to 4x SPI (16 Mbit/s), 2x I2C (SMBus/PMBus)
- 9 timers and 2 watchdogs
- CRC unit, 96-bit unique ID, true RNG, firewall
- Serial wire debug, pre-programmed bootloader (USART, SPI)
- Clock sources: 1–25 MHz crystal oscillator, 32 kHz RTC oscillator, 16 MHz HSI, 37 kHz LSI, multispeed MSI, 48 MHz RC for USB, PLL
- ECOPACK2 packages
Applications:
- Ultra-low-power battery-powered embedded systems
- Touch-sensing user interfaces
- USB-connected devices
Package:
- LQFP32 (7x7 mm), the package of the K-series 32-pin variant
- Family also offered in UFQFPN32 (5x5 mm), LQFP48 (7x7 mm), UFQFPN48 (7x7 mm), LQFP64 (10x10 mm), TFBGA64 (5x5 mm) and standard/thin WLCSP36 (2.61x2.88 mm)
STM32L052K8T7 Pin Configuration
Figure 3. STM32L052x6/8 LQFP64 pinout
- The above figure shows the package top view.
- The I/O pins supplied by VDD_USB are shown in grey.
Figure 4. STM32L052x6/8 TFBGA64 ballout
- The above figure shows the package top view.
- the I/O pins supplied by VDD_USB are shown in grey.
52
Figure 5. STM32L052x6/8 LQFP48 pinout
- The above figure shows the package top view.
- The I/O pins supplied by VDD_USB are shown in grey.
- The above figure shows the package top view.
- The I/O pins supplied by VDD_USB are shown in grey.
Figure 6. STM32L052x6/8 UFQFPN48
Figure 7. STM32L052x6/8 WLCSP36 ballout
- The above figure shows the package top view.
- The above figure shows the package top view.
Figure 8. STM32L052x6/8 LQFP32 pinout
52
Figure 9. STM32L052x6/8 UFQFPN32 pinout
- The above figure shows the package top view.
Table 15. Legend/abbreviations used in the pinout table
| Name | Definition the pin name, the pin the actual pin name | Abbreviation Pin name Unless otherwise specified in brackets below function during and after reset is the same as |
|---|---|---|
| Supply pin | Supply pin | Pin type |
| I | Input only pin | I/O |
| Input / output pin | FT | |
| 5 V tolerant I/O | 5 V tolerant I/O | FTf 5 V tolerant I/O, FM+ capable |
| TC | Standard 3.3V I/O | I/O structure B |
| Dedicated BOOT0 pin | Dedicated BOOT0 pin | RST Bidirectional reset pin with embedded weak pull-up resistor |
| Pin functions | GPIOx_AFR registers | |
| Additional functions | Additional functions |
Table 15. Legend/abbreviations used in the pinout table
Table 16. STM32L052x6/8 pin definitions
| Pin Number - LQFP32 | Pin Number - UFQFN32 | Pin Number - WLCSP36 (1) | Pin Number - LQFP48 | Pin Number - UFQFPN48 | Pin Number - LQFP64 | Pin Number - TFBGA64 | Pin name (function after reset) | Pin type | I/O structure | Notes | Alternate functions | Additional functions |
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| - | - | - | 1 | 1 | 1 | B2 | VDD | S | - | - | - | - |
| - | - | - | 2 | 2 | 2 | A2 | PC13 | I/O | FT | - | - | RTC_TAMP1/ RTC_TS/RTC _OUT/WKUP2 |
| 2 | 2 | A6 | 3 | 3 | 3 | A1 | PC14- OSC32_IN (PC14) | I/O | FT | - | - | OSC32_IN |
| 3 | 3 | B6 | 4 | 4 | 4 | B1 | PC15- OSC32_OUT (PC15) | I/O | TC | - | - | OSC32_OUT |
| - | - | - | 5 | 5 | 5 | C1 | PH0-OSC_IN (PH0) | I/O | TC | - | USB_CRS_SYNC | OSC_IN |
| - | - | - | 6 | 6 | 6 | D1 | PH1-OSC_OUT (PH1) | I/O | TC | - | - | OSC_OUT |
| 4 | 4 | C6 | 7 | 7 | 7 | E1 | NRST | I/O | RST | - | - | - |
| - | - | - | - | - | 8 | E3 | PC0 | I/O | FT | - | LPTIM1_IN1, EVENTOUT, TSC_G7_IO1 | ADC_IN10 |
| - | - | - | - | - | 9 | E2 | PC1 | I/O | FT | - | LPTIM1_OUT, EVENTOUT, TSC_G7_IO2 | ADC_IN11 |
| - | - | - | - | - | 10 | F2 | PC2 | I/O | FT | - | LPTIM1_IN2, SPI2_MISO/I2S2_MC K, TSC_G7_IO3 | ADC_IN12 |
| - | - | - | - | - | 11 | - | PC3 | I/O | FT | - | LPTIM1_ETR, SPI2_MOSI/I2S2_SD, TSC_G7_IO4 | ADC_IN13 |
| - | - | - | 8 | 8 | 12 | F1 | VSSA | S | - | - | - | - |
| - | - | E6 | - | - | - | G1 | VREF+ | S | - | - | - | - |
| 5 | 5 | D5 | 9 | 9 | 13 | H1 | VDDA | S | - | - | - | - |
Table 16. STM32L052x6/8 pin definitions
52
Table 16. STM32L052x6/8 pin definitions (continued)
| Pin Number - LQFP32 | Pin Number - UFQFN32 | Pin Number - WLCSP36 (1) | Pin Number - LQFP48 | Pin Number - UFQFPN48 | Pin Number - LQFP64 | Pin Number - TFBGA64 | Pin name (function after reset) | Pin type | I/O structure | Notes | Alternate functions | Additional functions |
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 6 | 6 | D4 | 10 | 10 | 14 | G2 | PA0 | I/O | TC | - | TIM2_CH1, TSC_G1_IO1, USART2_CTS, TIM2_ETR, COMP1_OUT | COMP1_INM6 , ADC_IN0, RTC_TAMP2/ WKUP1 |
| 7 | 7 | F6 | 11 | 11 | 15 | H2 | PA1 | I/O | FT | - | EVENTOUT, TIM2_CH2, TSC_G1_IO2, USART2_RTS/ USART2_DE, TIM21_ETR | COMP1_INP, ADC_IN1 |
| 8 | 8 | E5 | 12 | 12 | 16 | F3 | PA2 | I/O | FT | - | TIM21_CH1, TIM2_CH3, TSC_G1_IO3, USART2_TX, COMP2_OUT | COMP2_INM6 , ADC_IN2 |
| 9 | 9 | F5 | 13 | 13 | 17 | G3 | PA3 | I/O | FT | - | TIM21_CH2, TIM2_CH4, TSC_G1_IO4, USART2_RX | COMP2_INP, ADC_IN3 |
| - | - | - | - | - | 18 | C2 | VSS | S | - | - | - | - |
| - | - | - | - | - | 19 | D2 | VDD | S | - | - | - | - |
| 10 | 10 | E4 | 14 | 14 | 20 | H3 | PA4 | I/O | TC | (2) | SPI1_NSS, TSC_G2_IO1, USART2_CK, TIM22_ETR | COMP1_INM4 , COMP2_INM4 , ADC_IN4, DAC_OUT |
| 11 | 11 | F4 | 15 | 15 | 21 | F4 | PA5 | I/O | TC | - | SPI1_SCK, TIM2_ETR, TSC_G2_IO2, TIM2_CH1 | COMP1_INM5 , COMP2_INM5 , ADC_IN5 |
| 12 | 12 | E3 | 16 | 16 | 22 | G4 | PA6 | I/O | FT | - | SPI1_MISO, TSC_G2_IO3, LPUART1_CTS, TIM22_CH1, EVENTOUT, COMP1_OUT | ADC_IN6 |
Table 16. STM32L052x6/8 pin definitions (continued)
Table 16. STM32L052x6/8 pin definitions (continued)
| Pin Number - LQFP32 | Pin Number - UFQFN32 | Pin Number - WLCSP36 (1) | Pin Number - LQFP48 | Pin Number - UFQFPN48 | Pin Number - LQFP64 | Pin Number - TFBGA64 | Pin name (function after reset) | Pin type | I/O structure | Notes | Alternate functions | Additional functions |
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 13 | 13 | F3 | 17 | 17 | 23 | H4 | PA7 | I/O | FT | - | SPI1_MOSI, TSC_G2_IO4, TIM22_CH2, EVENTOUT, COMP2_OUT | ADC_IN7 |
| - | - | - | - | - | 24 | H5 | PC4 | I/O | FT | - | EVENTOUT, LPUART1_TX | ADC_IN14 |
| - | - | - | - | - | 25 | H6 | PC5 | I/O | FT | - | LPUART1_RX, TSC_G3_IO1 | ADC_IN15 |
| 14 | 14 | D3 | 18 | 18 | 26 | F5 | PB0 | I/O | FT | - | EVENTOUT, TSC_G3_IO2 | ADC_IN8, VREF_OUT |
| 15 | 15 | C3 | 19 | 19 | 27 | G5 | PB1 | I/O | FT | - | TSC_G3_IO3, LPUART1_RTS/ LPUART1_DE | ADC_IN9, VREF_OUT |
| - | 16 | F2 | 20 | 20 | 28 | G6 | PB2 | I/O | FT | - | LPTIM1_OUT, TSC_G3_IO4 | - |
| - | - | E2 | 21 | 21 | 29 | G7 | PB10 | I/O | FT | - | TIM2_CH3, TSC_SYNC, LPUART1_TX, SPI2_SCK, I2C2_SCL | - |
| - | - | D2 | 22 | 22 | 30 | H7 | PB11 | I/O | FT | - | EVENTOUT, TIM2_CH4, TSC_G6_IO1, LPUART1_RX, I2C2_SDA | - |
| 16 | - | - | 23 | 23 | 31 | D6 | VSS | S | - | - | - | - |
| 17 | 17 | F1 | 24 | 24 | 32 | E5 | VDD | S | - | - | - | - |
| - | - | - | 25 | 25 | 33 | H8 | PB12 | I/O | FT | - | SPI2_NSS/I2S2_WS, LPUART1_RTS/ LPUART1_DE, TSC_G6_IO2, I2C2_SMBA, EVENTOUT | - |
Table 16. STM32L052x6/8 pin definitions (continued)
52
Table 16. STM32L052x6/8 pin definitions (continued)
| Pin Number - LQFP32 | Pin Number - UFQFN32 | Pin Number - WLCSP36 (1) | Pin Number - LQFP48 | Pin Number - UFQFPN48 | Pin Number - LQFP64 | Pin Number - TFBGA64 | Pin name (function after reset) | Pin type | I/O structure | Notes | Alternate functions | Additional functions |
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| - | - | - | 26 | 26 | 34 | G8 | PB13 | I/O | FTf | - | SPI2_SCK/I2S2_CK, TSC_G6_IO3, LPUART1_CTS, I2C2_SCL, TIM21_CH1 | - |
| - | - | - | 27 | 27 | 35 | F8 | PB14 | I/O | FTf | - | SPI2_MISO/I 2S2_MCK, RTC_OUT, TSC_G6_IO4, LPUART1_RTS/ LPUART1_DE, I2C2_SDA, TIM21_CH2 | - |
| - | - | - | 28 | 28 | 36 | F7 | PB15 | I/O | FT | - | SPI2_MOSI/I2S2_SD, RTC_REFIN | - |
| - | - | - | - | - | 37 | F6 | PC6 | I/O | FT | - | TIM22_CH1, TSC_G8_IO1 | - |
| - | - | - | - | - | 38 | E7 | PC7 | I/O | FT | - | TIM22_CH2, TSC_G8_IO2 | - |
| - | - | - | - | - | 39 | E8 | PC8 | I/O | FT | - | TIM22_ETR, TSC_G8_IO3 | - |
| - | - | - | - | - | 40 | D8 | PC9 | I/O | FT | - | TIM21_ETR, USB_NOE, TSC_G8_IO4 | - |
| 18 | 18 | E1 | 29 | 29 | 41 | D7 | PA8 | I/O | FT | - | MCO, USB_CRS_SYNC, EVENTOUT, USART1_CK | - |
| 19 | 19 | D1 | 30 | 30 | 42 | C7 | PA9 | I/O | FT | - | MCO, TSC_G4_IO1, USART1_TX | - |
| 20 | 20 | C1 | 31 | 31 | 43 | C6 | PA10 | I/O | FT | - | TSC_G4_IO2, USART1_RX | - |
| 21 | 21 | C2 | 32 | 32 | 44 | C8 | PA11 (3) | I/O | FT | - | SPI1_MISO, EVENTOUT, TSC_G4_IO3, USART1_CTS, COMP1_OUT | USB_DM |
Table 16. STM32L052x6/8 pin definitions (continued)
Table 16. STM32L052x6/8 pin definitions (continued)
| Pin Number - LQFP32 | Pin Number - UFQFN32 | Pin Number - WLCSP36 (1) | Pin Number - LQFP48 | Pin Number - UFQFPN48 | Pin Number - LQFP64 | Pin Number - TFBGA64 | Pin name (function after reset) | Pin type | I/O structure | Notes | Alternate functions | Additional functions |
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 22 | 22 | B1 | 33 | 33 | 45 | B8 | PA12 (3) | I/O | FT | - | SPI1_MOSI, EVENTOUT, TSC_G4_IO4, USART1_RTS/ USART1_DE, COMP2_OUT | USB_DP |
| 23 | 23 | A1 | 34 | 34 | 46 | A8 | PA13 | I/O | FT | - | SWDIO, USB_NOE | - |
| - | - | - | 35 | 35 | 47 | D5 | VSS | S | - | - | - | - |
| - | - | - | 36 | 36 | 48 | E6 | VDD_USB | S | - | - | - | - |
| 24 | 24 | B2 | 37 | 37 | 49 | A7 | PA14 | I/O | FT | - | SWCLK, USART2_TX | - |
| 25 | 25 | A2 | 38 | 38 | 50 | A6 | PA15 | I/O | FT | - | SPI1_NSS, TIM2_ETR, EVENTOUT, USART2_RX, TIM2_CH1 | - |
| - | - | - | - | - | 51 | B7 | PC10 | I/O | FT | - | LPUART1_TX | - |
| - | - | - | - | - | 52 | B6 | PC11 | I/O | FT | - | LPUART1_RX | - |
| - | - | - | - | - | 53 | C5 | PC12 | I/O | FT | - | - | - |
| - | - | - | - | - | 54 | B5 | PD2 | I/O | FT | - | LPUART1_RTS/ LPUART1_DE | - |
| 26 | 26 | B3 | 39 | 39 | 55 | A5 | PB3 | I/O | FT | - | SPI1_SCK, TIM2_CH2, TSC_G5I_O1, EVENTOUT | COMP2_INN |
| 27 | 27 | A3 | 40 | 40 | 56 | A4 | PB4 | I/O | FT | - | SPI1_MISO, EVENTOUT, TSC_G5_IO2, TIM22_CH1 | COMP2_INP |
| 28 | 28 | C4 | 41 | 41 | 57 | C4 | PB5 | I/O | FT | - | SPI1_MOSI, LPTIM1_IN1, I2C1_SMBA, TIM22_CH2 | COMP2_INP |
Table 16. STM32L052x6/8 pin definitions (continued)
52
Table 16. STM32L052x6/8 pin definitions (continued)
| Pin Number - LQFP32 | Pin Number - UFQFN32 | Pin Number - WLCSP36 (1) | Pin Number - LQFP48 | Pin Number - UFQFPN48 | Pin Number - LQFP64 | Pin Number - TFBGA64 | Pin name - (function after reset) | Pin type | I/O structure | Notes | Alternate functions | Additional functions |
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 29 | 29 | B4 | 42 | 42 | 58 | D3 | PB6 | I/O | FTf | - | USART1_TX, I2C1_SCL, LPTIM1_ETR, TSC_G5_IO3 | COMP2_INP |
| 30 | 30 | A4 | 43 | 43 | 59 | C3 | PB7 | I/O | FTf | - | USART1_RX, I2C1_SDA, LPTIM1_IN2, TSC_G5_IO4 | COMP2_INP, PVD_IN |
| 31 | 31 | C5 | 44 | 44 | 60 | B4 | BOOT0 | B | - | - | - | - |
| - | 32 | B5 | 45 | 45 | 61 | B3 | PB8 | I/O | FTf | - | TSC_SYNC, I2C1_SCL | - |
| - | - | - | 46 | 46 | 62 | A3 | PB9 | I/O | FTf | - | EVENTOUT, I2C1_SDA, SPI2_NSS/I2S2_WS | - |
| 32 | - | D6 | 47 | 47 | 63 | D4 | VSS | S | - | - | - | - |
| 1 | 1 | A5 | 48 | 48 | 64 | E4 | VDD | S | - | - | - | - |
-
PB9/12/13/14/15, PH0/1 and PC13 GPIOs should be configured as output and driven Low, even if they are not available on this package.
-
PA4 offers a reduced touch sensing sensitivity. It is thus recommended to use it as sampling capacitor I/O.
-
These pins are powered by VDD_USB. For all characteristics that refer to V DD , V DD_USB must be used instead.
Table 17. Alternate function port A
| Port | AF0 - SPI1/TIM21/SYS_A F/EVENTOUT/ | AF1 - - | AF2 - USB/TIM2/ EVENTOUT/ | AF3 - TSC/ EVENTOUT | AF4 - USART1/2/3 | AF5 - TIM2/21/22 | AF6 - EVENTOUT | AF7 - COMP1/2 |
|---|---|---|---|---|---|---|---|---|
| PA0 | - | - | TIM2_CH1 | TSC_G1_IO1 | USART2_CTS | TIM2_ETR | - | COMP1_OUT |
| PA1 | EVENTOUT | - | TIM2_CH2 | TSC_G1_IO2 | USART2_RTS/ USART2_DE | TIM21_ETR | - | - |
| PA2 | TIM21_CH1 | - | TIM2_CH3 | TSC_G1_IO3 | USART2_TX | - | - | COMP2_OUT |
| PA3 | TIM21_CH2 | - | TIM2_CH4 | TSC_G1_IO4 | USART2_RX | - | - | - |
| PA4 | SPI1_NSS | - | - | TSC_G2_IO1 | USART2_CK | TIM22_ETR | - | - |
| PA5 | SPI1_SCK | - | TIM2_ETR | TSC_G2_IO2 | TIM2_CH1 | - | - | |
| PA6 | SPI1_MISO | - | - | TSC_G2_IO3 | LPUART1_CTS | TIM22_CH1 | EVENTOUT | COMP1_OUT |
| PA7 | SPI1_MOSI | - | - | TSC_G2_IO4 | TIM22_CH2 | EVENTOUT | COMP2_OUT | |
| PA8 | MCO | - | USB_CRS_SYNC | EVENTOUT | USART1_CK | - | - | - |
| PA9 | MCO | - | - | TSC_G4_IO1 | USART1_TX | - | - | - |
| PA10 | - | - | - | TSC_G4_IO2 | USART1_RX | - | - | - |
| PA11 | SPI1_MISO | - | EVENTOUT | TSC_G4_IO3 | USART1_CTS | - | - | COMP1_OUT |
| PA12 | SPI1_MOSI | - | EVENTOUT | TSC_G4_IO4 | USART1_RTS/ USART1_DE | - | - | COMP2_OUT |
| PA13 | SWDIO | - | USB_NOE | - | - | - | - | - |
| PA14 | SWCLK | - | - | - | USART2_TX | - | - | - |
| PA15 | SPI1_NSS | - | TIM2_ETR | EVENTOUT | USART2_RX | TIM2_CH1 | - | - |
Table 18. Alternate function port B
| Port | Port | AF0 - SPI1/SPI2/I2S2/ USART1/ EVENTOUT/ | AF1 - I2C1 | AF2 - LPUART1/LPTIM /TIM2/SYS_AF/ EVENTOUT | AF3 - I2C1/TSC | AF4 - I2C1/TIM22/ EVENTOUT/ LPUART1 | AF5 - SPI2/I2S2/I2C2 | AF6 - I2C2/TIM21/ EVENTOUT |
|---|---|---|---|---|---|---|---|---|
| PB0 | EVENTOUT | - | - | TSC_G3_IO2 | - | - | - | |
| PB1 | - | - | - | TSC_G3_IO3 | LPUART1_RTS/ LPUART1_DE | - | - | |
| PB2 | - | - | LPTIM1_OUT | TSC_G3_IO4 | - | - | - | |
| PB3 | SPI1_SCK | - | TIM2_CH2 | TSC_G5I_O1 | EVENTOUT | - | - | |
| PB4 | SPI1_MISO | - | EVENTOUT | TSC_G5_IO2 | TIM22_CH1 | - | - | |
| PB5 | SPI1_MOSI | - | LPTIM1_IN1 | I2C1_SMBA | TIM22_CH2 | - | - | |
| PB6 | USART1_TX | I2C1_SCL | LPTIM1_ETR | TSC_G5_IO3 | - | - | - | |
| PB7 | USART1_RX | I2C1_SDA | LPTIM1_IN2 | TSC_G5_IO4 | - | - | - | |
| PB8 | - | - | - | TSC_SYNC | I2C1_SCL | - | - | |
| PB9 | - | - | EVENTOUT | - | I2C1_SDA | SPI2_NSS/I2S2_ WS | - | |
| PB10 | - | - | TIM2_CH3 | TSC_SYNC | LPUART1_TX | SPI2_SCK | I2C2_SCL | |
| PB11 | EVENTOUT | - | TIM2_CH4 | TSC_G6_IO1 | LPUART1_RX | I2C2_SDA | ||
| PB12 | SPI2_NSS/I2S2_WS | - | LPUART1_RTS/ LPUART1_DE | TSC_G6_IO2 | - | I2C2_SMBA | EVENTOUT | |
| PB13 | SPI2_SCK/I2S2_CK | - | - | TSC_G6_IO3 | LPUART1_CTS | I2C2_SCL | TIM21_CH1 | |
| PB14 | SPI2_MISO/I2S2_MCK | - | RTC_OUT | TSC_G6_IO4 | LPUART1_RTS/ LPUART1_DE | I2C2_SDA | TIM21_CH2 | |
| PB15 | SPI2_MOSI/I2S2_SD | - | RTC_REFIN | - | - | - | - |
Table 18. Alternate function port B
Table 19. Alternate function port C
| Port | Port | AF0 - LPUART1/LPTIM/ TIM21/12/ EVENTOUT/ | AF1 - - | AF2 - SPI2/I2S2/USB/ LPUART1/ EVENTOUT | AF3 - TSC |
|---|---|---|---|---|---|
| Port C | PC0 | LPTIM1_IN1 | - | EVENTOUT | TSC_G7_IO1 |
| Port C | PC1 | LPTIM1_OUT | - | EVENTOUT | TSC_G7_IO2 |
| Port C | PC2 | LPTIM1_IN2 | - | SPI2_MISO/I2S2_MCK | TSC_G7_IO3 |
| Port C | PC3 | LPTIM1_ETR | - | SPI2_MOSI/I2S2_SD | TSC_G7_IO4 |
| Port C | PC4 | EVENTOUT | - | LPUART1_TX | - |
| Port C | PC5 | - | - | LPUART1_RX | TSC_G3_IO1 |
| Port C | PC6 | TIM22_CH1 | - | - | TSC_G8_IO1 |
| Port C | PC7 | TIM22_CH2 | - | - | TSC_G8_IO2 |
| Port C | PC8 | TIM22_ETR | - | - | TSC_G8_IO3 |
| Port C | PC9 | TIM21_ETR | - | USB_NOE | TSC_G8_IO4 |
| Port C | PC10 | LPUART1_TX | - | - | - |
| Port C | PC11 | LPUART1_RX | - | - | - |
| Port C | PC12 | - | - | - | - |
| Port C | PC13 | - | - | - | - |
| Port C | PC14 | - | - | - | - |
| Port C | PC15 | - | - | - | - |
Table 19. Alternate function port C
STM32L052K8T7 Electrical Characteristics
The definition and values of input/output AC characteristics are given in Figure 26 and Table 61 , respectively.
Unless otherwise specified, the parameters given in Table 61 are derived from tests performed under ambient temperature and V DD supply voltage conditions summarized in Table 25 .
Table 61. I/O AC characteristics (1)
| OSPEEDRx[1:0] bit value (1) | Symbol | Parameter | Conditions | Min | Max (2) | Unit |
|---|---|---|---|---|---|---|
| 00 | f max(IO)out | Maximum frequency (3) | C L = 50 pF, V DD = 2.7 V to 3.6 V | - | 400 | kHz |
| 00 | f max(IO)out | Maximum frequency (3) | C L = 50 pF, V DD = 1.65 V to 2.7 V | - | 100 | kHz |
| 00 | t f(IO)out t r(IO)out | Output rise and fall time | C L = 50 pF, V DD = 2.7 V to 3.6 V | - | 125 | ns |
| 00 | t f(IO)out t r(IO)out | Output rise and fall time | C L = 50 pF, V DD = 1.65 V to 2.7 V | - | 320 | ns |
| 01 | f max(IO)out | Maximum frequency (3) | C L = 50 pF, V DD = 2.7 V to 3.6 V | - | 2 | MHz |
| 01 | f max(IO)out | Maximum frequency (3) | C L = 50 pF, V DD = 1.65 V to 2.7 V | - | 0.6 | MHz |
| 01 | t f(IO)out t r(IO)out | Output rise and fall time | C L = 50 pF, V DD = 2.7 V to 3.6 V | - | 30 | ns |
| 01 | t f(IO)out t r(IO)out | Output rise and fall time | C L = 50 pF, V DD = 1.65 V to 2.7 V | - | 65 | ns |
| 10 | F max(IO)out | Maximum frequency (3) | C L = 50 pF, V DD = 2.7 V to 3.6 V | - | 10 | MHz |
| 10 | F max(IO)out | Maximum frequency (3) | C L = 50 pF, V DD = 1.65 V to 2.7 V | - | 2 | MHz |
| 10 | t f(IO)out t r(IO)out | Output rise and fall time | C L = 50 pF, V DD = 2.7 V to 3.6 V | - | 13 | ns |
| 10 | t f(IO)out t r(IO)out | Output rise and fall time | C L = 50 pF, V DD = 1.65 V to 2.7 V | - | 28 | ns |
| 11 | F max(IO)out | Maximum frequency (3) | C L = 30 pF, V DD = 2.7 V to 3.6 V | - | 35 | MHz |
| 11 | F max(IO)out | Maximum frequency (3) | C L = 50 pF, V DD = 1.65 V to 2.7 V | - | 10 | MHz |
| 11 | t f(IO)out t r(IO)out | Output rise and fall time | C L = 30 pF, V DD = 2.7 V to 3.6 V | - | 6 | ns |
| 11 | t f(IO)out t r(IO)out | Output rise and fall time | C L = 50 pF, V DD = 1.65 V to 2.7 V | - | 17 | ns |
| Fm+ configuration (4) | f max(IO)out | Maximum frequency (3) | C L = 50 pF, V DD = 2.5 V to 3.6 V | - | 1 | MHz |
| Fm+ configuration (4) | t f(IO)out | Output fall time | C L = 50 pF, V DD = 2.5 V to 3.6 V | - | 10 | ns |
| Fm+ configuration (4) | t r(IO)out | Output rise time | C L = 50 pF, V DD = 2.5 V to 3.6 V | - | 30 | ns |
| Fm+ configuration (4) | f max(IO)out | Maximum frequency (3) | C L = 50 pF, V DD = 2.5 V to 3.6 V | - | 350 | KHz |
| Fm+ configuration (4) | t f(IO)out | Output fall time | C L = 50 pF, V DD = 1.65 V to 3.6 V | - | 15 | ns |
| Fm+ configuration (4) | t r(IO)out | Output rise time | C L = 50 pF, V DD = 2.5 V to 3.6 V | - | 60 | ns |
| - | t EXTIpw | Pulse width of external signals detected by the EXTI controller | - | 8 | - | ns |
- The maximum frequency is defined in Figure 26 .
- When Fm+ configuration is set, the I/O speed control is bypassed. Refer to the line reference manual for a detailed description of Fm+ I/O configuration.
114
Figure 26. I/O AC characteristics definition
STM32L052K8T7 Absolute Maximum Ratings
Stresses above the absolute maximum ratings listed in Table 22: Voltage characteristics , Table 23: Current characteristics , and Table 24: Thermal characteristics may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these conditions is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. Device mission profile (application conditions) is compliant with JEDEC JESD47 Qualification Standard. Extended mission profiles are available on demand.
Table 22. Voltage characteristics
| Symbol | Definition | Min | Max | Unit |
|---|---|---|---|---|
| V DD -V SS | External main supply voltage (including V DDA , V DD_USB , V DD ) (1) | -0.3 | 4.0 | V |
| V IN (2) | Input voltage on FT and FTf pins | V SS - 0.3 | V DD +4.0 | V |
| V IN (2) | Input voltage on TC pins | V SS - 0.3 | 4.0 | V |
| V IN (2) | Input voltage on BOOT0 | V SS | V DD + 4.0 | V |
| V IN (2) | Input voltage on any other pin | V SS - 0.3 | 4.0 | V |
| | ∆ V DD | | Variations between different V DDx power pins | - | 50 | mV |
| |V DDA -V DDx | | Variations between any V DDx and V DDA power pins (3) | - | 300 | mV |
| | ∆ V SS | | Variations between all different ground pins | - | 50 | mV |
| V REF+ -V DDA | Allowed voltage difference for V REF+ > V DDA | - | 0.4 | V |
| V ESD(HBM) | Electrostatic discharge voltage (human body model) | see Section 6.3.11 | see Section 6.3.11 |
Table 23. Current characteristics
| Symbol | Ratings | Max. | Unit |
|---|---|---|---|
| Σ I VDD (2) | Total current into sum of all V DD power lines (source) (1) | 105 | mA |
| Σ I VSS (2) | Total current out of sum of all V SS ground lines (sink) (1) | 105 | mA |
| Σ I VDD_USB | Total current into V DD_USB power lines (source) | 25 | mA |
| I VDD(PIN) | Maximum current into each V DD power pin (source) (1) | 100 | mA |
| I VSS(PIN) | Maximum current out of each V SS ground pin (sink) (1) | 100 | mA |
| I IO | Output current sunk by any I/O and control pin except FTf pins | 16 | mA |
| I IO | Output current sunk by FTf pins | 22 | mA |
| I IO | Output current sourced by any I/O and control pin | -16 | mA |
| Σ I IO(PIN) | Total output current sunk by sum of all IOs and control pins except PA11 and PA12 (2) | 90 | mA |
| Σ I IO(PIN) | Total output current sunk by PA11 and PA12 | 25 | mA |
| Σ I IO(PIN) | Total output current sourced by sum of all IOs and control pins (2) | -90 | mA |
| I INJ(PIN) | Injected current on FT, FTf, RST and B pins | -5/+0 (3) | mA |
| I INJ(PIN) | Injected current on TC pin | ± 5 (4) | mA |
| Σ I INJ(PIN) | Total injected current (sum of all I/O and control pins) (5) | ± 25 | mA |
- This current consumption must be correctly distributed over all I/Os and control pins. The total output current must not be sunk/sourced between two consecutive power supply pins referring to high pin count LQFP packages.
- Positive current injection is not possible on these I/Os. A negative injection is induced by V IN <V SS . I INJ(PIN) must never be exceeded. Refer to Table 22 for maximum allowed input voltage values.
- A positive injection is induced by V IN > V DD while a negative injection is induced by V IN < V SS . I INJ(PIN) must never be exceeded. Refer to Table 22: Voltage characteristics for the maximum allowed input voltage values.
- When several inputs are submitted to a current injection, the maximum Σ I INJ(PIN) is the absolute sum of the positive and negative injected currents (instantaneous values).
Table 24. Thermal characteristics
| Symbol | Ratings | Value | Unit |
|---|---|---|---|
| T STG | Storage temperature range | -65 to +150 | °C |
| T J | Maximum junction temperature | 150 | °C |
114
STM32L052K8T7 Thermal Information
The maximum chip-junction temperature, T J max, in degrees Celsius, may be calculated using the following equation:
T J max = T A max + (P D max × Θ JA )
STM32L052K8T7 Package Information
In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at www.st.com. ECOPACK is an ST trademark.
Variants on the same datasheet
These parts have exact links to the same datasheet. They are candidates to compare, not verified drop-in replacements; check package, pinout and electrical limits.
| Part Number | Manufacturer | Package |
|---|---|---|
| STM32L052K8 | STMicroelectronics | — |
Other Microcontrollers (MCU)
- STM32F407VET6 – STMicroelectronics, ARM Cortex-M4 MCU
- STM32H563ZIT6 – STMicroelectronics, Arm Cortex-M33 32-bit MCU
- RP2040 – Raspberry Pi, Microcontroller
- STM32H743VIT6 – STMicroelectronics, Microcontroller Unit (MCU)
- STM32U575RIT6 – STMicroelectronics, Ultra-low-power Arm Cortex-M33 32-bit MCU
- STM32L011F4U6 – STMicroelectronics, Ultra-low-power Arm Cortex-M0+ MCU
- GD32F103C8T6 – GigaDevice, Arm Cortex-M3 32-bit MCU
- CH32H417QEU6 – WCH, Dual-Core RISC-V Microcontroller
All Microcontrollers (MCU) datasheetsAll STMicroelectronics datasheets (808)
Ask your AI agent about the STM32L052K8T7
Connect SheetsData to Claude, Cursor, Codex or any MCP client and your agent reads this datasheet for you: pinout, limits, register maps and design checks, with the numbers taken from the PDF.
claude mcp add --transport http sheetsdata https://mcp.sheetsdata.com/mcp
Then ask: "Can the STM32L052K8T7 run from my 12 V rail? Check it against the datasheet limits."
Create a free account $2 of usage every month, no card needed.