STM32L052K8

The ultra-low-power STM32L052x6/8 microcontrollers incorporate the connectivity power of the universal serial bus (USB 2.0 crystal-less) with the high-performance Arm Cortex-M0+ 32-bit RISC core operating at a 32 MHz frequency, a memory protection unit (MPU), highspeed embedded memories (64 Kbytes of Flash program memory, 2 Kbytes of data EEPROM and 8 Kbytes of RAM) plus an extensive range of enhanced I/Os and peripherals.

The STM32L052x6/8 devices provide high power efficiency for a wide range of performance. It is achieved with a large choice of internal and external clock sources, an internal voltage adaptation and several low-power modes.

The STM32L052x6/8 devices offer several analog features, one 12-bit ADC with hardware oversampling, one DAC, two ultra-low-power comparators, several timers, one low-power timer (LPTIM), three general-purpose 16-bit timers and one basic timer, one RTC and one SysTick which can be used as timebases. They also feature two watchdogs, one watchdog with independent clock and window capability and one window watchdog based on bus clock.

Moreover, the STM32L052x6/8 devices embed standard and advanced communication interfaces: up to two I2C, two SPIs, one I2S, two USARTs, a low-power UART (LPUART), and a crystal-less USB. The devices offer up to 24 capacitive sensing channels to simply add touch sensing functionality to any application.

The STM32L052x6/8 also include a real-time clock and a set of backup registers that remain powered in Standby mode.

The ultra-low-power STM32L052x6/8 devices operate from a 1.8 to 3.6 V power supply (down to 1.65 V at power down) with BOR and from a 1.65 to 3.6 V power supply without BOR option. They are available in the -40 to +125 °C temperature range. A comprehensive set of power-saving modes allows the design of low-power applications.

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Figure 3. STM32L052x6/8 LQFP64 pinout

1. The above figure shows the package top view.
2. The I/O pins supplied by VDD_USB are shown in grey.

Figure 4. STM32L052x6/8 TFBGA64 ballout

Figure 4. STM32L052x6/8 TFBGA64 ballout

1. The above figure shows the package top view.
2. the I/O pins supplied by VDD_USB are shown in grey.

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Figure 5. STM32L052x6/8 LQFP48 pinout

1. The above figure shows the package top view.
2. The I/O pins supplied by VDD_USB are shown in grey.
3. The above figure shows the package top view.
4. The I/O pins supplied by VDD_USB are shown in grey.

Figure 6. STM32L052x6/8 UFQFPN48

Figure 7. STM32L052x6/8 WLCSP36 ballout

1. The above figure shows the package top view.
2. The above figure shows the package top view.

Figure 8. STM32L052x6/8 LQFP32 pinout

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Figure 9. STM32L052x6/8 UFQFPN32 pinout

1. The above figure shows the package top view.

Table 15. Legend/abbreviations used in the pinout table

Table 16. STM32L052x6/8 pin definitions

Table 16. STM32L052x6/8 pin definitions

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Table 16. STM32L052x6/8 pin definitions (continued)

Table 16. STM32L052x6/8 pin definitions (continued)

Table 16. STM32L052x6/8 pin definitions (continued)

Table 16. STM32L052x6/8 pin definitions (continued)

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Table 16. STM32L052x6/8 pin definitions (continued)

Table 16. STM32L052x6/8 pin definitions (continued)

Table 16. STM32L052x6/8 pin definitions (continued)

Table 16. STM32L052x6/8 pin definitions (continued)

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Table 16. STM32L052x6/8 pin definitions (continued)

1. PB9/12/13/14/15, PH0/1 and PC13 GPIOs should be configured as output and driven Low, even if they are not available on this package.

2. PA4 offers a reduced touch sensing sensitivity. It is thus recommended to use it as sampling capacitor I/O.

3. These pins are powered by VDD_USB. For all characteristics that refer to V DD , V DD_USB must be used instead.

Table 17. Alternate function port A

Table 17. Alternate function port A

Table 18. Alternate function port B

Table 18. Alternate function port B

Table 19. Alternate function port C

Table 19. Alternate function port C

The definition and values of input/output AC characteristics are given in Figure 26 and Table 61 , respectively.

Unless otherwise specified, the parameters given in Table 61 are derived from tests performed under ambient temperature and V DD supply voltage conditions summarized in Table 25 .

Table 61. I/O AC characteristics (1)

1. The maximum frequency is defined in Figure 26 .
2. When Fm+ configuration is set, the I/O speed control is bypassed. Refer to the line reference manual for a detailed description of Fm+ I/O configuration.

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Figure 26. I/O AC characteristics definition

Stresses above the absolute maximum ratings listed in Table 22: Voltage characteristics , Table 23: Current characteristics , and Table 24: Thermal characteristics may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these conditions is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. Device mission profile (application conditions) is compliant with JEDEC JESD47 Qualification Standard. Extended mission profiles are available on demand.

Table 22. Voltage characteristics

Table 23. Current characteristics

Table 23. Current characteristics

1. This current consumption must be correctly distributed over all I/Os and control pins. The total output current must not be sunk/sourced between two consecutive power supply pins referring to high pin count LQFP packages.
2. Positive current injection is not possible on these I/Os. A negative injection is induced by V IN <V SS . I INJ(PIN) must never be exceeded. Refer to Table 22 for maximum allowed input voltage values.
3. A positive injection is induced by V IN > V DD while a negative injection is induced by V IN < V SS . I INJ(PIN) must never be exceeded. Refer to Table 22: Voltage characteristics for the maximum allowed input voltage values.
4. When several inputs are submitted to a current injection, the maximum Σ I INJ(PIN) is the absolute sum of the positive and negative injected currents (instantaneous values).

Table 24. Thermal characteristics

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The maximum chip-junction temperature, T J max, in degrees Celsius, may be calculated using the following equation:

T J max = T A max + (P D max × Θ JA )

In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at www.st.com. ECOPACK is an ST trademark.