STM32G031C6T6

Part: STM32G031C6T6 (STM32G031x4/x6/x8 family) — STMicroelectronics

Type: Arm Cortex-M0+ 32-bit MCU

Description: 32-bit Arm Cortex-M0+ MCU at up to 64 MHz with up to 64 KB Flash and 8 KB SRAM, 1.7–3.6 V supply, 12-bit ADC and 2x USART.

Operating Conditions:

• Supply voltage (VDD): 1.7–3.6 V
• Operating temperature: -40 to 85 °C (suffix 6; suffix 7 is -40 to 105 °C and suffix 3 is -40 to 125 °C)
• Max AHB/APB clock: 64 MHz
• Analog supply (VDDA): 1.62–3.6 V for ADC; 2.4–3.6 V for VREFBUF

Absolute Maximum Ratings:

• Max supply voltage (VDD): 4.0 V
• Max current into VDD/VDDA pin: 100 mA
• Max output current sunk by any I/O pin (except FT_f): 15 mA
• Max junction temperature: 150 °C
• Storage temperature: -65 to +150 °C

Key Specs:

• Standard operating voltage VDD: 1.7–3.6 V
• VBAT backup operating voltage: 1.55–3.6 V
• AHB/APB clock frequency: 0–64 MHz
• Junction temperature (suffix 6): -40 to 105 °C
• I/O input voltage (all except RST): -0.3 V to Min(VDD + 3.6, 5.5) V
• Total I/O output current, sunk or sourced: 80 mA
• 12-bit, 0.4 μs ADC with up to 16 external channels, conversion range 0 to 3.6 V

Features:

• Arm Cortex-M0+ CPU up to 64 MHz
• Up to 64 KB Flash with protection and securable area; 8 KB SRAM with HW parity check
• CRC calculation unit
• POR/PDR, programmable BOR, PVD
• Low-power modes: Sleep, Stop, Standby, Shutdown; VBAT supply for RTC and backup registers
• 4–48 MHz crystal oscillator, 32 kHz crystal oscillator, internal 16 MHz RC with PLL (±1 %), internal 32 kHz RC (±5 %)
• Up to 44 fast I/Os, multiple 5 V-tolerant
• 5-channel DMA controller
• 11 timers, including an advanced motor-control timer, 32-bit and 16-bit general-purpose timers, low-power timers and watchdogs
• Calendar RTC with alarm and periodic wakeup
• Two I2C interfaces (Fast-mode Plus, 1 Mbit/s), two USARTs, two SPIs (32 Mbit/s, one multiplexed with I2S), one low-power UART
• Serial wire debug (SWD); 96-bit unique ID
• ECOPACK 2 compliant

Applications:

Package:

• LQFP48 and UFQFPN48 (STM32G031Cx)
• LQFP32 and UFQFPN32 (STM32G031Kx)
• UFQFPN28 (STM32G031Gx)
• TSSOP20 (STM32G031Fx)
• SO8N (STM32G031Jx)
• WLCSP18 (STM32G031Yx)

• Includes ST state-of-the-art patented technology
• Core: Arm ® 32-bit Cortex ® -M0+ CPU, frequency up to 64 MHz
• -40°C to 85°C/105°C/125°C operating temperature
• Memories
• -8 Kbytes of SRAM with HW parity check
• -Up to 64 Kbytes of flash memory with protection and securable area
• CRC calculation unit
• Reset and power management
• -Power-on/Power-down reset (POR/PDR)
• -Voltage range: 1.7 V to 3.6 V
• -Programmable Brownout reset (BOR)
• -Low-power modes:
• -Programmable voltage detector (PVD)

Sleep, Stop, Standby, Shutdown

• -VBAT supply for RTC and backup registers
• Clock management
• -32 kHz crystal oscillator with calibration
• -4 to 48 MHz crystal oscillator
• -Internal 16 MHz RC with PLL option (±1 %)
• -Internal 32 kHz RC oscillator (±5 %)
• Up to 44 fast I/Os
• -Multiple 5 V-tolerant I/Os
• -All mappable on external interrupt vectors
• 5-channel DMA controller with flexible mapping
• -Up to 16-bit with hardware oversampling
• 12-bit, 0.4 μs ADC (up to 16 ext. channels)
• -Conversion range: 0 to 3.6V
• 11 timers (one 128 MHz capable): 16-bit for advanced motor control, one 32-bit and four 16-bit general-purpose, two low-power 16-bit, two watchdogs, SysTick timer
• Calendar RTC with alarm and periodic wakeup from Stop/Standby/Shutdown

Figure 3. STM32G031Jx SO8N pinout

Figure 4. STM32G031Yx WLCSP18 ballout

Figure 5. STM32G031Fx TSSOP20 pinout

Figure 6. STM32G031GxU UFQFPN28 pinout

Figure 7. STM32G031KxT LQFP32 pinout

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Figure 8. STM32G031KxU UFQFPN32 pinout

Figure 9. STM32G031CxT LQFP48 pinout

Figure 10. STM32G031CxU UFQFPN48 pinout

Table 11. Terms and symbols used in Pin assignment and description table

Table 11. Terms and symbols used in Pin assignment and description table

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Table 12. Pin assignment and description

Table 12. Pin assignment and description

Table 12. Pin assignment and description (continued)

Table 12. Pin assignment and description (continued)

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Table 12. Pin assignment and description (continued)

Table 12. Pin assignment and description (continued)

Table 12. Pin assignment and description (continued)

1. PC13, PC14 and PC15 are supplied through the power switch. Since the switch only sinks a limited amount of current (3 mA), the use of GPIOs PC13 to PC15 in output mode is limited:

• These GPIOs must not be used as current sources (for example to drive a LED).
• The speed should not exceed 2 MHz with a maximum load of 30 pF

1. After an RTC domain power-up, PC13, PC14 and PC15 operate as GPIOs. Their function then depends on the content of the RTC registers. The RTC registers are not reset upon system reset. For details on how to manage these GPIOs, refer to the RTC domain and RTC register descriptions in the RM0444 reference manual.
2. RST I/O structure when the PF2-NRST pin is configured as reset (input or input/output mode), FT I/O structure when the PF2-NRST pin is configured as GPIO. The PF2-NRST default functionality is NRST. If used in this mode on SO8 and WLCSP, take particular care about the configuration of the other I/Os connected to this pin.
3. Pins PA9 and PA10 can be remapped in place of pins PA11 and PA12 (default mapping), using SYSCFG_CFGR1 register.
4. Upon reset, these pins are configured as SWD alternate functions, and the internal pull-up on PA13 pin and the internal pulldown on PA14 pin are activated.

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Table 13. Port A alternate function mapping

Table 13. Port A alternate function mapping

Table 14. Port B alternate function mapping

Table 14. Port B alternate function mapping

Stresses above the absolute maximum ratings listed in Table 18 , Table 19 and Table 20 may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these conditions is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. The device mission profile (application conditions) is compliant with the JEDEC JESD47 qualification standard.

All voltages are defined with respect to V SS .

Table 18. Voltage characteristics

1. To sustain a voltage higher than 4 V the internal pull-up/pull-down resistors must be disabled.
2. When an FT_a pin is used by an analog peripheral such as ADC, the maximum V IN is 4 V.

Table 19. Current characteristics

Table 19. Current characteristics

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Table 19. Current characteristics (continued)

1. Positive injection is not possible on these I/Os and does not occur for input voltages lower than the specified maximum value.

2. When several inputs are submitted to a current injection, the maximum ∑ |I INJ(PIN) | is the absolute sum of the negative injected currents (instantaneous values).

Table 20. Thermal characteristics

The operating junction temperature T J must never exceed the maximum given in Table 21: General operating conditions

The maximum junction temperature in °C that the device can reach if respecting the operating conditions, is:

$$T_J(max) = T_A(max) + P_D(max) \times \Theta_{JA}$$

In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com . ECOPACK is an ST trademark.