STM32F042G4
ARM Cortex-M0 MCUThe STM32F042G4 is a arm cortex-m0 mcu from STMicroelectronics. View the full STM32F042G4 datasheet below including key specifications, electrical characteristics, absolute maximum ratings.
Manufacturer
STMicroelectronics
Category
ARM Cortex-M0 MCU
Key Specifications
| Parameter | Value |
|---|---|
| ADC Channels (Resolution) | 10-Ch 12-Bit |
| Case/Package | LQFP |
| China RoHS | Compliant |
| Connectivity | CANbus, HDMI-CEC, I2C, IrDA, LINbus, SPI, UART/USART, USB |
| Core Architecture | ARM |
| Core Processor | ARM® Cortex®-M0 |
| Core Size | 32-Bit |
| Data Bus Width | 32 b |
| Data Converters | A/D 13x12b |
| DigiKey Programmable | Not Verified |
| DigiKey Programmable | Not Verified |
| EEPROM Memory Size | 0 B |
| Flash Memory Size | 32 kB |
| Frequency | 48 MHz |
| Height - Seated (Max) | 1.6 mm |
| Interface | CAN, I2C, I2S, IrDA, LIN, SPI, USB |
| Lead Free | Lead Free |
| Length | 7 mm |
| Lifecycle Status | Production (Last Updated: 4 months ago) |
| Max Frequency | 32 MHz |
| Max Operating Temperature | 85 °C |
| Max Power Dissipation | 351 mW |
| Max Supply Current | 23.4 mA |
| Max Supply Voltage | 3.6 V |
| Memory Size | 32 kB |
| Memory Type | FLASH |
| Min Operating Temperature | -40 °C |
| Min Supply Voltage | 2 V |
| Mounting Type | Surface Mount |
| Nominal Supply Current | 1.7 µA |
| Number of A/D Converters | 1 |
| Number of ADC Channels | 13 |
| Number of Channels | 10 |
| Number of D/A Converters | 0 |
| Number of I/O | 26 |
| Number of I/Os | 26 |
| Number of I2C Channels | 1 |
| Number of Pins | 32 |
| Number of Programmable I/O | 26 |
| Number of SPI Channels | 1 |
| Number of Terminals | 32 |
| Number of Timers/Counters | 7 |
| Number of UART Channels | 0 |
| Number of USART Channels | 2 |
| Operating Supply Voltage | 3.3 V |
| Operating Temperature | -40°C ~ 85°C (TA) |
| Oscillator Type | Internal |
| Oscillator Type | Internal |
| Oscillator Type | Internal |
| Package / Case | 32-LQFP |
| Peripherals | DMA, I2S, POR, PWM, WDT |
| Peripherals | POR |
| Flash Memory Size | 32KB (32K x 8) |
| Program Memory Type | FLASH |
| Radiation Hardening | No |
| RAM Size | 6K x 8 B |
| RAM Size | 6 kB |
| REACH SVHC | Yes |
| RoHS | Compliant |
| Schedule B | 8542310000 |
| Clock Speed | 48MHz |
| Supplier Device Package | 32-LQFP (7x7) |
| Supplier Device Package | 32-LQFP (7x7) |
| Temperature Grade | Industrial |
| Terminal Pitch | 800 µm |
| Supply Voltage | 1.65V ~ 3.6V |
| Watchdog Timer | Yes |
| Weight | 773.99868 mg |
| Width | 7 mm |
Overview
Part: STM32F042x4/x6 — STMicroelectronics
Type: ARM Cortex-M0 MCU
Description: 32-bit ARM Cortex-M0 CPU operating at up to 48 MHz, with up to 32 KB Flash memory, 6 KB SRAM, crystal-less USB FS 2.0, CAN, 9 timers, 12-bit ADC, and various communication interfaces.
Operating Conditions:
- Supply voltage: 2.0–3.6 V
- Operating temperature: -40 to 85 °C (suffix-dependent — see Table 21 for grade-specific ranges)
- Internal AHB clock frequency: 0–48 MHz
Absolute Maximum Ratings:
- Max supply voltage: 4.0 V
- Max continuous current: 120 mA (total into all VDD power lines)
- Max junction/storage temperature: 150 °C
Key Specs:
- CPU: ARM 32-bit Cortex-M0
- Max CPU frequency: 48 MHz
- Flash memory: 16 to 32 Kbytes
- SRAM: 6 Kbytes
- ADC: 12-bit, 1.0 μs, up to 10 channels
- I/O supply voltage (VDDIO2): 1.65–3.6 V
- I2C interface speed: 1 Mbit/s (Fast Mode Plus)
- SPI interface speed: 18 Mbit/s
Features:
- Crystal-less USB 2.0 full-speed interface
- CAN interface
- Nine timers (including advanced-control, 32-bit, 16-bit, watchdog, SysTick)
- Communication interfaces: I2C, USART, SPI/I2S, HDMI CEC
- Up to 38 fast I/Os, up to 24 with 5 V tolerant capability
- 5-channel DMA controller
- Capacitive sensing channels for touch applications
- Calendar RTC with alarm and periodic wakeup
- Serial wire debug (SWD)
- 96-bit unique ID
Applications:
Package:
- LQFP48
- UFQFPN48
- WLCSP36
- LQFP32
- UFQFPN32
- UFQFPN28
- TSSOP20
Features
- Core: ARM ® 32-bit Cortex ® -M0 CPU, frequency up to 48 MHz
- Memories
- -16 to 32 Kbytes of Flash memory
- -6 Kbytes of SRAM with HW parity
- CRC calculation unit
- Reset and power management
- -Digital and I/Os supply: V DD = 2 V to 3.6 V
- -Analog supply: V DDA = from V DD to 3.6 V
- -Selected I/Os: V DDIO2 = 1.65 V to 3.6 V
- -Power-on/Power down reset (POR/PDR)
- -Programmable voltage detector (PVD)
- -Low power modes: Sleep, Stop, Standby
- -VBAT supply for RTC and backup registers
- Clock management
- -4 to 32 MHz crystal oscillator
- -32 kHz oscillator for RTC with calibration
- -Internal 8 MHz RC with x6 PLL option
- -Internal 40 kHz RC oscillator
- -Internal 48 MHz oscillator with automatic trimming based on ext. synchronization
- Up to 38 fast I/Os
- -All mappable on external interrupt vectors
- -Up to 24 I/Os with 5 V tolerant capability and 8 with independent supply V DDIO2
- 5-channel DMA controller
- One 12-bit, 1.0 μs ADC (up to 10 channels)
- -Conversion range: 0 to 3.6 V
- -Separate analog supply: 2.4 V to 3.6 V
- Up to 14 capacitive sensing channels for touchkey, linear and rotary touch sensors
- Calendar RTC with alarm and periodic wakeup from Stop/Standby
| Reference | Part number |
|---|---|
| STM32F042x4 | STM32F042F4, STM32F042G4, STM32F042K4, STM32F042T4, STM32F042C4 |
| STM32F042x6 | STM32F042F6, STM32F042G6, STM32F042K6, STM32F042T6, STM32F042C6 |
Pin Configuration
Figure 3. LQFP48 package pinout
Figure 4. UFQFPN48 package pinout
39
Figure 5. WLCSP36 package pinout
- The above figure shows the package in top view, changing from bottom view in the previous document versions.
Figure 6. LQFP32 package pinout
Figure 5. WLCSP36 package pinout
Figure 7. UFQFPN32 package pinout
Figure 8. UFQFPN28 package
- Pin pair PA11/12 can be remapped in place of pin pair PA9/10 using the SYSCFG_CFGR1 register.
39
Figure 9. TSSOP20 package
- 26&B287 1567 9''$ 3$
- 3$
- 3$
- 3$
- 3$
Table 12. Legend/abbreviations used in the pinout table
| Name | Name | Abbreviation | Definition |
|---|---|---|---|
| Pin name | Pin name | Unless otherwise specified in brackets below the pin name, the pin function during and after reset is the same as the actual pin name | Unless otherwise specified in brackets below the pin name, the pin function during and after reset is the same as the actual pin name |
| S | Supply pin | ||
| Pin type | Pin type | I/O | Input / output pin |
| FT | 5 V-tolerant I/O | ||
| FTf | 5 V-tolerant I/O, FM+ capable | ||
| TTa | 3.3 V-tolerant I/O directly connected to ADC | ||
| I/O structure | I/O structure | TC | Standard 3.3 V I/O |
| RST Bidirectional | reset pin with embedded weak pull-up resistor | ||
| Notes | Notes | Unless otherwise specified by a note, all I/Os are set as floating inputs during and after reset. | Unless otherwise specified by a note, all I/Os are set as floating inputs during and after reset. |
| Pin functions | Alternate functions | Functions selected through GPIOx_AFR registers | Functions selected through GPIOx_AFR registers |
| Pin functions | Additional functions | Functions directly selected/enabled through peripheral registers | Functions directly selected/enabled through peripheral registers |
Table 12. Legend/abbreviations used in the pinout table
Table 13. STM32F042x pin definitions
| Pin numbers | Pin numbers | Pin numbers | Pin numbers | Pin numbers | Pin numbers | Pin functions | Pin functions | ||||
|---|---|---|---|---|---|---|---|---|---|---|---|
| LQFP48/UFQFPN48 | WLCSP36 | LQFP32 | UFQFPN32 | UFQFPN28 | TSSPOP20 | Pin name (function upon reset) | Pin type | I/O structure | Notes | Alternate function | Additional functions |
| 1 | - | - | - | - | - | VBAT | S | - | - | Backup power supply | Backup power supply |
| 2 | A6 | - | - | - | - | PC13 | I/O | TC | (1) (2) | - | WKUP2, RTC_TAMP1, RTC_TS, RTC_OUT |
| 3 | B6 | - | - | - | - | PC14- OSC32_IN (PC14) | I/O | TC | (1) (2) | - | OSC32_IN |
| 4 | C6 | - | - | - | - | PC15- OSC32_OUT (PC15) | I/O | TC | (1) (2) | - | OSC32_OUT |
| 5 | B5 | 2 | 2 | 2 | 2 | PF0-OSC_IN (PF0) | I/O | FTf | - | CRS_ SYNC I2C1_SDA | OSC_IN |
| 6 | C5 | 3 | 3 | 3 | 3 | PF1-OSC_OUT (PF1) | I/O | FTf | - | I2C1_SCL | OSC_OUT |
| 7 | D5 | 4 | 4 | 4 | 4 | NRST | I/O | RST | - | Device reset input / internal reset output (active low) | Device reset input / internal reset output (active low) |
| 8 | D6 | 32 | 0 | 16 | 15 | VSSA | S | (3) | Analog ground | Analog ground | |
| 9 | E5 | 5 | 5 | 5 | 5 | VDDA | S | - | Analog power supply | Analog power supply | |
| 10 | F6 | 6 | 6 | 6 | 6 | PA0 | I/O | TTa | - | USART2_CTS, TIM2_CH1_ETR, TSC_G1_IO1 | RTC_ TAMP2, WKUP1, ADC_IN0, |
| 11 | D4 | 7 | 7 | 7 | 7 | PA1 | I/O | TTa | - | USART2_RTS, TIM2_CH2, TSC_G1_IO2, EVENTOUT | ADC_IN1 |
| 12 | E4 | 8 | 8 | 8 | 8 | PA2 | I/O | TTa | - | USART2_TX, TIM2_CH3, TSC_G1_IO3 | ADC_IN2, WKUP4 |
| 13 | F5 | 9 | 9 | 9 | 9 | PA3 | I/O | TTa | - | USART2_RX, TIM2_CH4, TSC_G1_IO4 | ADC_IN3 |
Table 13. STM32F042x pin definitions
39
Table 13. STM32F042x pin definitions (continued)
| Pin numbers | Pin numbers | Pin numbers | Pin numbers | Pin numbers | Pin numbers | Pin functions | Pin functions | ||||
|---|---|---|---|---|---|---|---|---|---|---|---|
| LQFP48/UFQFPN48 | WLCSP36 | LQFP32 | UFQFPN32 | UFQFPN28 | TSSPOP20 | Pin name (function upon reset) | Pin type | I/O structure | Notes | Alternate function | Additional functions |
| 14 | C3 | 10 | 10 | 10 | 10 | PA4 | I/O | TTa | - | SPI1_NSS, I2S1_WS, TIM14_CH1, TSC_G2_IO1, USART2_CK USB_NOE | ADC_IN4 |
| 15 | D3 | 11 | 11 | 11 | 11 | PA5 | I/O | TTa | - | SPI1_SCK, I2S1_CK, CEC, TIM2_CH1_ETR, TSC_G2_IO2 | ADC_IN5 |
| 16 | E3 | 12 | 12 | 12 | 12 | PA6 | I/O | TTa | - | SPI1_MISO, I2S1_MCK, TIM3_CH1, TIM1_BKIN, TIM16_CH1, TSC_G2_IO3, EVENTOUT | ADC_IN6 |
| 17 | F4 | 13 | 13 | 13 | 13 | PA7 | I/O | TTa | - | SPI1_MOSI, I2S1_SD, TIM3_CH2, TIM14_CH1, TIM1_CH1N, TIM17_CH1, TSC_G2_IO4, EVENTOUT | ADC_IN7 |
| 18 | F3 | 14 | 14 | 14 | - | PB0 | I/O | TTa | - | TIM3_CH3, TIM1_CH2N, TSC_G3_IO2, EVENTOUT | ADC_IN8 |
| 19 | F2 | 15 | 15 | 15 | 14 | PB1 | I/O | TTa | - | TIM3_CH4,TIM14_CH1, TIM1_CH3N, TSC_G3_IO3 | ADC_IN9 |
| 20 | D2 | - | 16 | - | - | PB2 | I/O | FT | - | TSC_G3_IO4 | - |
| 21 | - | - | - | - | - | PB10 | I/O | FTf | - | SPI2_SCK, CEC, TSC_SYNC, TIM2_CH3, I2C1_SCL | - |
| 22 | - | - | - | - | - | PB11 | I/O | FTf | - | TIM2_CH4, EVENTOUT, I2C1_SDA | - |
| 23 | F1 | 16 | 0 | 16 | 15 | VSS | S | - | - | Ground | Ground |
| 24 | - | - | - | 17 | 16 | VDD | S | - | - | Digital power supply | Digital power supply |
| 25 | - | - | - | - | - | PB12 | I/O | FT | - | TIM1_BKIN, SPI2_NSS, EVENTOUT | - |
Table 13. STM32F042x pin definitions (continued)
Table 13. STM32F042x pin definitions (continued)
| Pin numbers | Pin numbers | Pin numbers | Pin numbers | Pin numbers | Pin numbers | Pin functions | Pin functions | ||||
|---|---|---|---|---|---|---|---|---|---|---|---|
| LQFP48/UFQFPN48 | WLCSP36 | LQFP32 | UFQFPN32 | UFQFPN28 | TSSPOP20 | Pin name (function upon reset) | Pin type | I/O structure | Notes | Alternate function | Additional functions |
| 26 | - | - | - | - | - | PB13 | I/O | FTf | - | SPI2_SCK, TIM1_CH1N, I2C1_SCL | - |
| 27 | - | - | - | - | - | PB14 | I/O | FTf | - | SPI2_MISO, TIM1_CH2N, I2C1_SDA | - |
| 28 | - | - | - | - | - | PB15 | I/O | FT | - | SPI2_MOSI, TIM1_CH3N | WKUP7, RTC_REFIN |
| 29 | E2 | 18 | 18 | - | - | PA8 | I/O | FT | (4) | USART1_CK, TIM1_CH1, EVENTOUT, MCO, CRS_SYNC | - |
| 30 | D1 | 19 | 19 | 19 | 17 | PA9 | I/O | FTf | (4) | USART1_TX, TIM1_CH2, TSC_G4_IO1, I2C1_SCL | - |
| 31 | C1 | 20 | 20 | 20 | 18 | PA10 | I/O | FTf | (4) | USART1_RX, TIM1_CH3, TIM17_BKIN, TSC_G4_IO2, I2C1_SDA | - |
| 32 | C2 | 21 | 21 | 19 (5) | 17 (5) | PA11 | I/O | FTf | (4) | CAN_RX, USART1_CTS, TIM1_CH4, TSC_G4_IO3, EVENTOUT, I2C1_SCL | USB_DM |
| 33 | A1 | 22 | 22 | 20 (5) | 18 (5) | PA12 | I/O | FTf | (4) | CAN_TX,USART1_RTS, TIM1_ETR, TSC_G4_IO4, EVENTOUT, I2C1_SDA | USB_DP |
| 34 | B1 | 23 | 23 | 21 | 19 | PA13 | I/O | FT | (4) (6) | IR_OUT, SWDIO USB_NOE | - |
| 35 | - | - | - | - | - | VSS | S | - | - | Ground | Ground |
| 36 | E1 | 17 | 17 | 18 | 16 | VDDIO2 | S | - | - | Digital power supply | Digital power supply |
| 37 | B2 | 24 | 24 | 22 | 20 | PA14 | I/O | FT | (4) (6) | USART2_TX, SWCLK | - |
Table 13. STM32F042x pin definitions (continued)
39
Table 13. STM32F042x pin definitions (continued)
| Pin numbers | Pin numbers | Pin numbers | Pin numbers | Pin numbers | Pin numbers | Pin functions | Pin functions | ||||
|---|---|---|---|---|---|---|---|---|---|---|---|
| LQFP48/UFQFPN48 | WLCSP36 | LQFP32 | UFQFPN32 | UFQFPN28 | TSSPOP20 | Pin name (function upon reset) | Pin type | I/O structure | Notes | Alternate function | Additional functions |
| 38 | A2 | 25 | 25 | 23 | - | PA15 | I/O | FT | (4) | SPI1_NSS, I2S1_WS, USART2_RX, TIM2_CH1_ETR, EVENTOUT, USB_NOE | - |
| 39 | B3 | 26 | 26 | 24 | - | PB3 | I/O | FT | - | SPI1_SCK, I2S1_CK, TIM2_CH2, TSC_G5_IO1, EVENTOUT | - |
| 40 | A3 | 27 | 27 | 25 | - | PB4 | I/O | FT | - | SPI1_MISO, I2S1_MCK, TIM17_BKIN, TIM3_CH1, TSC_G5_IO2, EVENTOUT | - |
| 41 | E6 | 28 | 28 | 26 | - | PB5 | I/O | FT | - | SPI1_MOSI, I2S1_SD, I2C1_SMBA, TIM16_BKIN, TIM3_CH2 | WKUP6 |
| 42 | C4 | 29 | 29 | 27 | - | PB6 | I/O | FTf | - | I2C1_SCL, USART1_TX, TIM16_CH1N, TSC_G5_I03 | - |
| 43 | A4 | 30 | 30 | 28 | - | PB7 | I/O | FTf | - | I2C1_SDA, USART1_RX, TIM17_CH1N, TSC_G5_IO4 | - |
| 44 | - | - | 31 | - | - | PF11-BOOT0 | I/O | FT | - | - | Boot memory selection |
| - | B4 | 31 | - | 1 | 1 | PB8-BOOT0 | I/O | FTf | - | I2C1_SCL, CEC, TIM16_CH1, TSC_SYNC, CAN_RX | Boot memory selection |
| 45 | - | - | 32 | - | - | PB8 | I/O | FTf | - | I2C1_SCL, CEC, TIM16_CH1, TSC_SYNC, CAN_RX | - |
Table 13. STM32F042x pin definitions (continued)
Electrical Characteristics
The definition and values of input/output AC characteristics are given in Figure 24 and Table 52 , respectively. Unless otherwise specified, the parameters given are derived from tests performed under the ambient temperature and supply voltage conditions summarized in Table 21: General operating conditions .
Table 52. I/O AC characteristics (1)(2)
| OSPEEDRy [1:0] value (1) | Symbol | Parameter | Conditions | Min | Max | Unit |
|---|---|---|---|---|---|---|
| x0 | f max(IO)out | Maximum frequency (3) | C L = 50 pF, V DDIOx ≥ 2 V | - | 2 | MHz |
| x0 | t f(IO)out | Output fall time | C L = 50 pF, V DDIOx ≥ 2 V | - | 125 | ns |
| x0 | t r(IO)out | Output rise time | C L = 50 pF, V DDIOx ≥ 2 V | - | 125 | ns |
| x0 | f max(IO)out | Maximum frequency (3) | C L = 50 pF, V DDIOx < 2 V | - | 1 | MHz |
| x0 | t f(IO)out | Output fall time | C L = 50 pF, V DDIOx < 2 V | - | 125 | ns |
| x0 | t r(IO)out | Output rise time | C L = 50 pF, V DDIOx < 2 V | - | 125 | ns |
| 01 | f max(IO)out | Maximum frequency (3) | C L = 50 pF, V DDIOx ≥ 2 V | - | 10 | MHz |
| 01 | t f(IO)out | Output fall time | C L = 50 pF, V DDIOx ≥ 2 V | - | 25 | ns |
| 01 | t r(IO)out | Output rise time | C L = 50 pF, V DDIOx ≥ 2 V | - | 25 | ns |
| 01 | f max(IO)out | Maximum frequency (3) | C L = 50 pF, V DDIOx < 2 V | - | 4 | MHz |
| 01 | t f(IO)out | Output fall time | C L = 50 pF, V DDIOx < 2 V | - | 62.5 | ns |
| 01 | t r(IO)out | Output rise time | C L = 50 pF, V DDIOx < 2 V | - | 62.5 | ns |
| 11 | f max(IO)out | Maximum frequency (3) | C L = 30 pF, V DDIOx ≥ 2.7 V | - | 50 | MHz |
| 11 | f max(IO)out | Maximum frequency (3) | C L = 50 pF, V DDIOx ≥ 2.7 V | - | 30 | MHz |
| 11 | f max(IO)out | Maximum frequency (3) | C L = 50 pF, 2 V ≤ V DDIOx < 2.7 V | - | 20 | MHz |
| 11 | f max(IO)out | Maximum frequency (3) | C L = 50 pF, V DDIOx < 2 V | - | 10 | MHz |
| f(IO)out Output fall time | C L = 30 pF, V DDIOx ≥ 2.7 V | - | 5 | |||
| f(IO)out Output fall time | C L = 50 pF, V DDIOx ≥ 2.7 V | - | 8 | |||
| t | f(IO)out Output fall time | C L = 50 pF, 2 V ≤ V DDIOx < 2.7 V | - | 12 | ||
| f(IO)out Output fall time | C L = 50 pF, V DDIOx < 2 V | - | 25 | |||
| t r(IO)out | Output rise time | C L = 30 pF, V DDIOx ≥ 2.7 V | - | 5 | ns | |
| t r(IO)out | Output rise time | C L = 50 pF, V DDIOx ≥ 2.7 V | - | 8 | ns | |
| t r(IO)out | Output rise time | C L = 50 pF, 2 V ≤ V DDIOx < 2.7 V | - | 12 | ns | |
| t r(IO)out | Output rise time | C L = 50 pF, V DDIOx < 2 V | - | 25 | ns |
Table 52. I/O AC characteristics (1)(2)
90
Table 52. I/O AC characteristics (1)(2) (continued)
| OSPEEDRy [1:0] value (1) | Symbol | Parameter | Conditions | Min | Max | Unit |
|---|---|---|---|---|---|---|
| Fm+ configuration (4) | f max(IO)out | Maximum frequency (3) | C L = 50 pF, V DDIOx ≥ 2 V | - | 2 | MHz |
| Fm+ configuration (4) | t f(IO)out | Output fall time | C L = 50 pF, V DDIOx ≥ 2 V | - | 12 | ns |
| Fm+ configuration (4) | t r(IO)out | Output rise time | C L = 50 pF, V DDIOx ≥ 2 V | - | 34 | ns |
| Fm+ configuration (4) | f max(IO)out | Maximum frequency (3) | C L = 50 pF, V DDIOx < 2 V | - | 0.5 | MHz |
| Fm+ configuration (4) | t f(IO)out | Output fall time | C L = 50 pF, V DDIOx < 2 V | - | 16 | ns |
| Fm+ configuration (4) | t r(IO)out | Output rise time | C L = 50 pF, V DDIOx < 2 V | - | 44 | ns |
| - | t EXTIpw | Pulse width of external signals detected by the EXTI controller | - | 10 | - | ns |
- Guaranteed by design, not tested in production.
- The maximum frequency is defined in Figure 24 .
- When Fm+ configuration is set, the I/O speed control is bypassed. Refer to the STM32F0xxxx reference manual RM0091 for a detailed description of Fm+ I/O configuration.
Figure 24. I/O AC characteristics definition
Absolute Maximum Ratings
Stresses above the absolute maximum ratings listed in Table 18: Voltage characteristics , Table 19: Current characteristics and Table 20: Thermal characteristics may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these conditions is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability.
Table 18. Voltage characteristics (1)
| Symbol | Ratings | Min | Max | Unit |
|---|---|---|---|---|
| V DD -V SS | External main supply voltage | - 0.3 | 4.0 | V |
| V DDIO2 -V SS | External I/O supply voltage | - 0.3 | 4.0 | V |
| V DDA -V SS | External analog supply voltage | - 0.3 | 4.0 | V |
| V DD -V DDA | Allowed voltage difference for V DD > V DDA | - | 0.4 | V |
| V BAT -V SS | External backup supply voltage | - 0.3 | 4.0 | V |
| V IN (2) | Input voltage on FT and FTf pins | V SS - 0.3 | V DDIOx + 4.0 (3) | V |
| V IN (2) | Input voltage on TTa pins | V SS - 0.3 | 4.0 | V |
| V IN (2) | Input voltage on any other pin | V SS - 0.3 | 4.0 | V |
| \ | ∆ V DDx \ | Variations between different V DD power pins | - | |
| \ | V SSx - V SS \ | Variations between all the different ground pins | - | |
| V ESD(HBM) | Electrostatic discharge voltage (human body model) | see Section 6.3.12: Electrical sensitivity characteristics | see Section 6.3.12: Electrical sensitivity characteristics | - |
Table 19. Current characteristics
| Symbol | Ratings | Max. | Unit |
|---|---|---|---|
| Σ I VDD | Total current into sum of all VDD power lines (source) (1) | 120 | mA |
| Σ I VSS | Total current out of sum of all VSS ground lines (sink) (1) | -120 | mA |
| I VDD(PIN) | Maximum current into each VDD power pin (source) (1) | 100 | mA |
| I VSS(PIN) | Maximum current out of each VSS ground pin (sink) (1) | -100 | mA |
| I IO(PIN) | Output current sunk by any I/O and control pin | 25 | mA |
| I IO(PIN) | Output current source by any I/O and control pin | -25 | mA |
| Σ I IO(PIN) | Total output current sunk by sum of all I/Os and control pins (2) | 80 | mA |
| Σ I IO(PIN) | Total output current sourced by sum of all I/Os and control pins (2) | -80 | mA |
| Σ I IO(PIN) | Total output current sourced by sum of all I/Os supplied by VDDIO2 | -40 | mA |
| I INJ(PIN) (3) | Injected current on FT and FTf pins | -5/+0 (4) | mA |
| I INJ(PIN) (3) | Injected current on TC and RST pin | ± 5 | mA |
| I INJ(PIN) (3) | Injected current on TTa pins (5) | ± 5 | mA |
| Σ I INJ(PIN) | Total injected current (sum of all I/O and control pins) (6) | ± 25 | mA |
- This current consumption must be correctly distributed over all I/Os and control pins. The total output current must not be sunk/sourced between two consecutive power supply pins referring to high pin count QFP packages.
- A positive injection is induced by V IN > V DDIOx while a negative injection is induced by V IN < V SS . I INJ(PIN) must never be exceeded. Refer to Table 18: Voltage characteristics for the maximum allowed input voltage values.
- Positive injection is not possible on these I/Os and does not occur for input voltages lower than the specified maximum value.
- On these I/Os, a positive injection is induced by V IN > V DDA . Negative injection disturbs the analog performance of the device. See note (2) below Table 56: ADC accuracy .
- When several inputs are submitted to a current injection, the maximum Σ I INJ(PIN) is the absolute sum of the positive and negative injected currents (instantaneous values).
Table 20. Thermal characteristics
| Symbol | Ratings | Value | Unit |
|---|---|---|---|
| T STG | Storage temperature range | -65 to +150 | °C |
| T J | Maximum junction temperature | 150 | °C |
Table 20. Thermal characteristics
90
Thermal Information
The maximum chip junction temperature (T J max) must never exceed the values given in Table 21: General operating conditions .
The maximum chip-junction temperature, T J max, in degrees Celsius, may be calculated using the following equation:
Package Information
In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK ® packages, depending on their level of environmental compliance. ECOPACK ® specifications, grade definitions and product status are available at: www.st.com . ECOPACK ® is an ST trademark.
Related Variants
The following components are covered by the same datasheet.
| Part Number | Manufacturer | Package |
|---|---|---|
| STM32F042C4 | STMicroelectronics | — |
| STM32F042C6 | STMicroelectronics | — |
| STM32F042F4 | STMicroelectronics | — |
| STM32F042F6 | STMicroelectronics | — |
| STM32F042G6 | STMicroelectronics | — |
| STM32F042K4 | STMicroelectronics | — |
| STM32F042K6 | STMicroelectronics | — |
| STM32F042K6T6 | STMicroelectronics | 32-LQFP |
| STM32F042T4 | STMicroelectronics | — |
| STM32F042T6 | STMicroelectronics | — |
| STM32F042X | STMicroelectronics | — |
Get structured datasheet data via API
Get started free