STM32F030F4

Part: STM32F030x4, STM32F030x6, STM32F030x8, STM32F030xC

Type: Value-line ARM-based 32-bit MCU

Description: 32-bit ARM Cortex-M0 CPU up to 48 MHz, with 16 to 256 KB Flash, 4 to 32 KB SRAM, 2.4-3.6 V operation, and various communication interfaces.

Operating Conditions:

• Supply voltage: 2.4 V to 3.6 V
• Operating temperature: -40 to +85 °C
• Max CPU frequency: 48 MHz

Absolute Maximum Ratings:

• Max supply voltage: 4.0 V
• Max junction temperature: 125 °C
• Max storage temperature: 150 °C

Key Specs:

• Core: ARM 32-bit Cortex-M0 CPU
• CPU frequency: Up to 48 MHz
• Flash memory: 16 to 256 Kbytes
• SRAM: 4 to 32 Kbytes
• ADC: One 12-bit, 1.0 μs, up to 16 channels
• I/Os: Up to 55 fast I/Os, up to 55 I/Os with 5V tolerant capability
• I2C interfaces: Up to two, one or two with Fast Mode Plus (1 Mbit/s) support
• SPI interfaces: Up to two, 18 Mbit/s
• Run mode current consumption: 14.0 mA (max, VDD=3.6V, 48 MHz, Flash)

Features:

• CRC calculation unit
• Power-on/Power down reset (POR/PDR)
• Low power modes: Sleep, Stop, Standby
• 5-channel DMA controller
• Calendar RTC with alarm and periodic wakeup
• Independent and system watchdog timers
• Serial wire debug (SWD)

Package:

• LQFP64 (10x10 mm)
• LQFP48 (7x7 mm)
• LQFP32 (7x7 mm)
• TSSOP20 (6.4x4.4 mm)

• Core: ARM ® 32-bit Cortex ® -M0 CPU, frequency up to 48 MHz
• Memories
• -16 to 256 Kbytes of Flash memory
• -4 to 32 Kbytes of SRAM with HW parity
• CRC calculation unit
• Reset and power management
• -Digital & I/Os supply: V DD = 2.4 V to 3.6 V
• -Analog supply: V DDA = V DD to 3.6 V
• -Power-on/Power down reset (POR/PDR)
• -Low power modes: Sleep, Stop, Standby
• Clock management
• -4 to 32 MHz crystal oscillator
• -32 kHz oscillator for RTC with calibration
• -Internal 8 MHz RC with x6 PLL option
• -Internal 40 kHz RC oscillator
• Up to 55 fast I/Os
• -All mappable on external interrupt vectors
• -Up to 55 I/Os with 5V tolerant capability
• 5-channel DMA controller
• One 12-bit, 1.0 μs ADC (up to 16 channels)
• -Conversion range: 0 to 3.6 V
• -Separate analog supply: 2.4 V to 3.6 V
• Calendar RTC with alarm and periodic wakeup from Stop/Standby
• 11 timers
• -One 16-bit advanced-control timer for six-channel PWM output
• -Up to seven 16-bit timers, with up to four IC/OC, OCN, usable for IR control decoding
• -Independent and system watchdog timers
• -SysTick timer

Figure 3. LQFP64 64-pin package pinout (top view), for STM32F030x4/6/8 devices

Figure 4. LQFP64 64-pin package pinout (top view), for STM32F030RC devices

Figure 5. LQFP48 48-pin package pinout (top view), for STM32F030x4/6/8 devices

Figure 6. LQFP48 48-pin package pinout (top view), for STM32F030CC devices

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Figure 7. LQFP32 32-pin package pinout (top view)

Figure 8. TSSOP20 20-pin package pinout (top view)

Table 10. Legend/abbreviations used in the pinout table

Table 11. STM32F030x4/6/8/C pin definitions

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Table 11. STM32F030x4/6/8/C pin definitions (continued)

Table 11. STM32F030x4/6/8/C pin definitions (continued)

Table 11. STM32F030x4/6/8/C pin definitions (continued)

Table 11. STM32F030x4/6/8/C pin definitions (continued)

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Table 11. STM32F030x4/6/8/C pin definitions (continued)

Table 11. STM32F030x4/6/8/C pin definitions (continued)

Table 11. STM32F030x4/6/8/C pin definitions (continued)

Table 11. STM32F030x4/6/8/C pin definitions (continued)

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Table 11. STM32F030x4/6/8/C pin definitions (continued)

1. PC13, PC14 and PC15 are supplied through the power switch. Since the switch only sinks a limited amount of current (3 mA), the use of GPIOs PC13 to PC15 in output mode is limited:

• These GPIOs must not be used as current sources (e.g. to drive an LED).
• The speed should not exceed 2 MHz with a maximum load of 30 pF.

1. This feature is available on STM32F030x6 and STM32F030x4 devices only.
2. This feature is available on STM32F030x8 devices only.
3. For STM32F030x4/6/8 devices only.
4. For STM32F030xC devices only.
5. On LQFP32 package, PB2 and PB8 should be treated as unconnected pins (even when they are not available on the package, they are not forced to a defined level by hardware).
6. After reset, these pins are configured as SWDIO and SWCLK alternate functions, and the internal pull-up on SWDIO pin and internal pull-down on SWCLK pin are activated.

Table 12. Alternate functions selected through GPIOA_AFR registers for port A

Table 12. Alternate functions selected through GPIOA_AFR registers for port A

Table 12. Alternate functions selected through GPIOA_AFR registers for port A

Table 12. Alternate functions selected through GPIOA_AFR registers for port A (continued)

1. This feature is available on STM32F030x4 and STM32F030x6 devices.

2. This feature is available on STM32F030x8 devices.

Table 13. Alternate functions selected through GPIOB_AFR registers for port B

Table 13. Alternate functions selected through GPIOB_AFR registers for port B

Table 13. Alternate functions selected through GPIOB_AFR registers for port B (continued)

1. This feature is available on STM32F030x4 and STM32F030x6 devices.

2. This feature is available on STM32F030x8 devices.

Table 14. Alternate functions selected through GPIOC_AFR registers for port C

Table 15. Alternate functions selected through GPIOD_AFR registers for port D

Table 16. Alternate functions selected through GPIOF_AFR registers for port F

Table 16. Alternate functions selected through GPIOF_AFR registers for port F

The definition and values of input/output AC characteristics are given in Figure 20 and Table 48 , respectively.

Unless otherwise specified, the parameters given are derived from tests performed under the ambient temperature and supply voltage conditions summarized in Table 21: General operating conditions .

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Table 48. I/O AC characteristics (1)(2)

1. Guaranteed by design, not tested in production.

2. The maximum frequency is defined in Figure 20 .

3. When Fm+ configuration is set, the I/O speed control is bypassed. Refer to the STM32F0xxxx reference manual RM0360 for a detailed description of Fm+ I/O configuration.

Figure 20. I/O AC characteristics definition

Stresses above the absolute maximum ratings listed in Table 18: Voltage characteristics , Table 19: Current characteristics and Table 20: Thermal characteristics may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these conditions is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability.

Table 18. Voltage characteristics (1)

Table 19. Current characteristics

1. This current consumption must be correctly distributed over all I/Os and control pins. The total output current must not be sunk/sourced between two consecutive power supply pins referring to high pin count QFP packages.
2. A positive injection is induced by V IN > V DDIOx while a negative injection is induced by V IN < V SS . I INJ(PIN) must never be exceeded. Refer to Table 18: Voltage characteristics for the maximum allowed input voltage values.
3. Positive injection is not possible on these I/Os and does not occur for input voltages lower than the specified maximum value.
4. On these I/Os, a positive injection is induced by V IN > V DDA . Negative injection disturbs the analog performance of the device. See note (2) below Table 52: ADC accuracy .
5. When several inputs are submitted to a current injection, the maximum Σ I INJ(PIN) is the absolute sum of the positive and negative injected currents (instantaneous values).

Table 20. Thermal characteristics

The maximum chip junction temperature (T J max) must never exceed the values given in Table 21: General operating conditions .

The maximum chip-junction temperature, T J max, in degrees Celsius, may be calculated using the following equation:

In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com . ECOPACK is an ST trademark.