STM32C011F4P6
MicrocontrollerThe STM32C011F4P6 is a microcontroller from STMicroelectronics. View the full STM32C011F4P6 datasheet below including electrical characteristics, absolute maximum ratings.
Manufacturer
STMicroelectronics
Category
Microcontrollers (MCU)Overview
Part: STM32C011x4/x6
Type: Arm Cortex-M0+ 32-bit MCU
Description: 32-bit Arm Cortex-M0+ MCU at up to 48 MHz with up to 32 KB Flash and 6 KB SRAM, featuring multiple communication interfaces, timers, and a 12-bit ADC.
Operating Conditions:
- Supply voltage: 2.0–3.6 V
- Operating temperature: –40°C to 85°C/105°C/125°C
- Max CPU frequency: 48 MHz
Absolute Maximum Ratings:
- Max supply voltage: 4.0 V
- Max total supply current: 120 mA
- Max junction temperature: 150 °C
Key Specs:
- Core: Arm 32-bit Cortex-M0+ CPU
- CPU frequency: Up to 48 MHz
- Flash memory: Up to 32 Kbytes with protection
- SRAM: 6 Kbytes with HW parity check
- ADC: 12-bit, 0.4 μs, up to 13 external channels, 0 to 3.6 V conversion range
- I/Os: Up to 18 fast I/Os, multiple 5 V-tolerant
- I2C: One interface, Fast-mode Plus (1 Mbit/s), supports SMBus/PMBus
- USART: Two interfaces, with master/slave synchronous SPI, one supporting ISO7816, LIN, IrDA
- SPI: One interface, 24 Mbit/s, 4- to 16-bit programmable bitframe, multiplexed with I2S
Features:
- CRC calculation unit
- Power-on/Power-down reset (POR/PDR)
- Programmable Brownout reset (BOR)
- Low-power modes: Sleep, Stop, Standby, Shutdown
- 4 to 48 MHz crystal oscillator
- 32 kHz crystal oscillator with calibration
- Internal 48 MHz RC oscillator (±1 %)
- Internal 32 kHz RC oscillator (±5 %)
- 3-channel DMA controller with flexible mapping
- 8 timers: 16-bit for advanced motor control, four 16-bit general-purpose, two watchdogs, SysTick timer
- Calendar RTC with alarm
- Serial wire debug (SWD)
- All packages ECOPACK 2 compliant
Package:
- SO8N
- WLCSP12
- TSSOP20
- UFQFPN20
Features
- Core: Arm ® 32-bit Cortex ® -M0+ CPU, frequency up to 48 MHz
- -40°C to 85°C/105°C/125°C operating temperature
- Memories
- -Up to 32 Kbytes of flash memory with protection
- -6 Kbytes of SRAM with HW parity check
- CRC calculation unit
- Reset and power management
- -Voltage range: 2.0 V to 3.6 V
- -Power-on/Power-down reset (POR/PDR)
- -Programmable Brownout reset (BOR)
- -Low-power modes: Sleep, Stop, Standby, Shutdown
- Clock management
- -4 to 48 MHz crystal oscillator
- -32 kHz crystal oscillator with calibration
- -Internal 48 MHz RC oscillator (±1 %)
- -Internal 32 kHz RC oscillator (±5 %)
- Up to 18 fast I/Os
- -All mappable on external interrupt vectors
- -Multiple 5 V-tolerant I/Os
- 3-channel DMA controller with flexible mapping
- 12-bit, 0.4 μs ADC (up to 13 ext. channels) -Conversion range: 0 to 3.6 V
- 8 timers: 16-bit for advanced motor control, four 16-bit general-purpose, two watchdogs, SysTick timer
- Calendar RTC with alarm
Pin Configuration
Figure 3. STM32C011JxM SO8N pinout
Figure 4. STM32C011DxY WLCSP12 ballout
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Figure 5. STM32C011FxP TSSOP20 pinout
- 1 PB7
- 2 PC14-OSCX_IN
- 3 PC15-OSCX_OUT
- 4 VDD/VDDA
- 5 VSS/VSSA
- 6 PF2-NRST
- 7 PA0
- 8 PA1
- 9 PA2
- 10 PA3
Figure 6. STM32C011FxU UFQFPN20 pinout
Figure 5. STM32C011FxP TSSOP20 pinout
Table 11. Terms and symbols used in Table 12
| Column | Symbol | Definition |
|---|---|---|
| Pin name | Terminal name corresponds to its by-default function at reset, unless otherwise specified in parenthesis under the pin name. | Terminal name corresponds to its by-default function at reset, unless otherwise specified in parenthesis under the pin name. |
| Pin type | S | Supply pin |
| Pin type | I | Input only pin |
| Pin type | I/O | Input / output pin |
| I/O structure | FT | 5 V tolerant I/O |
| I/O structure | RST | Bidirectional reset pin with embedded weak pull-up resistor |
| I/O structure | Options for FT I/Os | Options for FT I/Os |
| I/O structure | _f | I/O, Fm+ capable |
| I/O structure | _a | I/O, with analog switch function |
Table 11. Terms and symbols used in Table 12
Table 11. Terms and symbols used in Table 12 (continued)
| Column | Column | Symbol | Definition |
|---|---|---|---|
| Note | Note | Upon reset, all I/Os are set as analog inputs, unless otherwise specified. | Upon reset, all I/Os are set as analog inputs, unless otherwise specified. |
| Pin functions | Alternate functions | Functions selected through GPIOx_AFR registers | Functions selected through GPIOx_AFR registers |
| Pin functions | Additional functions | Functions directly selected/enabled through peripheral registers | Functions directly selected/enabled through peripheral registers |
Table 12. Pin assignment and description
| Pin | Pin | Pin | Pin | Pin name (function upon reset) | Pin type | I/O structure | Note | Alternate functions | Additional functions |
|---|---|---|---|---|---|---|---|---|---|
| SO8N | WLCSP12 | TSSOP20 | UFQFPN20 | ||||||
| 1 | B3 | 2 | 20 | PC14- OSCX_IN (PC14) | I/O | FT | - | USART1_TX, TIM1_ETR, TIM1_BKIN2, IR_OUT, USART2_RTS_DE_CK,TIM17_CH1, TIM3_CH2, I2C1_SDA, EVENTOUT | OSCX_IN |
| 8 | A4 | 3 | 1 | PC15- OSCX_OUT (PC15) | I/O | FT | - | OSC32_EN, OSC_EN, TIM1_ETR, TIM3_CH3 | OSCX_OUT |
| 2 | C4 | 4 | 2 | VDD/VDDA | S | - | - | - | - |
| 3 | E4 | 5 | 3 | VSS/VSSA | S | - | - | - | - |
| 4 | F3 | 6 | 4 | PF2-NRST | I/O | - | - | MCO, TIM1_CH4 | NRST |
| 4 | F3 | 7 | 5 | PA0 | I/O | FT | - | USART2_CTS, TIM16_CH1, USART1_TX, TIM1_CH1 | ADC_IN0, WKUP1 |
| 4 | F3 | 8 | 6 | PA1 | I/O | FT | - | SPI1_SCK/I2S1_CK, USART2_RTS_DE_CK,TIM17_CH1, USART1_RX, TIM1_CH2, I2C1_SMBA, EVENTOUT | ADC_IN1 |
| 4 | F3 | 9 | 7 | PA2 | I/O | FT | - | SPI1_MOSI/I2S1_SD, USART2_TX, TIM16_CH1N, TIM3_ETR, TIM1_CH3 | ADC_IN2, WKUP4,LSCO |
| - | F1 | 10 | 8 | PA3 | I/O | FT | - | USART2_RX, TIM1_CH1N, TIM1_CH4, EVENTOUT | ADC_IN3 |
| - | F1 | 11 | 9 | PA4 | I/O | FT | - | SPI1_NSS/I2S1_WS, USART2_TX, TIM1_CH2N, TIM14_CH1, TIM17_CH1N, EVENTOUT | ADC_IN4, RTC_TS, RTC_OUT1, WKUP2 |
Table 12. Pin assignment and description
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Table 12. Pin assignment and description (continued)
| Pin | Pin | Pin | Pin | Pin name (function upon reset) | Pin type | structure | Alternate functions | Additional | |
|---|---|---|---|---|---|---|---|---|---|
| SO8N | WLCSP12 | TSSOP20 | UFQFPN20 | I/O | Note | functions | |||
| - | F1 | 12 | 10 | PA5 | I/O | FT | - | SPI1_SCK/I2S1_CK, USART2_RX, TIM1_CH3N, TIM1_CH1, EVENTOUT | ADC_IN5 |
| - | F1 | 13 | 11 | PA6 | I/O | FT | - | SPI1_MISO/I2S1_MCK, TIM3_CH1, TIM1_BKIN, TIM16_CH1 | ADC_IN6 |
| - | E2 | 14 | 12 | PA7 | I/O | FT | - | SPI1_MOSI/I2S1_SD, TIM3_CH2, TIM1_CH1N, TIM14_CH1, TIM17_CH1 | ADC_IN7 |
| 5 | D1 | 15 | 13 | PA8 | I/O | FT | - | MCO, USART2_TX, TIM1_CH1, EVENTOUT, SPI1_NSS/I2S1_WS, TIM1_CH2N, TIM1_CH3N, TIM3_CH3, TIM3_CH4, TIM14_CH1, USART1_RX, MCO2 | ADC_IN8 |
| - | - | - | - | PA9 | I/O | FT | (1) | MCO, USART1_TX, TIM1_CH2, TIM3_ETR, I2C1_SCL, EVENTOUT | - |
| - | - | - | - | PA10 | I/O | FT | (1) | USART1_RX, TIM1_CH3, MCO2, TIM17_BKIN, I2C1_SDA, EVENTOUT | - |
| 5 | D1 | 16 | 14 | PA11 [PA9] | I/O | FT | (1) | SPI1_MISO/I2S1_MCK, USART1_CTS, TIM1_CH4, TIM1_BKIN2 | ADC_IN11 |
| 6 | E2 | 17 | 15 | PA12 [PA10] | I/O | FT | (1) | SPI1_MOSI/I2S1_SD, USART1_RTS_DE_CK, TIM1_ETR, I2S_CKIN | ADC_IN12 |
| 7 | B1 | 18 | 16 | PA13 | I/O | FT | (2) | SWDIO, IR_OUT, TIM3_ETR, USART2_RX, EVENTOUT | ADC_IN13 |
| 8 | C2 | 19 | 17 | PA14-BOOT0 | I/O | FT | (2) | SWCLK, USART2_TX, EVENTOUT, SPI1_NSS/I2S1_WS, USART2_RX, TIM1_CH1, MCO2, USART1_RTS_DE_CK | ADC_IN14, BOOT0 |
Table 12. Pin assignment and description (continued)
Table 12. Pin assignment and description (continued)
| Pin | Pin | Pin | Pin | Pin name (function upon reset) |
|---|---|---|---|---|
| SO8N | WLCSP12 | TSSOP20 | UFQFPN20 | |
| 8 | A2 | 20 | 18 | PB6 |
| 1 | D3 | 1 | 19 | PB7 |
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Table 13. Port A alternate function mapping (AF0 to AF7)
Table 13. Port A alternate function mapping (AF0 to AF7)
| Port | AF0 | AF1 | AF2 | AF3 | AF4 | AF5 | AF6 | AF7 |
|---|---|---|---|---|---|---|---|---|
| PA0 | - | USART2_CTS | TIM16_CH1 | - | USART1_TX | TIM1_CH1 | - | - |
| PA1 | SPI1_SCK/I2S1_ CK | USART2_RTS_ DE_CK | TIM17_CH1 | - | USART1_RX | TIM1_CH2 | I2C1_SMBA | EVENTOUT |
| PA2 | SPI1_MOSI/I2S1 _SD | USART2_TX | TIM16_CH1N | TIM3_ETR | - | TIM1_CH3 | - | - |
| PA3 | - | USART2_RX | TIM1_CH1N | - | - | TIM1_CH4 | - | EVENTOUT |
| PA4 | SPI1_NSS/I2S1_ WS | USART2_TX | TIM1_CH2N | - | TIM14_CH1 | TIM17_CH1N | - | EVENTOUT |
| PA5 | SPI1_SCK/I2S1_ CK | USART2_RX | TIM1_CH3N | - | - | TIM1_CH1 | - | EVENTOUT |
| PA6 | SPI1_MISO/I2S1 _MCK | TIM3_CH1 | TIM1_BKIN | - | - | TIM16_CH1 | - | - |
| PA7 | SPI1_MOSI/I2S1 _SD | TIM3_CH2 | TIM1_CH1N | - | TIM14_CH1 | TIM17_CH1 | - | - |
| PA8 | MCO | USART2_TX | TIM1_CH1 | - | - | - | - | EVENTOUT |
| PA9 | MCO | USART1_TX | TIM1_CH2 | TIM3_ETR | - | I2C1_SCL | EVENTOUT | |
| PA10 | - | USART1_RX | TIM1_CH3 | MCO2 | - | TIM17_BKIN | I2C1_SDA | EVENTOUT |
| PA11 | SPI1_MISO/I2S1 _MCK | USART1_CTS | TIM1_CH4 | - | - | TIM1_BKIN2 | - | - |
| PA12 | SPI1_MOSI/I2S1 _SD | USART1_RTS_ DE_CK | TIM1_ETR | - | - | I2S_CKIN | - | - |
| PA13 | SWDIO | IR_OUT | - | TIM3_ETR | USART2_RX | - | - | EVENTOUT |
| PA14 | SWCLK | USART2_TX | - | - | - | - | - | EVENTOUT |
Table 13. Port A alternate function mapping (AF0 to AF7)
Electrical Characteristics
The definition and values of input/output AC characteristics are given in Figure 18 and Table 51 , respectively.
Unless otherwise specified, the parameters given are derived from tests performed under the ambient temperature and supply voltage conditions summarized in Table 23: General operating conditions .
Table 51. I/O AC characteristics (1)(2)
| Speed | Symbol | Parameter | Conditions | Min | Max | Unit |
|---|---|---|---|---|---|---|
| 00 | Fmax | Maximum frequency | C=50 pF, 2.7 V ≤ V DD ≤ 3.6 V | - | 2 | MHz |
| 00 | Fmax | Maximum frequency | C=50 pF, 2 V ≤ V DD ≤ 2.7 V | - | 0.35 | MHz |
| 00 | Fmax | Maximum frequency | C=10 pF, 2.7 V ≤ V DD ≤ 3.6 V | - | 3 | MHz |
| 00 | Fmax | Maximum frequency | C=10 pF, 2 V ≤ V DD ≤ 2.7 V | - | 0.45 | MHz |
| 00 | Tr/Tf | Output rise and fall time (3) | C=50 pF,2.7 V ≤ V DD ≤ 3.6 V | - | 100 | ns |
| 00 | Tr/Tf | Output rise and fall time (3) | C=50 pF, 2 V ≤ V DD ≤ 2.7 V | - | 225 | ns |
| 00 | Tr/Tf | Output rise and fall time (3) | C=10 pF, 2.7 V ≤ V DD ≤ 3.6 V | - | 75 | ns |
| 00 | Tr/Tf | Output rise and fall time (3) | C=10 pF, 2 V ≤ V DD ≤ 2.7 V | - | 150 | ns |
Table 51. I/O AC characteristics (1)(2)
Table 51. I/O AC characteristics (1)(2) (continued)
| Speed | Symbol | Parameter | Conditions | Min | Max | Unit |
|---|---|---|---|---|---|---|
| 01 | C=50 pF, 2.7 V ≤ V DD ≤ 3.6 V | - | 10.00 | MHz | ||
| 01 | Fmax | Maximum frequency | C=50 pF, 2 V ≤ V DD ≤ 2.7 V | - | 2.00 | MHz |
| 01 | C=10 pF, 2.7 V ≤ V DD ≤ 3.6 V | - | 15.00 | MHz | ||
| 01 | C=10 pF, 2 V ≤ V DD ≤ 2.7 V | - | 2.50 | MHz | ||
| Tr/Tf | rise and fall time (3) | C=50 pF, 2.7 V ≤ V DD ≤ 3.6 V | - | 30.00 | ns | |
| Tr/Tf | rise and fall time (3) | C=50 pF, 2 V ≤ V DD ≤ 2.7 V | - | 60.00 | ns | |
| Tr/Tf | rise and fall time (3) | C=10 pF, 2.7 V ≤ V DD ≤ 3.6 V | - | 15.00 | ns | |
| Tr/Tf | rise and fall time (3) | C=10 pF, 2 V ≤ V DD ≤ 2.7 V | - | 30.00 | ns | |
| 10 | Fmax | Maximum frequency C=50 C=50 | pF, 2.7 V ≤ V DD ≤ 3.6 V | - | 30.00 | MHz |
| 10 | Fmax | Maximum frequency C=50 C=50 | pF, 2 V ≤ V DD ≤ 2.7 V | - | 15.00 | MHz |
| 10 | Fmax | Maximum frequency C=50 C=50 | C=10 pF, 2.7 V ≤ V DD ≤ 3.6 V | - | 60.00 (4) | MHz |
| 10 | Fmax | Maximum frequency C=50 C=50 | C=10 pF, 2 V ≤ V DD ≤ 2.7 V | - | 30.00 | MHz |
| 10 | Tr/Tf | rise and fall time (3) | C=50 pF, 2.7 V ≤ V DD ≤ 3.6 V | - | 11.00 | ns |
| 10 | Tr/Tf | rise and fall time (3) | C=50 pF, 2 V ≤ V DD ≤ 2.7 V | - | 22.00 | ns |
| 10 | Tr/Tf | rise and fall time (3) | C=10 pF, 2.7 V ≤ V DD ≤ 3.6 V | - | 4.00 | ns |
| 10 | Tr/Tf | rise and fall time (3) | C=10 pF, 2 V ≤ V DD ≤ 2.7 V | - | 8.00 | ns |
| 11 | Fmax | Maximum frequency | C=30 pF, 2.7 V ≤ V DD ≤ 3.6 V | - | 60.00 (4) | MHz |
| 11 | Fmax | Maximum frequency | C=30 pF, 2 V ≤ V DD ≤ 2.7 V | - | 30.00 | MHz |
| 11 | Fmax | Maximum frequency | C=10 pF, 2.7 V ≤ V DD ≤ 3.6 V | - | 80.00 (4) | MHz |
| 11 | Fmax | Maximum frequency | C=10 pF, 2 V ≤ V DD ≤ 2.7 V | - | 40.00 | MHz |
| rise and fall time (3) C=30 C=30 | pF, 2.7 V ≤ V DD ≤ 3.6 V | - | 5.50 | ns | ||
| Tr/Tf | rise and fall time (3) C=30 C=30 | pF, 2 V ≤ V DD ≤ 2.7 V | - | 11.00 | ns | |
| rise and fall time (3) C=30 C=30 | C=10 pF, 2.7 V ≤ V DD ≤ 3.6 V | - | 2.50 | ns | ||
| rise and fall time (3) C=30 C=30 | C=10 pF, 2 V ≤ V DD ≤ 2.7 V | - | 5.00 | ns |
- Specified by design - Not tested in production.
- The fall time is defined between 70% and 30% of the output waveform, according to I 2 C specification.
- This value represents the I/O capability but the maximum system frequency is limited to 48 MHz.
79
Figure 18. I/O AC characteristics definition (1)
- Refer to Table 51: I/O AC characteristics .
Absolute Maximum Ratings
Stresses above the absolute maximum ratings listed in Table 20 , Table 21 and Table 22 may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these conditions is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability.
All voltages are defined with respect to V SS .
Table 20. Voltage characteristics
| Symbol | Ratings | Min | Max | Unit |
|---|---|---|---|---|
| V DD - V SS | External supply voltage | -0.3 | 4.0 | |
| V IN (1) | Input voltage on pin | -0.3 | V DD + 4.0 (2) | V |
Table 21. Current characteristics
| Symbol | Ratings | Max | Unit |
|---|---|---|---|
| I VDD/VDDA | Current into VDD/VDDA power pin (source) | 100 | mA |
| I VSS/VSSA | Current out of VSS/VSSA ground pin (sink) | 100 | mA |
| I IO(PIN) | Output current sunk by any I/O and control pin | 20 | mA |
| I IO(PIN) | Output current sourced by any I/O and control pin | 20 | mA |
| ∑ I (PIN) | Total output current sunk by sum of all I/Os and control pins (1) | 80 | mA |
| ∑ I (PIN) | Total output current sourced by sum of all I/Os and control pins (1) | 80 | mA |
| I INJ(PIN) (1)(2) | Injected current on a FT_xx pin | -5 / 0 | mA |
| ∑ I INJ(PIN) | Total injected current (sum of all I/Os and control pins) (3) | -25 | mA |
Table 21. Current characteristics
79
- A positive injection is induced by V IN > V DDIOx while a negative injection is induced by V IN < V SS . I INJ(PIN) must never be exceeded. Refer also to Table 20: Voltage characteristics for the maximum allowed input voltage values.
- When several inputs are submitted to a current injection, the maximum ∑ |I INJ(PIN) | is the absolute sum of the negative injected currents (instantaneous values).
Thermal Information
| Symbol | Ratings | Value | Unit |
|---|---|---|---|
| T STG | Storage temperature range | -65 to +150 | °C |
| T J | Maximum junction temperature | 130 | °C |
Package Information
In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com . ECOPACK is an ST trademark.
Related Variants
The following components are covered by the same datasheet.
| Part Number | Manufacturer | Package |
|---|---|---|
| STM32C011 | STMicroelectronics | — |
| STM32C011D6 | STMicroelectronics | — |
| STM32C011F4 | STMicroelectronics | — |
| STM32C011F6 | STMicroelectronics | — |
| STM32C011J4 | STMicroelectronics | — |
| STM32C011J6 | STMicroelectronics | — |
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