SI5351A/C
I2C-Programmable Any-Frequency CMOS Clock Generator + VCXOThe SI5351A/C is a i2c-programmable any-frequency cmos clock generator + vcxo from Silicon Labs. View the full SI5351A/C datasheet below including electrical characteristics, absolute maximum ratings.
Manufacturer
Silicon Labs
Category
I2C-Programmable Any-Frequency CMOS Clock Generator + VCXO
Overview
Part: Si5351A/B/C — Silicon Labs Type: I2C-Programmable Any-Frequency CMOS Clock Generator + VCXO
Description: The Si5351 is an I2C configurable clock generator capable of generating up to 8 non-integer-related frequencies from 8 kHz to 160 MHz with 0 ppm error, using a PLL/VCXO + high resolution MultiSynth fractional divider architecture.
Operating Conditions:
- Supply voltage (VDD): 2.25–3.6 V
- Output buffer voltage (VDDOx): 1.71–3.6 V
- Operating temperature: -40 to 85 °C
- CLKIN frequency range: 10–100 MHz
- Output frequency range: 0.008–160 MHz
Absolute Maximum Ratings:
- Max supply voltage (VDD): 3.8 V
- Max input voltage (CLKIN, SCL, SDA): 3.8 V
- Max junction temperature: 150 °C
Key Specs:
- Core supply current (3 outputs enabled): 22 mA (typ)
- Core supply current (8 outputs enabled): 27 mA (typ)
- Core supply current (Power Down): 20 μA (max)
- Output buffer supply current (per output, CL=5 pF): 2.2 mA (typ)
- Output period jitter: 100 ps pk-pk (max)
- RMS phase jitter (12 kHz-20 MHz): 11 ps rms (max)
- I2C standard mode speed: 100 kbps
- I2C fast mode speed: 400 kbps
Features:
- Generates up to 8 non-integer-related frequencies from 8 kHz to 160 MHz
- I2C user definable configuration
- Exact frequency synthesis at each output (0 ppm error)
- Highly linear VCXO (Si5351B only)
- Optional clock input (CLKIN)
- Low output period jitter: 100 ps pp
- Glitchless frequency changes
- Separate voltage supply pins: Core VDD (2.5 or 3.3 V), Output VDDO (1.8, 2.5, or 3.3 V)
- Configurable spread spectrum selectable at each output
- Operates from a low-cost, fixed frequency crystal: 25 or 27 MHz
- Supports static phase offset
- Programmable rise/fall time control
Applications:
- HDTV, DVD/Blu-ray, set-top box
- Audio/video equipment, gaming
- Printers, scanners, projectors
- Residential gateways
- Networking/communication
- Servers, storage
- XO replacement
Package:
- 10-MSOP (3 outputs)
- 24-QSOP (8 outputs)
- 20-QFN (4x4 mm) (8 outputs)
Features
- Generates up to 8 non-integer-related frequencies from 8 kHz to 160 MHz
- I 2 C user definable configuration
- Exact frequency synthesis at each output (0 ppm error)
- Highly linear VCXO
- Optional clock input (CLKIN)
- Low output period jitter: 100 ps pp
- Glitchless frequency changes
- Separate voltage supply pins:
- Core VDD: 2.5 or 3.3 V
- Output VDDO: 1.8, 2.5, or 3.3 V
- Excellent PSRR eliminates external power supply filtering
- Very low power consumption
- Adjustable output-output delay
- Configurable spread spectrum selectable at each output
- Available in 3 packages types:
- 10-MSOP: 3 outputs
- Operates from a low-cost, fixed frequency crystal: 25 or 27 MHz
- 24-QSOP: 8 outputs
- 20-QFN (4x4 mm): 8 outputs
- Supports static phase offset
- Programmable rise/fall time control
Applications
- HDTV, DVD/Blu-ray, set-top box
- Audio/video equipment, gaming
- Printers, scanners, projectors
Pin Configuration
Table 10. Si5351A Pin Descriptions
Table 10. Si5351A Pin Descriptions
| Pin Name | Pin Number | Pin Number | Pin Type* | Function |
|---|---|---|---|---|
| Pin Name | 20-QFN | 24-QSOP | Pin Type* | Function |
| XA | 1 | 6 | I | Input pin for external crystal. |
| XB | 2 | 7 | I | Input pin for external crystal. |
| CLK0 | 13 | 21 | O | Output clock 0. |
| CLK1 | 12 | 20 | O | Output clock 1. |
| CLK2 | 9 | 15 | O | Output clock 2. |
| CLK3 | 8 | 14 | O | Output clock 3. |
| CLK4 | 19 | 3 | O | Output clock 4. |
| CLK5 | 17 | 1 | O | Output clock 5. |
| CLK6 | 16 | 24 | O | Output clock 6. |
| CLK7 | 15 | 23 | O | Output clock 7. |
| A0 | 3 | 9 | I | I 2 C address bit. |
| SCL | 4 | 10 | I | I 2 C bus serial clock input. Pull-up to VDD core with 1 k |
| SDA | 5 | 11 | I/O | I 2 C bus serial data input. Pull-up to VDD core with 1 k |
| SSEN | 6 | 12 | I | Spread spectrum enable. High = enabled, Low = disabled. |
| OEB | 7 | 13 | I | Output driver enable. Low = enabled, High = disabled. |
| VDD | 20 | 4 | P | Core voltage supply pin. See 6.2. |
| VDDOA | 11 | 18 | P | Output voltage supply pin for CLK0 and CLK1. See 6.2. |
| VDDOB | 10 | 16 | P | Output voltage supply pin for CLK2 and CLK3. See 6.2. |
| VDDOC | 18 | 2 | P | Output voltage supply pin for CLK4 and CLK5. See 6.2. |
| VDDOD | 14 | 22 | P | Output voltage supply pin for CLK6 and CLK7. See 6.2. |
| GND | Center Pad | 5, 8, 17, 19 | P | Ground. Use multiple vias to ensure a solid path to GND. |
Electrical Characteristics
Table 1. Recommended Operating Conditions
| Parameter | Symbol | Test Condition | Min | Typ | Max | Unit |
|---|---|---|---|---|---|---|
| Ambient Temperature | T A | -40 | 25 | 85 | °C | |
| Core Supply Voltage | V DD | 3 | 3.3 | 3.6 | V | |
| Core Supply Voltage | 2.25 | 2.5 | 2.75 | V | ||
| Output Buffer Voltage | V DDOx | 1.71 | 1.8 | 1.89 | V | |
| Output Buffer Voltage | 2.25 | 2.5 | 2.75 | V | ||
| Output Buffer Voltage | 3 | 3.3 | 3.6 | V |
Notes: All minimum and maximum specifications are guaranteed and apply across the recommended operating conditions. Typical values apply at nominal supply voltages and an operating temperature of 25 °C unless otherwise noted. VDD and VDDOx can be operated at independent voltages.
Power supply sequencing for VDD and VDDOx requires that both voltage rails are powered at the same time.
Absolute Maximum Ratings
| Parameter | Symbol | Test Condition | Value | Unit |
|---|---|---|---|---|
| DC Supply Voltage | V DD_max | -0.5 to 3.8 | V | |
| Input Voltage | V IN_CLKIN | CLKIN, SCL, SDA | -0.5 to 3.8 | V |
| Input Voltage | V IN_VC | VC | -0.5 to (VDD+0.3) | V |
| Input Voltage | V IN_XA/B | Pins XA, XB | -0.5 to 1.3 V | V |
| Junction Temperature | T J | -55 to 150 | °C | |
| Soldering Temperature (Pb-free profile) 2 | T PEAK | 260 | °C | |
| Soldering Temperature Time at TPEAK (Pb-free profile) 2 | T P | 20-40 | Sec |
-
Permanent device damage may occur if the absolute maximum ratings are exceeded. Functional operation should be restricted to the conditions as specified in the operational sections of this data sheet. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
-
The device is compliant with JEDEC J-STD-020.
Package Information
Table 14. 24-QSOP Package Dimensions
Table 14. 24-QSOP Package Dimensions
| Dimension | Min | Nom | Max |
|---|---|---|---|
| A | - | - | 1.75 |
| A1 | 0.10 | - | 0.25 |
| b | 0.19 | - | 0.30 |
| c | 0.15 | - | 0.25 |
| D | 8.55 | 8.65 | 8.75 |
| E | 6.00 BSC | 6.00 BSC | 6.00 BSC |
| E1 | 3.81 | 3.90 | 3.99 |
| e | 0.635 BSC | 0.635 BSC | 0.635 BSC |
| L | 0.40 | - | 1.27 |
| L2 | 0.25 BSC | 0.25 BSC | 0.25 BSC |
| q | 0 | - | 8 |
| aaa | 0.10 | 0.10 | 0.10 |
| bbb | 0.17 | 0.17 | 0.17 |
| ccc | 0.10 | 0.10 | 0.10 |
- All dimensions shown are in millimeters (mm) unless otherwise noted.
- Dimensioning and Tolerancing per ANSI Y14.5M-1994.
- This drawing conforms to the JEDEC Solid State Outline MO-137, Variation C
- Recommended card reflow profile is per the JEDEC/IPC J-STD-020 specification for Small Body Components.
Related Variants
The following components are covered by the same datasheet.
| Part Number | Manufacturer | Package |
|---|---|---|
| SI5351 | Skyworks Solutions Inc. | — |
| SI5351A | Skyworks Solutions Inc. | — |
| SI5351A-B-GU | Silicon Labs | — |
| SI5351A/B/C | Skyworks Solutions Inc. | — |
| SI5351B | Skyworks Solutions Inc. | — |
| SI5351C | Skyworks Solutions Inc. | — |
Get structured datasheet data via API
Get started free