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SI4438-C

High-Performance, Low-Current Transceiver

The SI4438-C is a high-performance, low-current transceiver from Silicon Labs. View the full SI4438-C datasheet below including key specifications, electrical characteristics, absolute maximum ratings.

SI4438-C shares its datasheet with SI4438-C2A-GM, whose page lists every part number it covers.

Official SI4438-C datasheet (PDF) — the source this page was extracted from.

Manufacturer

Silicon Labs

Package

QFN-20

SI4438-C Key Specifications

ParameterValue
Data Rate100 bps to 500 kbps
FIFO Size64 byte TX and RX FIFOs
InterfaceSPI
Modulation(G)FSK, OOK
RX Current13.7 mA
TX Current75 mA at +20 dBm, 490 MHz, 3.3 V
Link Budget144 dB
Supply Voltage1.8V to 3.8V
Frequency Range425 MHz to 525 MHz
Standby Current40 nA
Max Output Power+20 dBm
Shutdown Current30 nA
Package Dimensions4x4 mm
Receive Sensitivity-124 dBm
RX Channel Bandwidth1.1 kHz to 850 kHz
Operating Temperature-40°C to 85°C
Preamble Sense Mode Current6 mA average at 1.2 kbps

SI4438-C Overview

Part: Si4438-C2A-GMR — Silicon Laboratories

Type: Sub-GHz ISM Transceiver (EZRadioPRO family)

Description: 425–525 MHz, 1.8–3.8 V (G)FSK/OOK transceiver with up to +20 dBm output power, -124 dBm receive sensitivity, and 13.7 mA RX current, targeted at China smart meters.

Operating Conditions:

  • Supply voltage: 1.8–3.8 V (3.3 V typ)
  • Operating temperature: -40 to +85 °C (ambient)
  • Frequency range: 425–525 MHz
  • Data rate: 0.1–500 kbps (G)FSK, 0.1–120 kbps OOK

Absolute Maximum Ratings:

  • VDD to GND: -0.3 to +3.8 V
  • Instantaneous voltage on TX output pin (RF-peak to GND): -0.3 to +8.0 V
  • Sustained voltage on TX output pin (RF-peak to GND): -0.3 to +6.5 V
  • Voltage on digital control inputs and analog inputs: -0.3 to VDD + 0.3 V
  • Voltage on XIN when using a TCXO: -0.7 to VDD + 0.3 V
  • RX input power: +10 dBm
  • Storage temperature: -55 to +150 °C
  • Max junction temperature (TJMAX): +105 °C (Thermal Operating Characteristics table)

Key Specs:

  • RX current: 13.7 mA typ; TX current: 75 mA typ at +20 dBm, class-E match, 490 MHz, 3.3 V
  • Shutdown current: 30 nA typ; standby: 40 nA typ; sleep (RC oscillator on): 740 nA typ
  • Preamble sense mode current: 6 mA at 1.2 kbps; 10 μA with 1 s wake interval at 50 kbps
  • RX sensitivity (BER < 0.1%, GFSK): -124 dBm at 500 bps; -114 dBm at 9.6 kbps; -108 dBm at 40 kbps; -104 dBm at 100 kbps
  • OOK sensitivity: -108 dBm at 4.8 kbps
  • TX output power range: -20 to +20 dBm (3.3 V, class-E match)
  • Blocking: -77 dB at 1 MHz offset; -84 dB at 8 MHz offset
  • Synthesizer lock time: 50 μs typ; phase noise -109 dBc/Hz at 10 kHz offset, 460 MHz
  • Crystal range: 25–32 MHz; 30 MHz XTAL start-up 300 μs typ
  • Thermal impedance θJA: 25 °C/W

Features:

  • Frequency range 425–525 MHz
  • (G)FSK and OOK modulation
  • Link budget of 144 dB
  • 58 dB adjacent channel selectivity, 75 dB blocking at 1 MHz
  • Preamble Sense Mode
  • Antenna diversity and T/R switch control
  • Configurable packet handler with 64-byte TX and RX FIFOs
  • Auto frequency control (AFC) and automatic gain control (AGC)
  • Low battery detector and temperature sensor
  • IEEE 802.15.4g ready
  • Suitable for China regulatory (State Grid)
  • Footprint- and pin-compatible with Si446x radios

Applications:

  • China smart meters (especially electric meters)

Package:

  • 20-pin QFN

SI4438-C Features

  • Frequency range = 425-525 MHz
  • Receive sensitivity = -124 dBm
  • Modulation
  • (G)FSK
  • OOK
  • Max output power
  • +20 dBm
  • Low active power consumption
  • 14 mA RX
  • Ultra low current powerdown modes
  • 30 nA shutdown, 40 nA standby
  • Data rate = 100 bps to 500 kbps
  • Preamble Sense Mode
  • 6 mA average Rx current at 1.2 kbps
  • Fast wake and hop times
  • Power supply = 1.8 to 3.8 V

SI4438-C Pin Configuration

PinPin NameI/0Description
1SDNIShutdown Input Pin . 0-VDD V digital input. SDNshould be = 0 in all modes except Shutdown mode. When SDN = 1, the chip will be completely shut down, and the contents of the registers will be lost.
2RXpIDifferential RF Input Pins of the LNA. See application schematic for example matching network.
3RXnIDifferential RF Input Pins of the LNA. See application schematic for example matching network.
4TXOTransmit Output Pin. The PA output is an open-drain connection, so the L-C match must supply VDD (+3.3 VDC nominal) to this pin.
5NCIt is recommended to connect this pin to GND per the reference design schematic. Not connected internally to any circuitry.
6VDDVDD+1.8 to +3.8 V Supply Voltage Input to Internal Regulators. The recommended VDD supply voltage is +3.3 V.
7TXRAMPOProgrammable Bias Output with Ramp Capability for External FET PA. See "5.4. Transmitter (TX)" on page 27.
8VDDVDD+1.8 to +3.8 V Supply Voltage Input to Internal Regulators. The recommended VDD supply voltage is +3.3 V.
9GPIO0I/OGeneral Purpose Digital I/O. May be configured through the registers to perform various functions including: Microcontroller Clock Output, FIFO status, POR, Wake-Up timer, Low Battery Detect, TRSW, AntDiversity control, etc.
10GPIO1I/OGeneral Purpose Digital I/O. May be configured through the registers to perform various functions including: Microcontroller Clock Output, FIFO status, POR, Wake-Up timer, Low Battery Detect, TRSW, AntDiversity control, etc.
PinPin NameI/0Description
11nIRQOGeneral Microcontroller Interrupt Status Output. When the Si4438 exhibits any one of the interrupt events, the nIRQ pin will be set low = 0. The Microcontroller can then determine the state of the interrupt by reading the interrupt status. No external resistor pull-up is required, but it may be desirable if multiple interrupt lines are connected.
12SCLKISerial Clock Input. 0-VDD V digital input. This pin provides the serial data clock function for the 4-line serial data bus. Data is clocked into the Si4438 on positive edge transi- tions.
13SDOO0-VDD V Digital Output. Provides a serial readback function of the internal control registers.
14SDIISerial Data Input. 0-VDD V digital input. This pin provides the serial data stream for the 4-line serial data bus.
15nSELISerial Interface Select Input. 0-VDD V digital input. This pin provides the Select/Enable function for the 4-line serial data bus.
16XOUTOCrystal Oscillator Output. Connect to an external 25 to 32 MHz crystal, or leave floating when driving with an external source on XIN.
17XINICrystal Oscillator Input. Connect to an external 25 to 32 MHz crystal, or connect to an external source.
18GNDGNDWhen using a XTAL, leave floating per the reference design schematic. When using a TCXO, connect to TCXO GND which should be separate from the board reference ground plane.
19GPIO2I/OGeneral Purpose Digital I/O. May be configured through the registers to perform various functions, including Microcontroller Clock Output, FIFO status, POR, Wake-Up timer, Low Battery
20GPIO3I/ODetect, TRSW, AntDiversity control, etc.
PKGPADDLE_GNDGNDThe exposed metal paddle on the bottom of the Si4438 supplies the RF and circuit ground(s) for the entire chip. It is very important that a good solder con- nection is made between this exposed metal paddle and the ground plane of the PCB underlying the Si4438.

SI4438-C Electrical Characteristics

Table 1. DC Characteristics *

ParameterSymbolTest ConditionMinTypMaxUnit
Supply Voltage RangeV DD1.83.33.8V
Power Saving ModesI ShutdownRC Oscillator, Main Digital Regulator, and Low Power Digital Regulator OFF-30-nA
Power Saving ModesI StandbyRegister values maintained and RC oscillator/WUT OFF-40-nA
Power Saving ModesI SleepRCRC Oscillator/WUT ON and all register values maintained, and all other blocks OFF-740-nA
Power Saving ModesI SleepXOSleep current using an external 32 kHz crystal.-1.7-μ A
Power Saving ModesI Sensor -LBDLow battery detector ON, register values main- tained, and all other blocks OFF-1-μ A
Power Saving ModesI ReadyCrystal Oscillator and Main Digital Regulator ON, all other blocks OFF-1.8-mA
Preamble Sense Mode CurrentI psmDuty cycling during preamble search, 1.2 kbps, 4 byte preamble-6-mA
Preamble Sense Mode CurrentI psmFixed 1 s wakeup interval, 50 kbps, 5 byte pream- ble-10-μ A
TUNE Mode CurrentI Tune_RXRX Tune-7.6-mA
TUNE Mode CurrentI Tune_TXTX Tune-7.8-mA
RX Mode CurrentI RXH-13.7-mA
TX Mode Current (Si4438)I TX_+20+20 dBm output power, class-E match, 490 MHz, 3.3 V-75-mA

*Note: All minimum and maximum values are guaranteed across the recommended operating conditions of supply voltage and from -40 to +85 °C unless otherwise stated. All typical values apply at VDD = 3.3 V and 25 °C unless otherwise stated.

**Table 1. DC Characteristics ***

Table 2. Synthesizer AC Electrical Characteristics 1

ParameterSymbolTest ConditionMinTypMaxUnit
Synthesizer Frequency Range (Si4438)F SYN425-525MHz
Synthesizer Frequency Resolution 2F RES-525425-525 MHz-14.3-Hz
Synthesizer Settling Timet LOCKMeasured from exiting Ready mode with XOSC running to any frequency. Including VCO Calibration.-50-μ s
Phase NoiseL (f M )F = 10 kHz, 460 MHz--109-dBc/Hz
Phase NoiseL (f M )F = 100 kHz, 460 MHz--111-dBc/Hz
Phase NoiseL (f M )F = 1 MHz, 460 MHz--131-dBc/Hz
Phase NoiseL (f M )F = 10 MHz, 460 MHz--141-dBc/Hz
  1. All minimum and maximum values are guaranteed across the recommended operating conditions of supply voltage and from -40 to +85 °C unless otherwise stated. All typical values apply at VDD = 3.3 V and 25 °C unless otherwise stated.

  2. Default API setting for modulation deviation resolution is double the typical value specified.

SI4438-C Absolute Maximum Ratings

ParameterValueUnit
V DD to GND-0.3, +3.8V
Instantaneous V to GND on TX Output PinRF-peak -0.3, +8.0V
Sustained V to GNDRF-peak on TX Output Pin -0.3, +6.5V
Voltage on DigitalControl Inputs -0.3, V DD + 0.3V
Voltage on Analog Inputs-0.3, V DD + 0.3V
Voltage on XIN Input whenusing a TCXO -0.7, V DD + 0.3V
RX Input Power+10dBm

*Note: Stresses beyond those listed under 'Absolute Maximum Ratings' may cause permanent damage to the device. These are stress ratings only and functional operation of the device at or beyond these ratings in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Power Amplifier may be damaged if switched on without proper load or termination connected. TX matching network design will influence TX V RF-peak on TX output pin. Caution: ESD sensitive device.

SI4438-C Thermal Information

ParameterValueUnit
Operating Ambient Temperature Range T A-40 to +85C
Thermal Impedance JA25C / W
Junction Temperature T JMAX+105C
Storage Temperature Range T STG-55 to +150C

SI4438-C Package Information

Figure 16 illustrates the package details for the Si4438. Table 16 lists the values for the dimensions shown in the illustration.

Figure 16. 20-Pin Quad Flat No-Lead (QFN)

Table 16. Package Dimensions

DimensionMinNomMax
A0.800.850.90
A10.000.020.05
A30.20 REF0.20 REF0.20 REF
b0.180.250.30
D4.00 BSC4.00 BSC4.00 BSC
D22.452.602.75
e0.50 BSC0.50 BSC0.50 BSC
E4.00 BSC4.00 BSC4.00 BSC
E22.452.602.75
L0.300.400.50
aaa0.150.150.15
bbb0.150.150.15
ccc0.100.100.10
ddd0.100.100.10
eee0.080.080.08
  1. All dimensions are shown in millimeters (mm) unless otherwise noted.
  2. Dimensioning and tolerancing per ANSI Y14.5M-1994.
  3. This drawing conforms to the JEDEC Solid State Outline MO-220, Variation VGGD-8.
  4. Recommended card reflow profile is per the JEDEC/IPC J-STD-020 specification for Small Body Components.

Variants on the same datasheet

These parts have exact links to the same datasheet. They are candidates to compare, not verified drop-in replacements; check package, pinout and electrical limits.

Part NumberManufacturerPackage
SI4438Silicon LabsQFN-20
SI4438-C2A-GMSilicon LabsQFN-20 Pb-free
SI4438-C2A-GMRSilicon LabsQFN-20

Other RF / Wireless

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