Part: PCA9548A — Texas Instruments

Type: 8-Channel I2C Switch

Description: An 8-channel bidirectional translating I2C switch with an active-low reset input, supporting voltage-level translation between 1.8-V, 2.5-V, 3.3-V, and 5-V buses, and operating from a 2.3 V to 5.5 V supply.

Operating Conditions:

• Supply voltage: 2.3 V to 5.5 V
• Operating temperature: -40 to 85 °C
• Clock frequency: 0 kHz to 400 kHz

Absolute Maximum Ratings:

• Max supply voltage: 7 V
• Max input voltage: 7 V
• Max storage temperature: 150 °C

Key Specs:

• Input voltage (SCL, SDA): 0.7 × VCC to 6 V (VIH), -0.5 to 0.3 × VCC (VIL)
• Input voltage (A2-A0, RESET): 0.7 × VCC to VCC + 0.5 V (VIH), -0.5 to 0.3 × VCC (VIL)
• ESD HBM: ±2000 V
• ESD CDM: ±1000 V
• Input current: -20 mA to 20 mA
• Output current: -25 mA to 25 mA

Features:

• 1-of-8 Bidirectional Translating Switches
• I2C Bus and SMBus Compatible
• Active-Low Reset Input
• Three Hardware Address Pins for Use of up to Eight PCA9548A Devices on the I2C Bus
• Channel Selection Via I2C Bus
• Power-Up with All Switch Channels Deselected
• Low RON Switches
• Allows Voltage-Level Translation Between 1.8-V, 2.5-V, 3.3-V, and 5-V Buses
• No Glitch on Power Up
• Supports Hot Insertion
• Low Standby Current
• 5-V Tolerant Inputs

Applications:

• Servers
• Routers (Telecom Switching Equipment)
• Factory Automation
• Products With I2C Slave Address Conflicts (For Example, Multiple, Identical Temp Sensors)

Package:

• SSOP (24)
• TVSOP (24)
• SOIC (24)
• TSSOP (24)
• VQFN (24)

• 1-of-8 Bidirectional Translating Switches
• I 2 C Bus and SMBus Compatible
• Active-Low Reset Input
• Three Hardware Address Pins for Use of up to Eight PCA9548A Devices on the I 2 C Bus
• Channel Selection Via I 2 C Bus
• Power-Up with All Switch Channels Deselected
• Low RON Switches
• Allows Voltage-Level Translation Between 1.8-V, 2.5-V, 3.3-V, and 5-V Buses
• No Glitch on Power Up
• Supports Hot Insertion
• Low Standby Current
• Operating Power-Supply Voltage Range of 2.3 V to 5.5 V
• 5-V Tolerant Inputs
• 0-kHz to 400-kHz Clock Frequency
• Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
• ESD Protection Exceeds JESD 22
• -2000-V Human-Body Model (A114-A)
• -200-V Machine Model (A115-A)
• -1000-V Charged-Device Model (C101)

• Servers
• Routers (Telecom Switching Equipment)
• Factory Automation
• Products With I 2 C Slave Address Conflicts (For Example, Multiple, Identical Temp Sensors)

PCA9548APW,118 – SSOP-24 Pinout

Notes

• Pin numbers extracted from the SSOP-24 package diagram (DB, DW, DGV, PW variant).
• All SD/SC pins (serial data/clock for channels 0–7) require pull-up resistors to VCC.
• Address pins (A0, A1, A2) and RESET should be connected directly to VCC or ground; RESET may use a pull-up if not actively driven.
• SCL and SDA (main I2C bus) also require pull-up resistors to VCC.

VCC = 2.3 V to 3.6 V, over recommended operating free-air temperature range (unless otherwise noted)

• PARAMETER PARAMETER PARAMETER TEST CONDITIONS V CC MIN TYP (1) MAX UNIT
• V PORR Power-on reset voltage, V CC rising No load, V I = V CC or GND 1.2 1.5 V
• V PORF Power-on reset voltage, V CC falling (2) No load, V I = V CC or GND 0.8 1 V
• V 5 V 3.6
• 4.5 V to 5.5 V 2.6 4.5
• 3.3 V 1.9
• o(sw) voltage V i(sw) = V CC , I SWout = -100 μA 3 V to 3.6 V 1.6 2.8 V
• 2.5 V 1.5
• 2.3 V to 2.7 V 1.1 2
• I OL V OL = 0.4 V 2.3 V to 5.5 V 3 6 mA
• SDA V OL = 0.6 V 6 9
• SCL, SDA SCL, SDA -1 1
• SC7-SC0, SD7-SD0 SC7-SC0, SD7-SD0 -1 1
• I I A2-A0 A2-A0 V I = V CC or GND 2.3 V to 5.5 V -1 1 μA
• RESET RESET -1 1
• 5.5 V 50 80
• f SCL = 400 kHz V I = V CC or GND, I O = 0 3.6 V 20 35
• 2.7 V 11 20
• 5.5 V 9 30
• f SCL = 100 kHz V I = V CC or GND, I O = 0 3.6 V 6 15
• 2.7 V 4 8
• I CC 5.5 V 0.2 2 μA
• Low inputs V I = GND, I O = 0 3.6 V 0.1 2
• 2.7 V 0.1 1
• 5.5 V 0.2 2
• High inputs V I = V CC , I O = 0 3.6 V 0.1 2
• 2.7 V 0.1 1
• SCL or SDA input at 0.6 V, 3
• ΔI CC SCL, SDA Other inputs at V CC or GND SCL or SDA input at V CC - 0.6 V, 2.3 V to 5.5 V 20 μA
• Other inputs at V CC or GND 3 20
• 4 5
• C A2-A0 A2-A0 V I = V CC or GND 2.3 V to 5.5 V 4 5 pF
• i 20 28
• V = I V CC or GND, Switch OFF
• C (3) SDA SDA V I = V CC or GND, Switch OFF 2.3 V to 5.5 V 20 28 pF
• io(off) SD7-SD0 4.5 V to 5.5 V 5.5 7.5 20
• R ON Switch-on resistance V O = 0.4 V, I O = 15 mA 4 10 Ω
• V O = 0.4 V, I O = 10 mA 3 V to 3.6 V 2.3 V to 2.7 V 5 7 12 15 30 45

over operating free-air temperature range (unless otherwise noted) (1)

See (1)

Applications of the PCA9548A contain an I 2 C (or SMBus) master device and up to eight I 2 C slave devices. The downstream channels are ideally used to resolve I 2 C slave address conflicts. For example, if eight identical digital temperature sensors are needed in the application, one sensor can be connected at each channel: 0, 1, 2, and 3. When the temperature at a specific location needs to be read, the appropriate channel can be enabled and all other channels switched off, the data can be retrieved, and the I 2 C master can move on and read the next channel.

In an application where the I 2 C bus contains many additional slave devices that do not result in I 2 C slave address conflicts, these slave devices can be connected to any desired channel to distribute the total bus capacitance across multiple channels. If multiple switches are enabled simultaneously, additional design requirements must be considered (See the Design Requirements and Detailed Design Procedure sections).