MSP430
MIXED SIGNAL MICROCONTROLLER
Manufacturer
Texas Instruments
Overview
Part: Texas Instruments MSP430G2x13 and MSP430G2x53 Series Type: Mixed Signal Microcontroller
Key Specs:
- Supply-Voltage Range: 1.8 V to 3.6 V
- Standby Mode Current: 0.5 μA
- Off Mode (RAM Retention) Current: 0.1 μA
- Active Mode Current: 230 μA at 1 MHz, 2.2 V
- Wake-Up From Standby Mode: Less Than 1 μs
- CPU Architecture: 16-Bit RISC
- Instruction Cycle Time: 62.5-ns
- Internal Frequencies: up to 16 MHz
- ADC: 10-Bit 200-ksps
Features:
- Universal Serial Communication Interface (USCI)
- Ultra-Low Power Consumption
- Five Power-Saving Modes
- On-Chip Comparator for Analog Signal Compare Function or Slope Analog-to-Digital (A/D) Conversion
- Basic Clock Module Configurations
- Serial Onboard Programming
- Programmable Code Protection by Security Fuse
- Two 16-Bit Timer_A With Three Capture/Compare Registers
- On-Chip Emulation Logic With Spy-Bi-Wire Interface
- Up to 24 Capacitive-Touch Enabled I/O Pins
- Brownout Detector
Applications:
- Portable measurement applications
- Low-cost sensor systems that capture analog signals, convert them to digital values, and then process the data for display or for transmission to a host system
Package:
- TSSOP: 20 Pin, 28 Pin
- PDIP: 20 Pin
- QFN: 32 Pin
Features
- • Low Supply-Voltage Range: 1.8 V to 3.6 V • Universal Serial Communication Interface
-
(USCI) • Ultra-Low Power Consumption
- – Standby Mode: 0.5 μA
- – Off Mode (RAM Retention): 0.1 μA
- – Synchronous SPI • Five Power-Saving Modes
- • Ultra-Fast Wake-Up From Standby Mode in C™ Less Than 1 μs • On-Chip Comparator for Analog Signal
- Compare Function or Slope Analog-to-Digital • 16-Bit RISC Architecture, 62.5-ns Instruction (A/D) Conversion Cycle Time
-
- – Internal Frequencies up to 16 MHz With and-Hold, and Autoscan (See Table 1) Four Calibrated Frequency
- – Internal Very-Low-Power Low-Frequency • Serial Onboard Programming, (LF) Oscillator
- – External Digital Clock Source Fuse
- – Internal Frequencies up to 16 MHz With and-Hold, and Autoscan (See Table 1) Four Calibrated Frequency
- Capture/Compare Registers Interface
- – Active Mode: 230 μA at 1 MHz, 2.2 V – Enhanced UART Supporting Auto Baudrate Detection (LIN)
- – IrDA Encoder and Decoder
- – I 2
- • 10-Bit 200-ksps Analog-to-Digital (A/D) • Basic Clock Module Configurations Converter With Internal Reference, Sample-
- • Brownout Detector
- No External Programming Voltage Needed, – 32-kHz Crystal Programmable Code Protection by Security
- • Two 16-Bit Timer_A With Three • On-Chip Emulation Logic With Spy-Bi-Wire
- • Up to 24 Capacitive-Touch Enabled I/O Pins • Family Members are Summarized in Table 1
- • Package Options
- – TSSOP: 20 Pin, 28 Pin
- – PDIP: 20 Pin
- – QFN: 32 Pin
- • For Complete Module Descriptions, See the MSP430x2xx Family User's Guide (SLAU144)
- • Package Options
Pin Configuration
| PIN NAME (P1.x) | x | FUNCTION | CONTROL BITS AND SIGNALS(1) | |
|---|---|---|---|---|
| P1DIR.x | P1SEL.x | |||
| P1.3/ | P1.x (I/O) | I: 0; O: 1 | 0 | |
| ADC10CLK(2)/ | ADC10CLK | 1 | 1 | |
| CAOUT/ | CAOUT | 1 | 1 | |
| A3(2)/ | A3 | X | X | |
| VREF-(2)/ | 3 | VREF- | X | X |
| VEREF-(2)/ | VEREF- | X | X | |
| CA3/ | CA3 | X | X | |
| Pin Osc | Capacitive sensing | X | 0 |
(2) MSP430G2x53 devices only
Port P1 Pin Schematic: P1.4, Input/Output With Schmitt Trigger
* Note: MSP430G2x52 devices only. MSP430G2x12 devices have no ADC10.
MSP430G2x53 MSP430G2x13
www.ti.com SLAS735J –APRIL 2011–REVISED MAY 2013
Table 18. Port P1 (P1.4) Pin Functions
| PIN NAME (P1.x) | FUNCTION | CONTROL BITS AND SIGNALS(1) | |
|---|---|---|---|
| x | P1DIR.x | ||
| P1.4/ | P1.x (I/O) | I: 0; O: 1 | |
| SMCLK/ | SMCLK | 1 | |
| UCB0STE/ | UCB0STE | from USCI | |
| UCA0CLK/ | UCA0CLK | from USCI | |
| VREF+(2)/ | VREF+ | X | |
| VEREF+(2)/ | 4 | VEREF+ | X |
| A4(2)/ | A4 | X | |
| CA4 | CA4 | X | |
| TCK/ | TCK | X | |
| Pin Osc | Capacitive sensing | X |
(2) MSP430G2x53 devices only
Port P1 Pin Schematic: P1.5 to P1.7, Input/Output With Schmitt Trigger
* Note: MSP430G2x53 devices only. MSP430G2x13 devices have no ADC10.
MSP430G2x53 MSP430G2x13
www.ti.com SLAS735J –APRIL 2011–REVISED MAY 2013
Table 19. Port P1 (P1.5 to P1.7) Pin Functions
| x | CONTROL BITS AND SIGNALS(1) | |
|---|---|---|
| PIN NAME (P1.x) | FUNCTION | |
| P1.5/ | P1.x (I/O) | |
| TA0.0/ | TA0.0 | |
| UCB0CLK/ | UCB0CLK | |
| UCA0STE/ | UCA0STE | |
| A5(2)/ | 5 | A5 |
| CA5 | CA5 | |
| TMS | TMS | |
| Pin Osc | Capacitive sensing | |
| P1.6/ | P1.x (I/O) | |
| TA0.1/ | TA0.1 | |
| UCB0SOMI/ | UCB0SOMI | |
| UCB0SCL/ | UCB0SCL | |
| A6(2)/ | 6 | A6 |
| CA6 | CA6 | |
| TDI/TCLK/ | TDI/TCLK | |
| Pin Osc | Capacitive sensing | |
| P1.7/ | P1.x (I/O) | |
| UCB0SIMO/ | UCB0SIMO | |
| UCB0SDA/ | UCB0SDA | |
| A7(2)/ | A7 | |
| CA7 | 7 | CA7 |
| CAOUT | CAOUT | |
| TDO/TDI/ | TDO/TDI | |
| Pin Osc | Capacitive sensing |
(2) MSP430G2x53 devices only
Port P2 Pin Schematic: P2.0 to P2.5, Input/Output With Schmitt Trigger
Absolute Maximum Ratings
| Voltage applied at VCC to VSS | –0.3 V to 4.1 V | |
|---|---|---|
| Voltage applied to any pin(2) | –0.3 V to VCC + 0.3 V | |
| Diode current at any device pin | ±2 mA | |
| Storage temperature range, Tstg (3) | Unprogrammed device | -55°C to 150°C |
| Programmed device | -55°C to 150°C |
(2) All voltages referenced to VSS. The JTAG fuse-blow voltage, VFB, is allowed to exceed the absolute maximum rating. The voltage is applied to the TEST pin when blowing the JTAG fuse.
(3) Higher temperature may be applied during board soldering according to the current JEDEC J-STD-020 specification with peak reflow temperatures not higher than classified on the device label on the shipping boxes or reels.
Recommended Operating Conditions
Typical values are specified at VCC = 3.3 V and TA = 25°C (unless otherwise noted)
| MIN | NOM | MAX | UNIT | |||
|---|---|---|---|---|---|---|
| During program execution | 1.8 | 3.6 | V | |||
| VCC | Supply voltage | During flash programming or erase | 2.2 | 3.6 | V | |
| VSS | Supply voltage | 0 | V | |||
| TA | Operating free-air temperature | I version VCC = 1.8 V, Duty cycle = 50% ± 10% | –40 dc | 85 6 | ||
| (1) The MSP430 CPU is clocked directly with MCLK. Both the high and low phase of MCLK must not exceed the pulse duration of the specified maximum frequency. |
(2) Modules might have a different maximum input clock specification. See the specification of the respective module in this data sheet.
Note: Minimum processor frequency is defined by system clock. Flash program or erase operations require a minimum VCC of 2.2 V.
Electrical Characteristics
Related Variants
The following components are covered by the same datasheet.
| Part Number | Manufacturer | Package |
|---|---|---|
| MSP430G2 | Texas Instruments | — |
| MSP430G2113 | Texas Instruments | — |
| MSP430G2453 | Texas Instruments | — |
| MSP430G2453-Q1 | Texas Instruments | — |
| MSP430G2553 | Texas Instruments | — |
| MSP430G2553-Q1 | Texas Instruments | — |
| MSP430G2X12 | Texas Instruments | — |
| MSP430G2X13 | Texas Instruments | — |
| MSP430G2X52 | Texas Instruments | — |
| MSP430G2X53 | Texas Instruments | — |
| MSP430X2XX | Texas Instruments | — |
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