MM32F0140C7P
MicrocontrollerThe MM32F0140C7P is a microcontroller from MindMotion. View the full MM32F0140C7P datasheet below including pinout, electrical characteristics, absolute maximum ratings.
Manufacturer
MindMotion
Category
Microcontroller
Overview
Part: MM32F0140 — MindMotion
Type: 32-bit Microcontroller
Description: 32-bit Arm Cortex-M0 microcontroller operating at up to 48 MHz, with up to 64 Kbytes Flash memory and 8 Kbytes SRAM.
Operating Conditions:
- Supply voltage: 2.0–5.5 V
- Operating temperature: -40 to +105 °C
- CPU frequency: Up to 48 MHz
Absolute Maximum Ratings:
- Max supply voltage: 6.0 V
- Max continuous current: 120 mA
- Max junction/storage temperature: 150 °C
Key Specs:
- VDD operating voltage: 2.0 V to 5.5 V
- CPU frequency: Up to 48 MHz
- Flash memory: Up to 64 Kbytes
- SRAM: Up to 8 Kbytes
- Run mode current: 10.5 mA (Typ, VDD=3.3V, fCPU=48MHz, all peripherals off)
- Stop mode current: 1.5 μA (Typ, VDD=3.3V, TA=25°C)
- ADC resolution: 12-bit
- ADC conversion rate: 1.5 MSPS
Features:
- Arm® Cortex®-M0 core
- Up to 48 MHz operating frequency
- Up to 64 Kbytes Flash memory, 8 Kbytes SRAM
- Clock management (HSI, LSI, HSE, PLL)
- POR/PDR, PVD reset and power management
- Low-power modes (Sleep, Stop, Standby)
- DMA controller
- Timers (Advanced, General-purpose, Basic), Watchdogs, RTC
- GPIO with external interrupt capability
- Communication interfaces: UART, I2C, SPI, I2S, FlexCAN
- 12-bit ADC, Comparators, CRC calculation unit
- Serial Wire Debug (SWD)
Package:
- LQFP48
- LQFP32
- QFN32 5x5 mm2
- QFN32 4x4 mm2
- TSSOP20
Features
-
Core and system
-
-32-bit Arm ® Cortex ® M0.
-
-Frequency up to 72MHz.
-
Memory
-
-Up to 64KB embedded Flash storage.
-
-Up to 8KB SRAM.
-
-Embedded Bootloader to support In-System-Programming (ISP).
-
Clock, reset and power management
-
-Power supply ranges from 2.0 to 5.5V.
-
-Power-on and Power-down reset (POR/PDR), Programmable voltage detector (PVD).
-
-4 to 24MHz high speed crystal oscillator.
-
-8MHz factory-trimmed high speed RC oscillator.
-
-Integrated PLL to generate up to 72MHz system clock and support multiple prescaler rate to provide clock sources to bus matrix and peripherals.
-
-40KHz low speed oscillator.
-
Low power
-
-Multiple low power modes including Sleep mode, Stop mode, Deep Stop mode and Standby mode.
-
One DMA controller with 5 channels to support peripherals including timers, ADC, UART, I2C, SPI, and FlexCAN.
-
Total 9 timers:
-
-One 16-bit 4-channel advanced timer (TIM1), each channel providing two PWM output including one complementary output, supports hardware dead-time insertion and emergency break when fault detected.
-
-One 16-bit general purpose timer (TIM3) and one 32-bit general purpose timer (TIM2), with up to four input capture or output compare channels and can be used for infrared decode.
-
-Three 16-bit basic timers (TIM14 / TIM16 / TIM17), with one input capture or output compare channel and one complementary output, support hardware deadtime insertion, emergency break when fault detected, and integrated modulator circuit for infrared control.
-
-Two watchdog timers, including one independent watchdog (IWDG) and one window watchdog (WWDG).
-
-One 24-bit Systick timer.
-
Up to 40 fast I/O ports:
-
-All I/O ports can be mapped to 16 external interrupts.
-
-All I/O ports can accept input or generate output signal voltage level is not higher than VDD.
-
Up to 7 communication interfaces:
-
-Three UART.
-
-One I2C.
-
-Two SPI (support I2S mode).
-
-One FlexCAN module supports CAN 2.0B interface.
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One 12-bit Analog-to-Digital converter (ADC), support 1μs conversion duration, with up to 14 external inputs and 2 internal inputs
-
-Conversion range: 0 to VDDA.
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-Configurable sampling cycles and resolution.
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-On-chip temperature sensor.
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-On-chip voltage sensor.
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One high speed analog comparator
-
32-bit hardware divider
-
Embedded CRC engine
-
96bit unique chip ID (UID)
-
Debug mode
-
-Serial Wire Debug (SWD).
-
Available in LQFP48, LQFP32, QFN32 and TSSOP20 packages
Pin Configuration
MM32F0140C7P – LQFP48 Pinout
| Pin | Name | Type | I/O Level | Main Function | Multiplex Function | Additional Function |
|---|---|---|---|---|---|---|
| 1 | NC | – | – | – | – | – |
| 2 | PC13 | I/O | TC | PC13 | TIM2_CH1 | – |
| 3 | PC14 | I/O | TC | PC14 | TIM2_CH2 | – |
| 4 | PC15 | I/O | TC | PC15 | TIM2_CH3 | – |
| 5 | PD0 OSC_IN | I/O | TC | PD0 | UART3_TX, I2C_SDA | – |
| 6 | PD1 OSC_OUT | I/O | TC | PD1 | UART3_RX, I2C_SCL | – |
| 7 | NRST1 | I/O | – | NRST1 | – | – |
| 8 | VSS | S | – | VSS | – | – |
| 9 | VDDA | S | – | VDDA | – | – |
| 10 | PA0 WKUP | I/O | TC | PA0 | UART2_CTS, TIM2_CH1/TIM2_ETR, SPI2_NSS/I2S2_WS, TIM2_CH3, COMP1_OUT | ADC1_VIN[0] |
| 11 | PA1 | I/O | TC | PA1 | UART2_RTS, TIM2_CH2 | ADC1_VIN[1], COMP_INP[0] |
| 12 | PA2 | I/O | TC | PA2 | UART2_TX, TIM2_CH3, SPI2_NSS/I2S2_WS | ADC1_VIN[2], COMP_INP[1] |
| 13 | PA3 | I/O | TC | PA3 | UART2_RX, TIM2_CH4 | ADC1_VIN[3], COMP_INP[2] |
| 14 | PA4 | I/O | TC | PA4 | SPI1_NSS/I2S1_WS, TIM1_BKIN, TIM14_CH1, I2C_SDA | ADC1_VIN[4], COMP_INP[3] |
| 15 | PA5 | I/O | TC | PA5 | SPI1_SCK/I2S1_CK, TIM2_CH1/TIM2_ETR, TIM1_ETR, I2C_SCL | ADC1_VIN[5], COMP_INM[0] |
| 16 | PA6 | I/O | TC | PA6 | TIM1_CH3N, SPI1_MISO/I2S1_MCK, TIM3_CH1, TIM1_BKIN, UART2_RX, TIM1_ETR, TIM16_CH1, TIM1_CH3 | ADC1_VIN[6], COMP_INM[1] |
| 17 | PA7 | I/O | TC | PA7 | COMP1_OUT, SPI1_MOSI/I2S1_SD, TIM3_CH2, TIM1_CH1N, TIM14_CH1, TIM17_CH1, TIM1_CH2N, TIM1_CH3N | ADC1_VIN[7], COMP_INM[2] |
| 18 | PB0 | I/O | TC | PB0 | TIM3_CH3, TIM1_CH2N, TIM1_CH1N, TIM1_CH3 | ADC1_VIN[8] |
| 19 | PB1 | I/O | TC | PB1 | TIM14_CH1, TIM3_CH4, TIM1_CH3N, TIM1_CH4, TIM1_CH2N, MCO, TIM1_CH2, TIM1_CH1N | ADC1_VIN[9] |
| 20 | PB2 | I/O | TC | PB2 | – | – |
| 21 | PB10 | I/O | TC | PB10 | I2C_SCL, TIM2_CH3, UART3_TX, SPI2_SCK/I2S2_CK | – |
| 22 | PB11 | I/O | TC | PB11 | I2C_SDA, TIM2_CH4, UART3_RX | – |
| 23 | VSS | S | – | VSS | – | – |
| 24 | VDD | S | – | VDD | – | – |
| 25 | PB12 | I/O | TC | PB12 | SPI2_NSS/I2S2_WS, SPI2_SCK/I2S2_CK, TIM1_BKIN, SPI2_MOSI/I2S2_SD, SPI2_MISO/I2S2_MCK | – |
| 26 | PB13 | I/O | TC | PB13 | SPI2_SCK/I2S2_CK, SPI2_MISO/I2S2_MCK, TIM1_CH1N, SPI2_NSS/I2S2_WS, SPI2_MOSI/I2S2_SD, I2C_SCL, TIM1_CH3N, TIM2_CH1, UART3_CTS | – |
| 27 | PB14 | I/O | TC | PB14 | SPI2_MISO/I2S2_MCK, SPI2_MOSI/I2S2_SD, TIM1_CH2N, SPI2_SCK/I2S2_CK, SPI2_NSS/I2S2_WS, I2C_SDA, TIM1_CH3, TIM1_CH1 | – |
| 28 | PB15 | I/O | TC | PB15 | UART3_RTS, SPI2_MOSI/I2S2_SD, SPI2_NSS/I2S2_WS, TIM1_CH3N, SPI2_MISO/I2S2_MCK, SPI2_SCK/I2S2_CK, TIM1_CH2N, TIM1_CH2 | – |
| 29 | PA8 | I/O | TC | PA8 | MCO, TIM1_CH1, TIM1_CH2, TIM1_CH3 | – |
| 30 | PA9 | I/O | TC | PA9 | UART1_TX, TIM1_CH2, UART1_RX, I2C_SCL, MCO, TIM1_CH1N, TIM1_CH4, CAN_RX | – |
| 31 | PA10 | I/O | TC | PA10 | TIM17_BKIN, UART1_RX, TIM1_CH3, UART1_TX, I2C_SDA, TIM1_CH1, SPI2_SCK/I2S2_CK | – |
| 32 | PA11 | I/O | TC | PA11 | UART3_TX, UART1_CTS, TIM1_CH4, CAN_RX, SPI2_MOSI/I2S2_SD, I2C_SCL, COMP1_OUT | – |
| 33 | PA12 | I/O | TC | PA12 | UART1_RTS, TIM1_ETR, CAN_TX, I2C_SDA, TIM1_CH2 | UART3_RX, SPI2_MISO/I2S2_MCK |
| 34 | PA13 | I/O | TC | PA13 | SWDIO, UART1_TX, SPI2_MISO/I2S2_MCK, MCO, TIM1_CH2, TIM1_BKIN | – |
| 35 | PD2 | I/O | TC | PD2 | – | – |
| 36 | PD3 | I/O | TC | PD3 | – | – |
| 37 | PA14 | I/O | TC | PA14 | SWDCLK, UART2_TX, UART1_RX, SPI1_NSS/I2S1_WS | – |
| 38 | PA15 | I/O | TC | PA15 | SPI1_NSS/I2S1_WS, UART2_RX, TIM2_CH1/TIM2_ETR | – |
| 39 | PB3 | I/O | TC | PB3 | SPI1_SCK/I2S1_CK, TIM2_CH2, UART1_TX, TIM2_CH3, TIM1_CH1, TIM2_CH1 | ADC1_VIN[10] |
| 40 | PB4 | I/O | TC | PB4 | SPI1_MISO/I2S1_MCK, TIM3_CH1, UART1_RX, TIM17_BKIN, TIM1_CH2 | ADC1_VIN[11] |
| 41 | PB5 | I/O | TC | PB5 | SPI1_MOSI/I2S1_SD, TIM3_CH2, TIM16_BKIN, MCO, TIM1_CH3, TIM2_CH3 | – |
| 42 | PB6 | I/O | TC | PB6 | UART1_TX, I2C_SCL, TIM16_CH1N, TIM2_CH1 | – |
| 43 | PB7 | I/O | TC | PB7 | UART1_RX, I2C_SDA, TIM17_CH1N, UART2_TX | ADC1_VIN[12] |
| 44 | PD5 BOOT0 | I/O | TC | PD5 | – | – |
| 45 | PB8 | I/O | TC | PB8 | I2C_SCL, TIM16_CH1, CAN_RX, UART2_RX | – |
| 46 | PB9 | I/O | TC | PB9 | I2C_SDA, TIM17_CH1, CAN_TX, TIM1_CH4, SPI2_NSS/I2S2_WS | – |
| 47 | VSS | S | – | VSS | – | – |
| 48 | VDD | S | – | VDD | – | – |
Notes
- I/O Level TC: Standard I/O. Input signal level should not exceed VDD.
- Pin 1 (NC): No Connect pin.
- Pins 7, 35, 36, 44: PD pins (PD0, PD1, PD2, PD3, PD5) have limited availability in LQFP48 package compared to other variants.
- SWDIO/SWDCLK: Pins 34 (PA13) and 37 (PA14) are reserved for debug interface.
- BOOT0: Pin 44 (PD5) controls boot mode selection.
Electrical Characteristics
The definitions and values of the input and output AC characteristics are given in the following figure and table, respectively.
Unless otherwise stated, the parameters listed in the following table are provided under the ambient temperature and supply voltage in accordance with the condition Table 5-3.
Table 5-23 I/O AC characteristics (1)(2)(3)
| MODE[1:0] | Symbol | Parameter | Conditions | Minimum | Typical | Maximum | Unit |
|---|---|---|---|---|---|---|---|
| 11 | t f(IO)out | Output fall time | C L = 50pF VDD=3.3V | 3.34 | 4.4 | 9.27 | ns |
| 11 | t r(IO)out | Output rise time | C L = 50pF VDD=3.3V | 3.34 | 4.4 | 9.27 | ns |
| 10 | t f(IO)out | Output fall time | C L = 50pF VDD=3.3V | 5.91 | 10.9 | 17 | ns |
| 10 | t r(IO)out | Output rise time | C L = 50pF VDD=3.3V | 5.91 | 10.6 | 17 | ns |
| 01 | t f(IO)out | Output fall time | C L = 50pF VDD=3.3V | 6.06 | 10.9 | 17.4 | ns |
| MODE[1:0] | Symbol | Parameter | Conditions | Minimum | Typical | Maximum | Unit |
|---|---|---|---|---|---|---|---|
| t r(IO)out | Output rise time | 6.06 | 10.8 | 17.4 | ns |
- The speed of the I/O port can be configured through MODEx[1:0]. Refer to the description of the GPIO port configuration register in this chip user manual.
- The maximum frequency is defined in Figure 5-8.
- Guaranteed by design, not tested in production.
Figure 5-8 I/O AC characteristics
Absolute Maximum Ratings
Stresses above the absolute maximum ratings given in "Absolute Group Maximum Ratings" list (Table 5-1, Table 5-2 and Table 5-3) may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these conditions is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability.
Table 5-1 Voltage characteristics
| Symbol | Description | Minimum | Maximum | Unit |
|---|---|---|---|---|
| V DDx V SSx | External main supply voltage (including V DDA and V SSA ) (1) | 0.3 | 5.8 | V |
| V IN (2) | Input voltage on other pins | V SS 0.3 | V DD +0.3 | V |
- All power (VDD, VDDA) and ground (VSS, VSSA) pins must always be connected to the external power supply system within the permitted range.
- The maximum value of VIN must be respected. Refer to the table below for the maximum allowed injected current values.
- All main power (VDD, VDDA) and ground (VSS, VSSA) pins must always be connected to an external power supply in the permitted range.
- This current consumption must be correctly distributed to all I/O and control pins. The total output current must not be sunk/sourced between two consecutive power supply pins referring to high pin count LQFP package.
- The reverse injection current can interfere with the analog performance of the device.
- When VIN > VDDA, a positive injected current is generated; when VIN < VSS, a reverse injected current is generated. Do not exceed IINJ(PIN).
- When there is simultaneous injection current for multiple inputs, the maximum value of ΣIINJ(PIN) is equal to the sum of the absolute values of the forward injection current and the reverse injection current (instantaneous value) .
Table 5-2 Current characteristics
| Symbol | Description | Maximum | Unit |
|---|---|---|---|
| I VDD/VDDA (1) | Total current through V DD /V DDA power pins (supply current) (1) | +120 | mA |
| I VSS/VSSA (1) | Total current through V SS /V SSA ground pins (outflow current) (1) | 120 | mA |
| I IO | Output sink current on any I/O and control pins | +25 | mA |
| I IO | Output current on any I/O and control pins | 25 | mA |
| I INJ(PIN) (2)(3) | NRST pin injection current | ±5 | mA |
| I INJ(PIN) (2)(3) | HSE OSC_IN pin injection current | ±5 | mA |
| ∑I INJ(PIN) (5) | Other pins injection current (4) | ±25 | mA |
Related Variants
The following components are covered by the same datasheet.
| Part Number | Manufacturer | Package |
|---|---|---|
| MM32F0140 | MindMotion | — |
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