Part: i.MX RT1060 — NXP Semiconductors

Type: ARM Cortex-M7 Crossover Processor

Description: A 600 MHz Arm Cortex-M7 processor with 1 MB on-chip RAM, integrated DCDC and LDO, and a wide range of memory and peripheral interfaces for real-time applications.

Operating Conditions:

• Operating temperature: 0 to +95 °C (suffix-dependent — see Table 1 for grade-specific ranges)
• Max CPU frequency: 600 MHz

Absolute Maximum Ratings:

Key Specs:

• Core: Single Arm Cortex-M7
• CPU Frequency: 600 MHz
• On-chip RAM: 1 MB (512 KB configurable as TCM/OCRAM, 512 KB dedicated OCRAM)
• Boot ROM: 128 KB
• L1 Instruction Cache: 32 KB
• L1 Data Cache: 32 KB
• ADC: Two 12-bit, 16-channel (20-channel total)
• Analog Comparators (ACMP): Four
• USB: Two USB 2.0 OTG controllers with integrated PHY

Features:

• Full featured Floating Point Unit (FPU)
• Integrated MPU, up to 16 individual protection regions
• External memory interfaces: SDRAM, RAW NAND FLASH, NOR FLASH, SD/eMMC, Quad SPI
• Display Interface: Parallel RGB LCD interface (8/16/24 bit, up to WXGA resolution), Smart LCD display
• Audio: S/PDIF, Three SAI modules (I2S, AC97, TDM), MQS interface
• Generic 2D graphics engine: BitBlit, alpha/chroma key, Porter-duff blending, image rotation, color space conversion
• Connectivity: Two 10/100M Ethernet, Eight UARTs, Four I2C, Four SPI, Two FlexCAN, One FlexCAN (with Flexible Data-Rate), Three FlexIO
• Integrated power management: On-chip DCDC and LDO, Temperature sensor
• Security: High Assurance Boot (HAB), Data Co-Processor (DCP) with AES/SHA/CRC, Bus Encryption Engine (BEE) for on-the-fly QSPI Flash decryption, TRNG, SNVS, Secure RTC, ZMK, SJC
• Debug: Arm CoreSight, TPIU, CTI, 5-pin (JTAG) and SWD interfaces

Applications:

• Industrial Human Machine Interfaces (HMI)
• Motor Control
• Home Appliance

Package:

• 196-pin MAPBGA, 10 x 10 mm, 0.65 mm pitch
• 196-pin MAPBGA, 12 x 12 mm, 0.8 mm pitch

The i.MX RT1060 processors are based on Arm Cortex-M7 Core Platform, which has the following features:

• Supports single Arm Cortex-M7 Core with:
• 32 KB L1 Instruction Cache
• 32 KB L1 Data Cache
• Full featured Floating Point Unit (FPU) with support of the VFPv5 architecture
• Support the Armv7-M Thumb instruction set
• Integrated MPU, up to 16 individual protection regions
• Tightly coupled GPIOs, operating at the same frequency as Arm Core
• Up to 512 KB I-TCM and D-TCM in total
• Frequency of 600 MHz
• Cortex M7 CoreSight™ components integration for debug
• Frequency of the core, as per Table 10, "Operating ranges," on page 24.

The SoC-level memory system consists of the following additional components:

• Boot ROM (128 KB)

• On-chip RAM (1 MB)

• -512 KB OCRAM shared between ITCM/DTCM and OCRAM

• -Dedicate 512 KB OCRAM

• External memory interfaces:

• 8/16-bit SDRAM, up to SDRAM-133/SDRAM-166

• 8/16-bit SLC NAND FLASH, with ECC handled in software

• SD/eMMC

• SPI NOR/NAND FLASH

• Parallel NOR FLASH with XIP support

• Two single/dual channel Quad SPI FLASH with XIP support

• Timers and PWMs:

• Two General Programmable Timers (GPT)

• -4-channel generic 32-bit resolution timer for each

• -Each support standard capture and compare operation

• Four Periodical Interrupt Timers (PIT)

• -Generic 32-bit resolution timer

• -Periodical interrupt generation

• Four Quad Timers (QTimer)

• -4-channel generic 16-bit resolution timer for each

• -Each support standard capture and compare operation

• -Quadrature decoder integrated

• Four FlexPWMs

• -Up to 8 individual PWM channels per each

• -16-bit resolution PWM suitable for Motor Control applications

• Four Quadrature Encoder/Decoders

Each i.MX RT1060 processor enables the following interfaces to external devices (some of them are muxed and not available simultaneously):

• Display Interface:
• Parallel RGB LCD interface
• -Support 8/16/24 bit interface
• -Support up to WXGA resolution
• -Support Index color with 256 entry x 24 bit color LUT
• -Smart LCD display with 8/16-bit MPU/8080 interface
• Audio:
• S/PDIF input and output
• Three synchronous audio interface (SAI) modules supporting I2S, AC97, TDM, and codec/DSP interfaces
• MQS interface for medium quality audio via GPIO pads
• Generic 2D graphics engine:
• BitBlit
• Flexible image composition options-alpha, chroma key
• Porter-duff blending
• Image rotation (90 , 180 , 270 )
• Image size
• Color space conversion
• Multiple pixel format support (RGB, YUV444, YUV422, YUV420, YUV400)
• Standard 2D-DMA operation
• Camera sensors:
• Support 24-bit, 16-bit, and 8-bit CSI input
• Connectivity:
• Two USB 2.0 OTG controllers with integrated PHY interfaces
• Two Ultra Secure Digital Host Controller (uSDHC) interfaces
• -MMC 4.5 compliance with HS200 support up to 200 MB/sec

MIMXRT1062DVL6A — 196-pin LFBGA (10×10 mm, 0.65 mm pitch)

I have reviewed the provided datasheet section and the attached pin diagram image. However, the datasheet excerpt provided does not contain a detailed pin assignment table — it only includes ordering information, module descriptions, and package type identification.

The image shows the BGA ball layout diagram, but without a corresponding pin-name-to-ball-number table in the text, I cannot reliably extract a complete pinout.

Status

Cannot extract complete pinout — The source material identifies:

• Part: MIMXRT1062DVL6A
• Package: 196-pin LFBGA, 10×10 mm, 0.65 mm pitch
• Features: LCD/CSI/PXP support (distinguishing it from MIMXRT1061 variants)

But the actual pin assignment table (mapping ball positions A1–N14 to signal names) is not included in the provided datasheet section.

Notes

To obtain the complete pinout for MIMXRT1062DVL6A, you will need:

• Section 6.1 "10 x 10 mm package information" from the full datasheet (IMXRT1060CEC Rev. 3, 03/2022)
• This section should contain the detailed ball-to-signal assignment table

The datasheet table of contents references this section on page 89, but the actual pin table was not included in the excerpt provided.

This section provides the device and module-level electrical characteristics for the i.MX RT1060 processors.

Table 9 shows the 10 x 10 MM package thermal resistance data.

Table 8. 10 x 10 MM thermal resistance data

Plastic Package

196-pin MAPBGA, 10 x 10 mm, 0.65 mm pitch

196-pin MAPBGA, 12 x 12 mm, 0.8 mm pitch