MCP4728A3-E/UN
Digital-to-Analog Converter (DAC)The MCP4728A3-E/UN is a digital-to-analog converter (dac) from Microchip Technology. View the full MCP4728A3-E/UN datasheet below including electrical characteristics, absolute maximum ratings.
Manufacturer
Microchip Technology
Category
ADC / DACOverview
Part: MCP4728
Type: 12-Bit, Quad Digital-to-Analog Converter
Description: A quad, 12-bit voltage output Digital-to-Analog Converter (DAC) with nonvolatile EEPROM memory, internal or external voltage reference selection, and an I2C serial interface.
Operating Conditions:
- Supply voltage: 2.7V to 5.5V
- Operating temperature: -40°C to +125°C
- I2C clock frequency: Up to 3.4 Mbps
- Output voltage range: 0.000V to 2.048V (internal VREF, Gain=1) or 0.000V to 4.096V (internal VREF, Gain=2) or 0.000V to VDD (external VREF)
Absolute Maximum Ratings:
- Max supply voltage: 6.5V
- Max continuous current: ±25 mA (at output pins)
- Max junction/storage temperature: +150°C
Key Specs:
- Resolution: 12 Bits
- Differential Nonlinearity (DNL) Error: ±0.2 LSB (typical)
- Integral Nonlinearity (INL) Error: ±2 LSB (typical), ±13 LSB (max)
- Output Voltage Settling Time: 6 μs (typical)
- Internal Voltage Reference: 2.048 V (typical)
- Supply Current (all 4 channels normal mode, VDD=5.5V): 800 μA (typical), 1400 μA (max)
- Power-Down Current (all 4 channels powered down, VREF=VDD): 40 nA (typical)
- Short Circuit Current: 15 mA (typical), 24 mA (max)
Features:
- 12-Bit Voltage Output DAC with Four Buffered Outputs
- On-Board Nonvolatile Memory (EEPROM) for DAC Codes and I2C Address Bits
- Internal or External Voltage Reference Selection
- ±0.2 Least Significant Bit (LSB) Differential Nonlinearity (DNL) (typical)
- Fast Settling Time: 6 μs (typical)
- Normal or Power-Down Mode
- Low Power Consumption
- Single-Supply Operation: 2.7V to 5.5V
- I2C Interface: Standard (100 kbps), Fast (400 kbps) and High Speed (HS) Mode (3.4 Mbps)
Applications:
- Set Point or Offset Adjustment
- Sensor Calibration
- Closed-Loop Servo Control
- Low Power Portable Instrumentation
- PC Peripherals
- Programmable Voltage and Current Source
- Industrial Process Control
- Instrumentation
- Bias Voltage Adjustment for Power Amplifiers
Package:
- 10-Lead MSOP Package
Features
- 12-Bit Voltage Output DAC with Four Buffered Outputs
- On-Board Nonvolatile Memory (EEPROM) for DAC Codes and I 2 C™ Address Bits
- Internal or External Voltage Reference Selection
- Output Voltage Range:
- -Using Internal V REF (2.048V): 0.000V to 2.048V with Gain Setting = 1 0.000V to 4.096V with Gain Setting = 2
- -Using External V REF (V DD ): 0.000V to V DD
- ±0.2 Least Significant Bit (LSB) Differential Nonlinearity (DNL) (typical)
- Fast Settling Time: 6 μs (typical)
- Normal or Power-Down Mode
- Low Power Consumption
- Single-Supply Operation: 2.7V to 5.5V
- I 2 C Interface:
- -Address bits: User Programmable to EEPROM
- -Standard (100 kbps), Fast (400 kbps) and High Speed (HS) Mode (3.4 Mbps)
- 10-Lead MSOP Package
- Extended Temperature Range: -40°C to +125°C
Applications
- Set Point or Offset Adjustment
- Sensor Calibration
- Closed-Loop Servo Control
- Low Power Portable Instrumentation
- PC Peripherals
- Programmable Voltage and Current Source
- Industrial Process Control
- Instrumentation
- Bias Voltage Adjustment for Power Amplifiers
Pin Configuration
The descriptions of the pins are listed in Table 3-1.
TABLE 3-1: PIN FUNCTION TABLE
| Pin No. | Name | Pin Type | Function |
|---|---|---|---|
| 1 | V DD | P | Supply Voltage |
| 2 | SCL | OI | I 2 C Serial Clock Input (Note 1) |
| 3 | SDA | OI/OO | I 2 C Serial Data Input and Output (Note 1) |
| 4 | LDAC | ST | This pin is used for two purposes: (a) Synchronization Input. It is used to transfer the contents of the DAC input registers to the output registers (V OUT ). (b) Select the device for reading and writing I 2 C address bits. (Note 2) |
| 5 | RDY/BSY | OO | This pin is a status indicator of EEPROM programming activity. An external pull-up resistor (about 100 k Ω ) is needed from RDY/BSY pin to V DD line. (Note 1) |
| 6 | V OUT A | AO | Buffered analog voltage output of channel A. The output amplifier has rail-to-rail operation. |
| 7 | V OUT B | AO | Buffered analog voltage output of channel B. The output amplifier has rail-to-rail operation. |
| 8 | V OUT C | AO | Buffered analog voltage output of channel C. The output amplifier has rail-to-rail operation. |
| 9 | V OUT D | AO | Buffered analog voltage output of channel D. The output amplifier has rail-to-rail operation. |
| 10 | V SS | P | Ground reference. |
Legend: P = Power, OI = Open-Drain Input, OO = Open-Drain Output, ST = Schmitt Trigger Input Buffer, AO = Analog Output
Note 1: This pin needs an external pull-up resistor from V DD line. Leave this pin float if it is not used.
- 2: This pin can be driven by MCU.
Electrical Characteristics
Electrical Specifications: Unless otherwise indicated, all parameters apply at V DD = +2.7V to 5.5V, V SS = 0V, RL = 5 k Ω , C L = 100 pF, G X = 1, T A = -40°C to +125°C. Typical values are at +25°C, V IH = V DD , V IL = V SS.
Note 1: All digital input pins (SDA, SCL, LDAC) are tied to 'High', Output pins are unloaded, code = 0 x 000.
| Parameter | Symbol | Min | Typical | Max | Units | Conditions |
|---|---|---|---|---|---|---|
| Power Requirements | Power Requirements | Power Requirements | Power Requirements | Power Requirements | Power Requirements | Power Requirements |
| Operating Voltage | V DD | 2.7 | 5.5 | V | ||
| Supply Current with External Reference (V REF = V DD ) (Note 1) | I DD_EXT | - | 800 | 1400 | μA | V REF = V DD , V DD = 5.5V All 4 channels are in Normal mode. |
| Supply Current with External Reference (V REF = V DD ) (Note 1) | I DD_EXT | - | 600 | - | μA | 3 channels are in Normal mode, 1 channel is powered down. |
| Supply Current with External Reference (V REF = V DD ) (Note 1) | I DD_EXT | - | 400 | - | μA | 2 channels are in Normal mode, 2 channel are powered down. |
| Supply Current with External Reference (V REF = V DD ) (Note 1) | I DD_EXT | - | 200 | - | μA | 1 channel is in Normal mode, 3 channels are powered down. |
| Power-Down Current with External Reference | I PD_EXT | - | 40 | - | nA | All 4 channels are powered down. (V REF = V DD ) |
| Supply Current with Internal Reference (V REF = Internal) (Note 1) | I DD_INT | - | 800 | 1400 | μA | V REF = Internal Reference V DD = 5.5V All 4 channels are in normal mode. |
| Supply Current with Internal Reference (V REF = Internal) (Note 1) | I DD_INT | - | 600 | - | μA | 3 channels are in Normal mode, 1 channel is powered down. |
| Supply Current with Internal Reference (V REF = Internal) (Note 1) | I DD_INT | - | 400 | - | μA | 2 channels are in Normal mode, 2 channels are powered down. |
| Supply Current with Internal Reference (V REF = Internal) (Note 1) | I DD_INT | - | 200 | - | μA | 1 channel is in Normal mode, 3 channels are powered down. |
| Power-Down Current with Internal Reference | I PD_INT | - | 45 | 60 | μA | All 4 channels are powered down. V REF = Internal Reference |
- 2: The power-up ramp rate measures the rise of V DD over time.
- 3: This parameter is ensured by design and not 100% tested.
- 4: This parameter is ensured by characterization and not 100% tested.
- 5: Test code range: 100 - 4000 codes, V REF = V DD , V DD = 5.5V.
- 6: Time delay to settle to a new reference when switching from external to internal reference or vice versa.
- 7: This parameter is indirectly tested by Offset and Gain error testing.
- 8: Within 1/2 LSB of the final value when code changes from 1/4 of to 3/4 of full scale.
- 9: This time delay is measured from the falling edge of ACK pulse in I 2 C command to the beginning of V OUT . This time delay is not included in the output settling time specification.
- † Notice: Stresses above those listed under 'Maximum ratings' may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operation listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability.
Absolute Maximum Ratings
| Parameter | Limit |
|---|---|
| V DD | 6.5V |
| All inputs and outputs w.r.t V SS | -0.3V to V DD +0.3V |
| Current at Input Pins | ±2 mA |
| Current at Supply Pins | ±110 mA |
| Current at Output Pins | ±25 mA |
| Storage Temperature | -65°C to +150°C |
| Ambient Temp. with Power Applied | -55°C to +125°C |
| ESD protection on all pins | ≥ 4 kV HBM, ≥ 400V MM |
| Maximum Junction Temperature (T J ) | +150°C |
Typical Application
The MCP4728 device is a part of Microchip's latest DAC family with nonvolatile EEPROM memory. The device is a general purpose resistor string DAC intended to be used in applications where a precise and low power DAC, with moderate bandwidth, is required.
Since the device includes nonvolatile EEPROM memory, the user can use this device for applications that require the output to return to the previous set-up value on subsequent power-ups.
Applications generally suited for the MCP4728 device family include:
- Set Point or Offset Trimming
- Sensor Calibration
- Portable Instrumentation (Battery Powered)
- Motor Speed Control
Related Variants
The following components are covered by the same datasheet.
| Part Number | Manufacturer | Package |
|---|---|---|
| MCP4728 | Microchip Technology | 10-Lead MSOP |
| MCP4728-E/UN | Microchip Technology | — |
| MCP4728A0-E/UN | Microchip Technology | — |
| MCP4728A0T-E/UN | Microchip Technology | — |
| MCP4728A1-E/UN | Microchip Technology | — |
| MCP4728A1T-E/UN | Microchip Technology | — |
| MCP4728A2-E/UN | Microchip Technology | — |
| MCP4728A2T-E/UN | Microchip Technology | — |
| MCP4728A3T-E/UN | Microchip Technology | — |
| MCP4728A4-E/UN | Microchip Technology | — |
| MCP4728A4T-E/UN | Microchip Technology | — |
| MCP4728A5-E/UN | Microchip Technology | — |
| MCP4728A5T-E/UN | Microchip Technology | — |
| MCP4728A6-E/UN | Microchip Technology | — |
| MCP4728A6T-E/UN | Microchip Technology | — |
| MCP4728A7-E/UN | Microchip Technology | — |
| MCP4728A7T-E/UN | Microchip Technology | — |
| MCP4728T-E/UN | Microchip Technology | — |
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