LTC4162-SAD
Synchronous Step-Down Switching Battery Charger and PowerPath ManagerThe LTC4162-SAD is a synchronous step-down switching battery charger and powerpath manager from Analog Devices. View the full LTC4162-SAD datasheet below including electrical characteristics.
Manufacturer
Analog Devices
Category
Synchronous Step-Down Switching Battery Charger and PowerPath Manager
Overview
Part: LTC4162-S — Analog Devices (Linear Technology)
Type: Synchronous Step-Down Switching Battery Charger and PowerPath Manager
Description: A 4.5–35 V input, 3.2 A synchronous step-down switching battery charger and PowerPath manager for lead-acid batteries, featuring a 16-bit digital telemetry system and I2C interface.
Operating Conditions:
- Supply voltage: 4.5–35 V
- Operating junction temperature: -40 to 125 °C
- Battery voltage: 2.7–35 V
- DVCC logic reference level: 1.8–5.5 V
Absolute Maximum Ratings:
- Max supply voltage (VIN, BATSENS+, VOUT, VOUTA): 36 V
- Max switch current (ISW): ±3.5 A
- Max storage temperature: -65 to 150 °C
Key Specs:
- Input Supply Voltage (VIN): 4.5–35 V
- Max Charge Current: 3.2 A (from description)
- Switching Frequency (fOSC): 1.4–1.6 MHz (typ 1.5 MHz)
- Primary Switch On-Resistance (RSWITCH): 90 mΩ (typ)
- Rectifier Switch On-Resistance (RRECT): 90 mΩ (typ)
- VIN Charger Enable Undervoltage Lockout (VIN_UVLO) Rising Threshold: 4.4 V (typ)
- I2C Address: 0b1101000[R/W]
- SCL Clock Frequency (FSCL): 400 kHz (max)
Features:
- Lead-Acid Battery Charger with Absorb and Equalize
- Wide Charging Input Voltage Range: 4.5V to 35V
- High Efficiency Synchronous Operation
- 16-Bit Digital Telemetry System Monitors V BAT , I BAT , R BAT , T BAT , T DIE , V IN , I IN , V OUT
- Charges 6V, 12V, 18V and 24V Lead-Acid Batteries
- Input MPPT for Solar Panel Inputs
- Low Loss PowerPath™
- Instant-On Operation with Discharged or Missing Battery
- Temperature Controlled Charging
Applications:
- Medical Instruments
- USB-C Power Delivery
- Industrial Handhelds
- Ruggedized Notebook
- Tablet Computers
Package:
- 28-pin 4mm × 5mm × 0.75mm QFN surface mount package
Features
- n Lead-Acid Battery Charger with Absorb and Equalize
- n Wide Charging Input Voltage Range: 4.5V to 35V
- n High Efficiency Synchronous Operation
- n 16-Bit Digital Telemetry System Monitors V BAT , I BAT , R BAT , T BAT , T DIE , V IN , I IN , V OUT
- n Charges 6V, 12V, 18V and 24V Lead-Acid Batteries
- n Input Undervoltage Charge Current Limit Loop
- n Input MPPT for Solar Panel Inputs
- n Input Current Limit Prioritizes System Load Output
- n Low Loss PowerPath™
- n Instant-On Operation with Discharged or Missing Battery
- n Temperature Controlled Charging
- n Pin Compatible with Li-Ion and LiFePO 4 Versions
Applications
- n Medical Instruments
- n USB-C Power Delivery
- n Industrial Handhelds
- n Ruggedized Notebook
- n Tablet Computers
Pin Configuration
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full specified operating junction temperature range, otherwise specifications are at T A = 25°C (Note 4). V IN = 18V, DV CC = 3.3V, R SNSI = 10mΩ, RSNSB = 10mΩ unless otherwise noted.
| SYMBOL | PARAMETER | CONDITIONS | MIN | TYP | MAX | UNITS | |
|---|---|---|---|---|---|---|---|
| System Voltages and Currents | System Voltages and Currents | System Voltages and Currents | System Voltages and Currents | System Voltages and Currents | System Voltages and Currents | System Voltages and Currents | System Voltages and Currents |
| V IN | Input Supply Voltage | l | 4.5 | 35 | V | ||
| V BAT | Battery Voltage | l | 2.7 | 35 | V | ||
| I BATSENS + | Battery Drain Current | V IN - V BATSENS + > V IN_DUVLO , Terminated V IN - V BATSENS + < V IN_DUVLO V IN = 0, SHIPMODE Activated | 0.5 54 2.8 | 1 100 5 | μA μA μA | ||
| I VIN | V IN Drain Current | V IN - V BATSENS + > V IN_DUVLO , Terminated | 115 | 200 | μA | ||
| Switching Battery Charger | Switching Battery Charger | Switching Battery Charger | Switching Battery Charger | Switching Battery Charger | Switching Battery Charger | Switching Battery Charger | Switching Battery Charger |
| V CHARGE | Range Resolution (6 Bits) Accuracy | Per 6V Battery | l | -0.5 -1.5 | 6-7.8 28.571 | 0.5 1.5 | V mV % % |
| I CHARGE Servo Voltage (V CSP - V CSN ) | Range Resolution (5 Bits) Accuracy | I CHARGE = (V CSP - V CSN )/R SNSB Note 5 | l | -0.25 -0.75 | 1-32 1 | 0.25 0.75 | mV mV mV mV |
| I INLIM Servo Voltage (V CLP - V CLN ) | Range Resolution (6 Bits) Accuracy | I IN = (V CLP - V CLN )/R SNSI Note 6 | -0.2 | 0.5-32 0.5 | 0.2 | mV mV mV | |
| V INLIM | Range Resolution (8 Bits) Full Scale Accuracy | -1 | 0.14-36 140.625 | 1 | V mV % | ||
| f OSC | Switching Frequency | R T = 63.4k | l | 1.4 | 1.5 | 1.6 | MHz |
| D MAX | Maximum Duty Cycle | 99.5 | % | ||||
| R SWITCH | Primary Switch On-Resistance | 90 | mΩ | ||||
| R RECT | Rectifier Switch On-Resistance | 90 | mΩ | ||||
| I PEAK | Peak Inductor Current Limit | Note 3 | 45mV/R SNSB | A | |||
| System Controls | System Controls | System Controls | System Controls | System Controls | System Controls | System Controls | System Controls |
| V IN_UVLO | V IN Charger Enable Input Undervoltage Lockout | Rising Threshold Hysteresis | 4.2 | 4.4 0.2 | 4.6 | V V | |
| V IN_DUVLO | V IN to BATSENS+ Charger Enable Differential Undervoltage Lockout | Rising Threshold Hysteresis | 100 | 150 170 | 200 | mV mV | |
| V IN_OVLO | V IN Charger Disable Overvoltage Lockout | Rising Threshold Hysteresis | 37.6 | 38.6 1.4 | 40 | V V | |
| V INTVCC_UVLO | INTV CC Telemetry Enable Undervoltage Lockout | Rising Threshold Hysteresis | 2.75 | 2.85 0.12 | 2.95 | V V |
Electrical Characteristics
The l denotes the specifications which apply over the full specified operating junction temperature range, otherwise specifications are at T A = 25°C (Note 4). V IN = 18V, DVCC = 3.3V, R SNSI = 10mΩ, RSNSB = 10mΩ unless otherwise noted.
| SYMBOL | PARAMETER | CONDITIONS | MIN | TYP | MAX | UNITS | |
|---|---|---|---|---|---|---|---|
| Telemetry A/D Measurement Subsystem | Telemetry A/D Measurement Subsystem | Telemetry A/D Measurement Subsystem | Telemetry A/D Measurement Subsystem | Telemetry A/D Measurement Subsystem | Telemetry A/D Measurement Subsystem | Telemetry A/D Measurement Subsystem | Telemetry A/D Measurement Subsystem |
| I BAT (V CSP - V CSN ) | Resolution Offset Error Span Error | I BAT = (V CSP - V CSN )/R SNSB 0.32mV < V CSP - V CSN < 32mV | -0.15 -1 | 1.466 | 0.15 1 | μV /LSB mV %rdng | |
| I IN (V CLP - V CLN ) | Resolution Offset Error Span Error | I IN = (V CLP - V CLN )/R SNSI 0.32mV < V CLP - V CLN < 32mV | -0.15 -1 | 1.466 | 0.15 1 | μV/LSB mV %rdng | |
| V IN | Resolution Offset Error Span Error | 3V < V IN < 35V | -25 -1 | 1.649 | 25 1 | mV/LSB mV %rdng | |
| V BATSENS + (Per 6V Battery) | Resolution Offset Error Span Error | 2V < V BATSENS + < 7.8V | -10 -1 | 192.4 | 10 1 | μV/LSB mV %rdng | |
| V OUT | Resolution Offset Error Span Error | 3V < V OUT < 35V | -25 -1 | 1.653 | 25 1 | mV/LSB mV %rdng | |
| V NTC /V NTCBIAS | Resolution Offset Error Span Error | 0 < V NTC /V NTCBIAS < 1 | -1 -1 | 45.833 | 1 1 | μV/V/LSB mV/V %rdng | |
| T_die | Resolution Offset | 0.0215 -264.4 | °C/LSB °C | ||||
| Serial Port, SDA, SCL, SMBALERT | Serial Port, SDA, SCL, SMBALERT | Serial Port, SDA, SCL, SMBALERT | Serial Port, SDA, SCL, SMBALERT | Serial Port, SDA, SCL, SMBALERT | Serial Port, SDA, SCL, SMBALERT | Serial Port, SDA, SCL, SMBALERT | Serial Port, SDA, SCL, SMBALERT |
| DV CC | Logic Reference Level | l | 1.8 | 5.5 | V | ||
| I DVCCQ | DV CC Current | SCL/SDA = DV CC , 0kHz | 0 | μA | |||
| ADDRESS | I 2 C Address | 0b1101000[R/W] | |||||
| V IHI2C | Input High Threshold | 70 | %DV CC | ||||
| V ILI2C | Input Low Threshold | 30 | %DV CC | ||||
| V OLI2C | Digital Output Low (SDA/ SMBALERT ) | I SDA/ SMBALERT = 3mA | 400 | mV | |||
| F SCL | SCL Clock Frequency | 400 | kHz | ||||
| t LOW | LOW Period of SCL Clock | 1.3 | μs | ||||
| t HIGH | HIGH Period of SCL Clock | 0.6 | μs | ||||
| t BUF | Bus Free Time Between Start and Stop Conditions | 1.3 | μs | ||||
| t HD,STA | Hold Time, After (Repeated) Start Condition | 0.6 | μs | ||||
| t SU,STA | Setup Time after a Repeated Start Condition | 0.6 | μs | ||||
| t SU,STO | Stop Condition Set-Up Time | 0.6 | μs | ||||
| t HD,DAT(OUT) | Output Data Hold Time | 0 | 900 | ns | |||
| t HD,DAT(IN) | Input Data Hold Time | 0 | ns | ||||
| t SU,DAT | Data Set-Up Time | 100 | ns | ||||
| t SP | Input Spike Suppression Pulse Width | 50 | ns |
Rev B
Thermal Information
When the switching battery charger is enabled at an elevated ambient temperature, LTC4162 self heating may push its junction temperature to an unacceptable level. To prevent overheating the LTC4162 monitors its own die_temp and automatically reduces the icharge_dac to limit power dissipation. The differential servo voltage at CSP to CSN can drop to as low as 1mV giving about 3% (1/32) of the maximum charge current. The thermal regulation algorithm achieves this by enforcing a maximum icharge_dac setting which drops linearly from 31 to 0 as die_temp increases from thermal_reg_start_temp (default 120°C) to thermal_reg_end_temp (default 125°C). When the thermal regulation algorithm is active, charge_status becomes thermal_reg_active. A thermal_reg_active_alert can be set with en_thermal_reg_active_alert and cleared by writing either back to 0. Thermal regulation can be programmed to any temperature within the LTC4162's operating range.
Typical Application
9V to 35V, 3.2A Step-Down Switching Battery Charger with PowerPath
Related Variants
The following components are covered by the same datasheet.
| Part Number | Manufacturer | Package |
|---|---|---|
| LTC4162 | Analog Devices | QFN-28 (4mm x 5mm x 0.75mm) |
| LTC4162-F | Analog Devices | — |
| LTC4162-L | Analog Devices | — |
| LTC4162-S | Analog Devices | — |
| LTC4162-SST | Analog Devices | — |
| LTC4162EUFD-SAD | Analog Devices | — |
| LTC4162EUFD-SADM | Analog Devices | — |
| LTC4162EUFD-SST | Analog Devices | — |
| LTC4162EUFD-SSTM | Analog Devices | — |
| LTC4162IUFD-SAD | Analog Devices | — |
| LTC4162IUFD-SADM | Analog Devices | — |
| LTC4162IUFD-SST | Analog Devices | — |
| LTC4162IUFD-SSTM | Analog Devices | — |
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