BQ24075
BQ2407x Standalone 1-Cell 1.5-A Linear Battery Chargers with Power Path
Manufacturer
ti
Overview
Part: BQ24072, BQ24073, BQ24074, BQ24075, BQ24079
Type: Standalone 1-Cell 1.5-A Linear Battery Chargers with Power Path
Key Specs:
- Maximum charge current: 1.5 A
- Input voltage rating: 28 V
- USB input current limit: 100 mA, 500 mA (selectable)
- Wall adapter input current limit: up to 1.5 A (programmable)
Features:
- Fully compliant USB charger
- Integrated dynamic power path management (DPPM)
- 28-V Input rating with overvoltage protection
- Supports up to 1.5-A charge current with current monitoring output (ISET)
- Programmable input current limit up to 1.5 A for wall adapters
- Reverse current, short-circuit and thermal protection
- NTC thermistor input
- Status indication charging/done, power good
- Functional Safety-Capable (BQ24074)
- Safety-Related Certification: IEC 62368-1 Certification (BQ24072)
Applications:
- TWS Charging case and headphones
- Gaming accessory
- Video doorbells, IP network cameras
- Asset tracking and fleet management
- Portable medical devices
Package:
- VQFN (16): 3.00 mm × 3.00 mm
Features
- Fully compliant USB charger
- Selectable 100-mA and 500-mA maximum input current
- 100-mA Maximum current limit ensures compliance to USB-IF standard
- Input-based dynamic power management (VIN-DPM) for protection against poor USB sources
- Functional Safety-Capable (BQ24074)
- Documentation available to aid functional safety system design
- 28-V Input rating with overvoltage protection
- Integrated dynamic power path management (DPPM) function simultaneously and independently powers the system and charges the battery
- Supports up to 1.5-A charge current with current monitoring output (ISET)
- Programmable input current limit up to 1.5 A for wall adapters
- System output tracks battery voltage (BQ24072)
- Programmable termination current (BQ24074)
- Battery disconnect function with SYSOFF input (BQ24075, BQ24079)
- Programmable pre-charge and fast-charge safety
- Reverse current, short-circuit and thermal protection
- NTC thermistor input
- Proprietary start-up sequence limits inrush current
- Status indication charging/done, power good
- Safety-Related Certification:
- IEC 62368-1 Certification (BQ24072)
Applications
- TWS Charging case and headphones
- Gaming accessory
- · Video doorbells, IP network cameras
- Asset tracking and fleet management
- Portable medical devices
3 Description
The BQ2407x series of devices are integrated Li-lon linear chargers and system power path management devices targeted at space-limited portable applications. The devices operate from either a USB port or an AC adapter and support charge currents up to 1.5 A. The input voltage range with input overvoltage protection supports unregulated adapters. The USB input current limit accuracy and start up sequence allow the BQ2407x to meet USB- IF inrush current specifications. Additionally, the input dynamic power management (VIN-DPM) prevents the charger from crashing incorrectly configured USB sources.
The BQ2407x features dynamic power path management (DPPM) that powers the system while simultaneously and independently charging the battery. The DPPM circuit reduces the charge current when the input current limit causes the system output to fall to the DPPM threshold; thus, supplying the system load at all times while monitoring the charge current separately. This feature reduces the number of charge and discharge cycles on the battery, allows for proper charge termination and enables the system to run with a defective or absent battery pack.
Device Information
| PART NUMBER (1) | PACKAGE | BODY SIZE (NOM) | |----------------------------|-----------|-------------------|--|--| | BQ24072 | | BQ24073 | | BQ24074 | VQFN (16) | 3.00 mm × 3.00 mm | | BQ24075 | | BQ24079 | For all available packages, see the orderable addendum at the end of the data sheet.
Typical Application Circuit
Table of Contents
| 1 Features1 | 10 Application and Implementation33 |
|----------------------------------------|--------------------------------------------------------|--|
| 2 Applications1 | 10.1 Application Information 33 |
| 3 Description1 | 10.2 Typical Application 33 |
| 4 Revision History 2 | 10.3 System Examples 38 |
| 5 Description (continued) 5 | 11 Power Supply Recommendations39 |
| 6 Device Comparison Table6 | 12 Layout40 |
| 7 Pin Configuration and Functions7 | 12.1 Layout Guidelines 40 |
| 8 Specifications 10 | 12.2 Layout Example 41 |
| 8.1 Absolute Maximum Ratings(1)
10 | 12.3 Thermal Considerations42 |
| 8.2 ESD Ratings 10 | 13 Device and Documentation Support43 |
| 8.3 Recommended Operating Conditions10 | 13.1 Device Support 43 |
| 8.4 Thermal Information 11 | 13.2 Receiving Notification of Documentation Updates43 |
| 8.5 Electrical Characteristics12 | 13.3 Support Resources 43 |
| 8.6 Typical Characteristics14 | 13.4 Trademarks43 |
| 9 Detailed Description17 | 13.5 Electrostatic Discharge Caution43 |
| 9.1 Overview17 | 13.6 Glossary43 |
| 9.2 Functional Block Diagram18 | 14 Mechanical, Packaging, and Orderable |
| 9.3 Feature Description19 | Information 43 |
| 9.4 Device Functional Modes31 |
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
| Changes from Revision M (August 2019) to Revision N (October 2021) | Page |
|---|---|
| • Added Functional Safety-Capable (BQ24074) to Features1 | |
| • Added Safety-Related Certification: IEC 62368-1 Certification (BQ24072) to Features1 | |
| • Changed Applications1 | |
| • Changed BQ24079T information and package in Section 6 6 | |
| • Added IBAT(PDWN) TYP value12 | |
| • Added IIN TYP values | 12 |
| • Added ICC TYP value12 | |
| Changes from Revision L (June 2018) to Revision M (August 2019) | Page |
| • Changed the document title1 | |
| • Changed the Device Comparison Table6 | |
| • Deleted the Dissipation Ratings table11 | |
| • Changed VIN-LOW To VIN-DPM in the Functional Block Diagram | 18 |
| • Changed text From: "the DPPM loop or the VIN-(LOW) loop." To: "the DPPM loop or the VIN-DPM loop." in the | |
| Battery Charging secton24 | |
| • Chganged text From: " input voltage has fallen to VIN(LOW)" To: "input voltage has fallen to VIN-DPM" in the | |
| Dynamic Charge Timers (TMR Input) scrtion27 | |
| • Changed Equation 11 42 | |
| Changes from Revision K (March 2015) to Revision L (June 2018) | Page |
| • Deleted MARKINGS from the Device Comparison Table6 | |
| • Added the RGT0016B and RGT0016C package information to the Device Comparison Table6 | |
| • Changed the Pinout images and descriptions7 | |
| • Change description of the CE pin From: "Connect CE to a high logic level to place the battery charger in | |
| standby mode. In standby mode," To ""Connect CE to a high logic level to disable battery charging. OUT is | |
| active and battery supplement mode is still available."7 | |
| • "Changed text in the third paragraph of the Power On section From: When VOUT is above VSC," To: "When | |
| VOUT is above VO(SC1),"19 | |
| • | Changed text From: "The valid resistor range is 590 Ω to 5.9 kΩ." To: "The valid resistor range is 590 Ω to 8.9
kΩ." in the Battery Charging section24 |
|--------|--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------|------|
| • | Changed From: VIN(DT) To: VBAT + VIN(DT) in Table 9-1
28 |
| • | Changed INTC To: ITS in Figure 9-9
29 |
| | Changes from Revision J (January 2015) to Revision K (March 2015) | Page |
| • | Deleted package type code from Device Comparison Table. See the POA at the end of the data sheet6 |
| • | Changed ICHG Battery fast charge current range MIN specification from "150 mA" to "100 mA"12 |
| | Changes from Revision I (January 2014) to Revision J (January 2015) | Page |
| • | Added ESD Ratings table, Feature Description section, Device Functional Modes, Application and
Implementation section, Power Supply Recommendations section, Layout section, Device and
Documentation Support section, and Mechanical, Packaging, and Orderable Information section1 |
| | Changes from Revision H (December 2013) to Revision I (January 2014) | Page |
| • | Changed resistor value from "3 kΩ" to "8.9 kΩ" in the Pin Functions table ISET Description paragraph7 |
| •
• | Changed RISET spec MAX value from "3000" to "8900" in the Recommended Operating Conditions table
Changed resistor value from "3 kΩ" to "5.9 kΩ" in the Battery Charging section paragraph24 | 10 |
| | Changes from Revision G (July 2011) to Revision H (December 2013) | Page |
| • | Changed ICHG Battery fast charge current range MIN specification from "300 mA" to "150 mA"12 |
| | Changes from Revision F (September 2010) to Revision G (July 2011) | Page |
| • | Added ESD human body model specification to Abs Maximum Ratings table10 |
| | Changes from Revision E (August 2010) to Revision F (September 2010) | Page |
| • | Changed 10 x 45 s/kΩ to 10 x 48 s/kΩ under section Program 6.25hour(TMR) | 34 |
| | Changes from Revision D (June 2009) to Revision E (August 2010) | Page |
| • | Changed globally RT1 and RT2 to Rs and Rp29 |
| • | Added equations 2 and 3 plus explanations and table29 |
| | Changes from Revision C (March 2009) to Revision D (June 2009) | Page |
| • | Added Device number BQ240791 |
| | Changes from Revision B (January 2009) to Revision C (March 2009) | Page |
| • | Changed Maximum input current factor values12 |
| | Changes from Revision A (December 2008) to Revision B (January 2009) | Page |
| • | Changed VBAT(REG) max value From 4.24 V To: 4.23 V12 |
| Changes from Revision * (September 2008) to Revision A (December 2008) | Page | |
|---|---|---|
| • | Changed device Features1 | |
| • | Changed Description1 | |
| • | Changed Typical Application Circuit1 | |
| • | Changed description of CHG pin7 | |
| • | Changed SYSOFF Description7 | |
| • | Added Figure 10-5 through Figure 8-1 | 14 |
| • | Changed DETAILED FUNCTIONAL DESCRIPTION section17 | |
| • | Changed the Functional Block Diagram 18 | |
| • | Changed text in section - STATUS INDICATORS ( PGOOD, CHG)28 | |
| • | Changed Table - CHG STATUS INDICATOR | 28 |
| • | Changed Equation 8 and Equation 9 29 | |
| • | Changed APPLICATION CIRCUITS section | 33 |
| • | Added Using BQ24075 to Disconnect the Battery from the System, Figure 10-1338 | |
| • | Changed section - Half-Wave Adaptors39 | |
Pin Configuration
Figure 7-1. BQ24072, BQ24073 RGT0016B Package 16 Pins Top View
Figure 7-2. BQ24074 RGT0016B Package 16 Pins Top View
Figure 7-3. BQ24075 RGT0016C Package, BQ24079 RGT0016B Package 16 Pins Top View
Table 7-1. Pin Functions
| PIN | RECORDITION | ||||
|---|---|---|---|---|---|
| NAME | '72, '73 | '74 | '75, '79 | 1/0 | DESCRIPTION |
| BAT | 2, 3 | 2, 3 | 2, 3 | I/O | Charger Power Stage Output and Battery Voltage Sense Input. Connect BAT to the positive terminal of the battery. Bypass BAT to VSS with a 4.7-µF to 47-µF ceramic capacitor. |
| CE | 4 | 4 | 4 | ı | Charge Enable Active-Low Input. Connect $\overline{CE}$ to a high logic level to disable battery charging. OUT is active and battery supplement mode is still available. Connect $\overline{CE}$ to a low logic level to enable the battery charger. $\overline{CE}$ is internally pulled down with approximately 285 k $\Omega$ . Do not leave $\overline{CE}$ unconnected to ensure proper operation. |
| CHG | 9 | 9 | 9 | 0 | Open-Drain Charging Status Indication Output. $\overline{CHG}$ pulls to VSS when the battery is charging. $\overline{CHG}$ is high impedance when charging is complete and when charger is disabled. Connect $\overline{CHG}$ to the desired logic voltage rail using a $1k\Omega$ - $100k\Omega$ resistor, or use with an LED for visual indication. |
| EN1 | 6 | 6 | 6 | I | Input Current Limit Configuration Inputs. Use EN1 and EN2 control the maximum input current and enable |
| EN2 | 5 | 5 | 5 | I | USB compliance. See Table 7-2 for the description of the operation states. EN1 and EN2 are internally pulled down with ≉285 kΩ. Do not leave EN1 or EN2 unconnected to ensure proper operation. |
| ILIM | 12 | 12 | 12 | ı | Adjustable Current Limit Programming Input. Connect a 1100-Ω to 8-kΩ resistor from ILIM to VSS to program the maximum input current (EN2=1, EN1=0). The input current includes the system load and the battery charge current. Leaving ILIM unconnected disables all charging. |
| IN | 13 | 13 | 13 | ı | Input Power Connection. Connect IN to the external DC supply (AC adapter or USB port). The input operating range is 4.35 V to 6.6 V (BQ24072, BQ24073, BQ24075, and BQ24079) or 4.35 V to 10.5 V (bq24074). The input can accept voltages up to 26 V without damage but operation is suspended. Connect bypass capacitor 1 $\mu$ F to 10 $\mu$ F to VSS. |
| ISET | 16 | 16 | 16 | I/O | Fast Charge Current Programming Input. Connect a $590-\Omega$ to $8.9$ - $k\Omega$ resistor from ISET to VSS to program the fast charge current level. Charging is disabled if ISET is left unconnected. While charging, the voltage at ISET reflects the actual charging current and can be used to monitor charge current. See Section 9.3.5.1 for more details. |
| ITERM | - | 15 | _ | ı | Termination Current Programming Input. Connect a $0-\Omega$ to $15-k\Omega$ resistor from ITERM to VSS to program the termination current. Leave ITERM unconnected to set the termination current to the default 10% termination threshold. |
| OUT | 10, 11 | 10, 11 | 10, 11 | 0 | System Supply Output. OUT provides a regulated output when the input is below the OVP threshold and above the regulation voltage. When the input is out of the operation range, OUT is connected to V BAT except when SYSOFF is high (BQ24075 and BQ24079 only). Connect OUT to the system load. Bypass OUT to VSS with a 4.7-µF to 47-µF ceramic capacitor. |
| PGOOD | 7 | 7 | 7 | 0 | Open-drain Power Good Status Indication Output. $\overline{PGOOD}$ pulls to VSS when a valid input source is detected. $\overline{PGOOD}$ is high-impedance when the input power is not within specified limits. Connect $\overline{PGOOD}$ to the desired logic voltage rail using a 1-k $\Omega$ to 100-k $\Omega$ resistor, or use with an LED for visual indication. |
| SYSOFF | - | _ | 15 | I | System Enable Input. Connect SYSOFF high to turn off the FET connecting the battery to the system output. When an adapter is connected, charging is also disabled. Connect SYSOFF low for normal operation. SYSOFF is internally pulled up to $V_{BAT}$ through a large resistor (approximately 5 M $\Omega$ ). Do not leave SYSOFF unconnected to ensure proper operation. |
Table 7-1. Pin Functions (continued)
| | PIN |
|----------------|----------|-----|----------|-----|--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------|
| NAME | '72, '73 | '74 | '75, '79 | I/O | DESCRIPTION |
| TD | 15 | – | – | I | Termination Disable Input. Connect TD high to disable charger termination. Connect TD to VSS to enable
charger termination. TD is checked during startup only and cannot be changed during operation. See the TD
section in this datasheet for a description of the behavior when termination is disabled. TD is internally pulled
down to VSS with approximately 285 kΩ. Do not leave TD unconnected to ensure proper operation. |
| Thermal
Pad | — | — | — | – | There is an internal electrical connection between the exposed thermal pad and the VSS pin of the device.
The thermal pad must be connected to the same potential as the VSS pin on the printed circuit board. Do not
use the thermal pad as the primary ground input for the device. VSS pin must be connected to ground at all
times. |
| TMR | 14 | 14 | 14 | I | Timer Programming Input. TMR controls the pre-charge and fast-charge safety timers. Connect TMR to VSS
to disable all safety timers. Connect a 18-kΩ to 72-kΩ resistor between TMR and VSS to program the timers a
desired length. Leave TMR unconnected to set the timers to the default values. |
| TS | 1 | 1 | 1 | I | External NTC Thermistor Input. Connect the TS input to the NTC thermistor in the battery pack. TS monitors a
10kΩ NTC thermistor. For applications that do not use the TS function, connect a 10-kΩ fixed resistor from TS
to VSS to maintain a valid voltage level on TS. |
| VSS | 8 | 8 | 8 | – | Ground. Connect to the thermal pad and to the ground rail of the circuit. |
Table 7-2. EN1/EN2 Settings
| EN2 | EN1 | MAXIMUM INPUT CURRENT INTO IN PIN |
|-----|-----|----------------------------------------------|--|--|--|--|
| 0 | 0 | 100 mA. USB100 mode |
| 0 | 1 | 500 mA. USB500 mode |
| 1 | 0 | Set by an external resistor from ILIM to VSS |
| 1 | 1 | Standby (USB suspend mode) |
Electrical Characteristics
Over junction temperature range ( $0^{\circ} \le T_J \le 125^{\circ}C$ ) and the recommended supply voltage range (unless otherwise noted)
| PARAMETER | TE | ST CONDITIONS | MIN | TYP | MAX | UNIT | |
|---|---|---|---|---|---|---|---|
| INPUT | |||||||
| UVLO | Undervoltage lock-out | V IN : 0 V → 4 V | 3.2 | 3.3 | 3.4 | V | |
| V hys | Hysteresis on UVLO | V IN : 4 V → 0 V | 200 | 300 | mV | ||
| V IN(DT) | Input power detection threshold | Input power detected will V BAT = 3.6 V, VIN: 3.5 V | hen V IN > V BAT + V IN(DT) ′ → 4 V | 55 | 80 | 130 | mV |
| V hys | Hysteresis on V IN(DT) | V BAT = 3.6 V, V IN : 4 V — | → 3.5 V | 20 | mV | ||
| t DGL(PGOOD) | Deglitch time, input power detected status | Time measured from V II rise-time to PGOOD = L | N : 0 V → 5 V 1 μs .O | 1.2 | ms | ||
| $V_{IN}$ : 5 V $\rightarrow$ 7 V | ('72, '73, '75, '79) | 6.4 | 6.6 | 6.8 | |||
| V OVP | Input overvoltage protection threshold | V IN : 5 V → 11 V | ('74) | 10.2 | 10.5 | 10.8 | V |
| V IN : 7 V → 5V | ('72, '73, '75, '79) | 110 | |||||
| V hys | Hysteresis on OVP | V IN : 11 V → 5 V | ('74) | 175 | mV | ||
| t DGL(OVP) | Input overvoltage blanking time (OVP fault deglitch) | 50 | μs | ||||
| t REC | Input overvoltage recovery time | Time measured from V II fall-time to PGOOD = Lo | 1.2 | ms | |||
| ILIM, ISET SI | HORT-CIRCUIT DETECTION (CHECKED DURING STA | ARTUP) | ' | ' | |||
| I SC | Current source | V IN > UVLO and V IN > \ | / BAT + V IN(DT) | 1.3 | mA | ||
| V SC | V IN > UVLO and V IN > \ | / BAT + V IN(DT) | 520 | mV | |||
| QUIESCENT | CURRENT | 1 | - | , | |||
| I BAT(PDWN) | Sleep current into BAT pin | CE = LO or HI, input po No load on OUT pin, T J | 4.3 | 6.5 | μA | ||
| Other diversions tinto INI min | EN1= HI, EN2=HI, V IN = | = 6 V, T J = 85°C | 41.3 | 50 | |||
| I IN | Standby current into IN pin | EN1= HI, EN2=HI, V IN = | = 10 V, T J = 85°C | 99.8 | 200 | μA | |
| I CC | Active supply current, IN pin | $\overline{\text{CE}}$ = LO, V IN = 6 V, no V BAT > V BAT(REG) , (EN1, | 1.1 | 1.5 | mA | ||
| POWER PAT | H | ||||||
| V DO(IN-OUT) | $V_{IN} - V_{OUT}$ | V IN = 4.3 V, I IN = 1 A, V E | BAT = 4.2 V | 300 | 475 | mV | |
| V DO(BAT-OUT) | V BAT – V OUT | I OUT = 1 A, V IN = 0 V, V E | BAT > 3 V | 50 | 100 | mV | |
| $V_{IN} > V_{OUT} + V_{DO(IN-OUT)}, V_{BAT} < 3.2 V$ | 3.3 | 3.4 | 3.5 | ||||
| $V_{O(REG)}$ | OUT pin voltage regulation (BQ24072) | V IN > V OUT + V DO(IN-OUT | V BAT + 150mV | V BAT + 225mV | V BAT + 270mV | V | |
| , , | OUT pin voltage regulation (BQ24073, BQ24074) | V IN > V OUT + V DO(IN-OUT | 4.3 | 4.4 | 4.5 | ||
| OUT pin voltage regulation (BQ24075, BQ24079) | $V_{IN} > V_{OUT} + V_{DO(IN-OUT)}$ | 5.4 | 5.5 | 5.6 | |||
| EN1 = LO, EN2 = LO | 90 | 95 | 100 | mA | |||
| I IN max | Maximum input current | EN1 = HI, EN2 = LO | 450 | 475 | 500 | IIIA | |
| EN2 = HI, EN1 = LO | $K_{ILIM}/R_{ILIM}$ | Α | |||||
| K ILIM | Maximum input current factor | I LIM = 500 mA to 1.5 A | 1500 | 1610 | 1720 | ΑΩ | |
| NLIM | Waximum input current factor | I LIM = 200 mA to 500 m/ | 4 | 1330 | 1525 | 1720 | /\\\\\\\\\\\\\\\\\\\ |
| I IN max | Programmable input current limit range | EN2 = HI, EN1 = LO, R | ILIM = 8 kΩ to 1.1 kΩ | 200 | 1500 | mA | |
| V IN-DPM | Input voltage threshold when input current is reduced | EN2 = LO, EN1 = X | 4.35 | 4.5 | 4.63 | V | |
| $V_{DPPM}$ | Output voltage threshold when charging current is reduced | ('72, '73, '74) | V O(REG) – 180mV | V O(REG) – 100mV | V O(REG) – 30mV | V | |
| ('75, '79) | 4.2 | 4.3 | 4.4 | V | |||
| V BSUP1 | Enter battery supplement mode | V BAT = 3.6 V, R ILIM = 1.5 | 5 k $\Omega$ , R LOAD = 10 $\Omega \rightarrow$ 2 $\Omega$ | \ | V OUT ≤ V BAT – 40mV | V | |
| V BSUP2 | Exit battery supplement mode | V BAT = 3.6 V, R ILIM = 1.5 | $5$ kΩ, R LOAD = 2 Ω $\rightarrow$ 10 Ω | V OUT ≥ V BAT – 20mV | V | ||
| V O(SC1) | Output short-circuit detection threshold, power-on | V IN > V UVLO and V IN > V | / BAT + V IN(DT) | 0.8 | 0.9 | 1 | V |
| V O(SC2) | Output short-circuit detection threshold, supplement mode V BAT – V OUT > V O(SC2) indicates short-circuit | V IN > V UVLO and V IN > \ | / BAT + V IN(DT) | 200 | 250 | 300 | mV |
| -() | BA1 001 0(002) | ||||||
| t DGL(SC2) | Deglitch time, supplement mode short circuit | 250 | μs |
Absolute Maximum Ratings
over the 0°C to 125°C operating free-air temperature range (unless otherwise noted)
| MIN | MAX | UNIT | |||
|---|---|---|---|---|---|
| VI | IN (with respect to VSS) | –0.3 | 28 | V | |
| Input Voltage | BAT (with respect to VSS) | –0.3 | 5 | V | |
| OUT, EN1, EN2, CE, TS, ISET, PGOOD, CHG, ILIM, TMR, ITERM, SYSOFF, TD (with respect to VSS) | –0.3 | 7 | V | ||
| II | Input Current | IN | 1.6 | A | |
| OUT | 5 | A | |||
| IO | Output Current (Continuous) | BAT (Discharge mode) | 5 | A | |
| BAT (Charging mode) | 1.5(2) | A | |||
| Output Sink Current | CHG, PGOOD | 15 | mA | ||
| TJ | Junction temperature | –40 | 150 | °C | |
| Tstg | Storage temperature | –65 | 150 | °C |
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under Section 8.3 is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. All voltage values are with respect to the network ground terminal unless otherwise noted.
Recommended Operating Conditions
| MIN | MAX | UNIT | ||||
|---|---|---|---|---|---|---|
| IN voltage range | 4.35 | 26 | V | |||
| VI | IN operating voltage range | '72, '73, '75, '79 | 4.35 | 6.4 | ||
| '74 | 4.35 | 10.2 | V | |||
| IIN | Input current, IN pin | 1.5 | A | |||
| IOUT | Current, OUT pin | 4.5 | A | |||
| IBAT | Current, BAT pin (Discharging) | 4.5 | A | |||
| ICHG | Current, BAT pin (Charging) | 1.5(2) | A | |||
| TJ | Junction Temperature | –40 | 125 | °C | ||
| RILIM | Maximum input current programming resistor | 1100 | 8000 | Ω | ||
| RISET | Fast-charge current programming resistor (1) | 590 | 8900 | Ω | ||
| RITERM | Termination current programming resistor | 0 | 15 | kΩ | ||
| RTMR | Timer programming resistor | 18 | 72 | kΩ |
(1) Use a 1% tolerance resistor for RISET to avoid issues with the RISET short test when using the maximum charge current setting.
(2) The IC operational charging life is reduced to 20,000 hours, when charging at 1.5A and 125°C. The thermal regulation feature reduces charge current if the IC's junction temperature reaches 125°C; thus without a good thermal design the maximum programmed charge current may not be reached.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
(2) The IC operational charging life is reduced to 20,000 hours, when charging at 1.5A and 125°C. The thermal regulation feature reduces charge current if the IC's junction temperature reaches 125°C; thus without a good thermal design the maximum programmed charge current may not be reached.
Thermal Information
| | | BQ2407x |
|-----------|----------------------------------------------|---------|------|
| | THERMAL METRIC(1) | RGT | UNIT |
| | | 16 PINS |
| RθJA | Junction-to-ambient thermal resistance | 44.5 |
| RθJC(top) | Junction-to-case (top) thermal resistance | 54.2 |
| RθJB | Junction-to-board thermal resistance
17.2 |
| ψJT | Junction-to-top characterization parameter | 1.0 | °C/W |
| ψJB | Junction-to-board characterization parameter | 17.1 |
| RθJC(bot) | Junction-to-case (bottom) thermal resistance | 3.8 |
(1) For more information about traditional and new thermal metrics, see the Semiconductor IC Package Thermal Metrics application report.
8.5 Electrical Characteristics
Over junction temperature range ( $0^{\circ} \le T_J \le 125^{\circ}C$ ) and the recommended supply voltage range (unless otherwise noted)
| PARAMETER | TE | ST CONDITIONS | MIN | TYP | MAX | UNIT | |
|---|---|---|---|---|---|---|---|
| INPUT | |||||||
| UVLO | Undervoltage lock-out | V IN : 0 V → 4 V | 3.2 | 3.3 | 3.4 | V | |
| V hys | Hysteresis on UVLO | V IN : 4 V → 0 V | 200 | 300 | mV | ||
| V IN(DT) | Input power detection threshold | Input power detected will V BAT = 3.6 V, VIN: 3.5 V | hen V IN > V BAT + V IN(DT) ′ → 4 V | 55 | 80 | 130 | mV |
| V hys | Hysteresis on V IN(DT) | V BAT = 3.6 V, V IN : 4 V — | → 3.5 V | 20 | mV | ||
| t DGL(PGOOD) | Deglitch time, input power detected status | Time measured from V II rise-time to PGOOD = L | N : 0 V → 5 V 1 μs .O | 1.2 | ms | ||
| $V_{IN}$ : 5 V $\rightarrow$ 7 V | ('72, '73, '75, '79) | 6.4 | 6.6 | 6.8 | |||
| V OVP | Input overvoltage protection threshold | V IN : 5 V → 11 V | ('74) | 10.2 | 10.5 | 10.8 | V |
| V IN : 7 V → 5V | ('72, '73, '75, '79) | 110 | |||||
| V hys | Hysteresis on OVP | V IN : 11 V → 5 V | ('74) | 175 | mV | ||
| t DGL(OVP) | Input overvoltage blanking time (OVP fault deglitch) | 50 | μs | ||||
| t REC | Input overvoltage recovery time | Time measured from V II fall-time to PGOOD = Lo | 1.2 | ms | |||
| ILIM, ISET SI | HORT-CIRCUIT DETECTION (CHECKED DURING STA | ARTUP) | ' | ' | |||
| I SC | Current source | V IN > UVLO and V IN > \ | / BAT + V IN(DT) | 1.3 | mA | ||
| V SC | V IN > UVLO and V IN > \ | / BAT + V IN(DT) | 520 | mV | |||
| QUIESCENT | CURRENT | 1 | - | , | |||
| I BAT(PDWN) | Sleep current into BAT pin | CE = LO or HI, input po No load on OUT pin, T J | 4.3 | 6.5 | μA | ||
| Other diversions tinto INI min | EN1= HI, EN2=HI, V IN = | = 6 V, T J = 85°C | 41.3 | 50 | |||
| I IN | Standby current into IN pin | EN1= HI, EN2=HI, V IN = | = 10 V, T J = 85°C | 99.8 | 200 | μA | |
| I CC | Active supply current, IN pin | $\overline{\text{CE}}$ = LO, V IN = 6 V, no V BAT > V BAT(REG) , (EN1, | 1.1 | 1.5 | mA | ||
| POWER PAT | H | ||||||
| V DO(IN-OUT) | $V_{IN} - V_{OUT}$ | V IN = 4.3 V, I IN = 1 A, V E | BAT = 4.2 V | 300 | 475 | mV | |
| V DO(BAT-OUT) | V BAT – V OUT | I OUT = 1 A, V IN = 0 V, V E | BAT > 3 V | 50 | 100 | mV | |
| $V_{IN} > V_{OUT} + V_{DO(IN-OUT)}, V_{BAT} < 3.2 V$ | 3.3 | 3.4 | 3.5 | ||||
| $V_{O(REG)}$ | OUT pin voltage regulation (BQ24072) | V IN > V OUT + V DO(IN-OUT | V BAT + 150mV | V BAT + 225mV | V BAT + 270mV | V | |
| , , | OUT pin voltage regulation (BQ24073, BQ24074) | V IN > V OUT + V DO(IN-OUT | 4.3 | 4.4 | 4.5 | ||
| OUT pin voltage regulation (BQ24075, BQ24079) | $V_{IN} > V_{OUT} + V_{DO(IN-OUT)}$ | 5.4 | 5.5 | 5.6 | |||
| EN1 = LO, EN2 = LO | 90 | 95 | 100 | mA | |||
| I IN max | Maximum input current | EN1 = HI, EN2 = LO | 450 | 475 | 500 | IIIA | |
| EN2 = HI, EN1 = LO | $K_{ILIM}/R_{ILIM}$ | Α | |||||
| K ILIM | Maximum input current factor | I LIM = 500 mA to 1.5 A | 1500 | 1610 | 1720 | ΑΩ | |
| NLIM | Waximum input current factor | I LIM = 200 mA to 500 m/ | 4 | 1330 | 1525 | 1720 | /\\\\\\\\\\\\\\\\\\\ |
| I IN max | Programmable input current limit range | EN2 = HI, EN1 = LO, R | ILIM = 8 kΩ to 1.1 kΩ | 200 | 1500 | mA | |
| V IN-DPM | Input voltage threshold when input current is reduced | EN2 = LO, EN1 = X | 4.35 | 4.5 | 4.63 | V | |
| $V_{DPPM}$ | Output voltage threshold when charging current is reduced | ('72, '73, '74) | V O(REG) – 180mV | V O(REG) – 100mV | V O(REG) – 30mV | V | |
| ('75, '79) | 4.2 | 4.3 | 4.4 | V | |||
| V BSUP1 | Enter battery supplement mode | V BAT = 3.6 V, R ILIM = 1.5 | 5 k $\Omega$ , R LOAD = 10 $\Omega \rightarrow$ 2 $\Omega$ | \ | V OUT ≤ V BAT – 40mV | V | |
| V BSUP2 | Exit battery supplement mode | V BAT = 3.6 V, R ILIM = 1.5 | $5$ kΩ, R LOAD = 2 Ω $\rightarrow$ 10 Ω | V OUT ≥ V BAT – 20mV | V | ||
| V O(SC1) | Output short-circuit detection threshold, power-on | V IN > V UVLO and V IN > V | / BAT + V IN(DT) | 0.8 | 0.9 | 1 | V |
| V O(SC2) | Output short-circuit detection threshold, supplement mode V BAT – V OUT > V O(SC2) indicates short-circuit | V IN > V UVLO and V IN > \ | / BAT + V IN(DT) | 200 | 250 | 300 | mV |
| -() | BA1 001 0(002) | ||||||
| t DGL(SC2) | Deglitch time, supplement mode short circuit | 250 | μs |
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