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LMX2571NJKR

RF Synthesizer

The LMX2571NJKR is a rf synthesizer from Texas Instruments. View the full LMX2571NJKR datasheet below including key specifications, electrical characteristics, absolute maximum ratings.

LMX2571NJKR shares its datasheet with LMX2571, whose page lists every part number it covers.

Official LMX2571NJKR datasheet (PDF) — the source this page was extracted from.

Manufacturer

Texas Instruments

Category

RF Synthesizer

Package

36-WFQFN Exposed Pad

LMX2571NJKR Key Specifications

ParameterValue
Differential - Input:OutputYes/No
DigiKey ProgrammableNot Verified
Divider/MultiplierYes/Yes
Frequency - Max1.4GHz
InputClock, Crystal
Mounting TypeSurface Mount
Number of Circuits1
Operating Temperature-40°C ~ 85°C
OutputClock
Package / Case36-WFQFN Exposed Pad
PLLYes with Bypass
Ratio - Input:Output2:2
Supplier Device Package36-WQFN (6x6)
TypeFrequency Synthesizer (RF)
Supply Voltage3.15V ~ 3.45V

LMX2571NJKR Overview

Part: LMX2571 — Texas Instruments

Type: Low-Power RF Synthesizer / PLL with Integrated VCO and FSK Modulation

Description: Wideband fractional-N PLL synthesizer with integrated VCO covering 10 MHz to 1344 MHz, 24-bit delta-sigma modulator, direct digital FSK modulation, and 39 mA typical current in synthesizer mode.

Operating Conditions:

  • Supply voltage (VCC): 3.15–3.45 V
  • Operating temperature: -40 to 85 °C (ambient)
  • Charge pump supply VCP: up to 5 V (PLL mode); VCC to 5 V (synthesizer mode)
  • Junction temperature: up to 125 °C (recommended)

Absolute Maximum Ratings:

  • Max supply voltage (VCC): 3.6 V
  • Max IO supply voltage (VIO): 3.6 V
  • Max charge pump supply voltage (VCP): 5.25 V
  • Max input voltage (VIN): VCC + 0.3 V
  • Max junction temperature: 150 °C
  • Storage temperature: -65 to 150 °C

Key Specs:

  • Supply current, synthesizer mode (internal VCO): 39 mA typ (Config A), up to 51 mA typ (Config D, SE OSCin, fOUT = 480 MHz)
  • Supply current, PLL mode (external VCO): 9 mA typ (Config E) to 21 mA typ (Config G)
  • Power-down current: 0.9 mA typ
  • OSCin frequency range: 10–150 MHz (single-ended or differential); crystal 10–40 MHz
  • Maximum phase detector frequency: 130 MHz
  • Normalized PLL noise floor: -231 dBc/Hz typ (internal charge pump); -226 dBc/Hz typ with 5-V charge pump
  • Normalized PLL 1/f noise: -124 dBc/Hz typ (internal charge pump)
  • VCO frequency: 4300–5376 MHz
  • Open-loop VCO phase noise at 480 MHz: -92.1 dBc/Hz at 100 kHz offset, -121.1 dBc/Hz at 1 MHz offset, -144.5 dBc/Hz at 10 MHz offset (typical values)
  • Charge pump current: 312.5 μA step, up to 7187.5 μA (internal)
  • FSK: 2-, 4- and 8-level in PIN mode, up to 8 kSPs baud rate
  • Thermal resistance RθJA: 32.9 °C/W

Features:

  • Any frequency from 10 MHz to 1344 MHz
  • Low phase noise and spurs (spurs better than -75 dBc/Hz)
  • New FastLock to reduce lock time (under 1.5 ms steps)
  • Technique to remove integer boundary spurs
  • Integrated 5-V charge pump and output divider for external VCO operation
  • 2-, 4-, 8-level or arbitrary level direct digital FSK modulation
  • One TX/RX output or two fanout outputs
  • Crystal, XO or differential reference clock input
  • 24-bit fractional-N delta-sigma modulator
  • MICROWIRE serial interface

Applications:

  • Duplex mode digital professional 2-way radio (dPMR, DMR, PDT, P25 Phase I)
  • Low-power radio communication systems
  • Satcom modem
  • Wireless microphone
  • Proprietary wireless connectivity
  • Handheld test and measurement equipment

Package:

  • WQFN (NJK), 36 pins, 6.00 mm × 6.00 mm

LMX2571NJKR Features

  • 1 · Any Frequency from 10 MHz to 1344 MHz
  • Low Phase Noise and Spurs
  • --123 dBc/Hz at 12.5 kHz Offset at 480 MHz
  • --145 dBc/Hz at 1 MHz Offset at 480 MHz
  • -Normalized PLL Noise Floor of -231 dBc/Hz
  • -Spurious Better Than -75 dBc/Hz
  • New FastLock to Reduce Lock Time
  • A Novel Technique to Remove Integer Boundary Spurs
  • Integrated 5-V Charge Pump and Output Divider for External VCO Operation
  • 2-, 4- and 8-Level or Arbitrary Level Direct Digital FSK Modulation
  • One TX/RX Output or Two Fanout Outputs
  • Crystal, XO or Differential Reference Clock Input
  • Low Current Consumption
  • -39-mA Typical Synthesizer Mode (Internal VCO)
  • -9-mA Typical PLL Mode (External VCO)
  • 24-Bit Fractional-N Delta Sigma Modulator

LMX2571NJKR Applications

  • Duplex Mode Digital Professional 2-Way Radio
  • -dPMR, DMR, PDT, P25 Phase I
  • Low Power Radio Communication Systems
  • -Satcom Modem
  • -Wireless Microphone
  • -Propriety Wireless Connectivity
  • Handheld Test and Measurement Equipment

LMX2571NJKR Pin Configuration

Pin Functions

PIN - NAMEPIN - NO.TYPEDESCRIPTION
Bypass12BypassPlace a 100-nF capacitor to GND.
Bypass23BypassPlace a 100-nF capacitor to GND.
CE19InputChip Enable input. Active HIGH powers on the device.
CLK11InputMICROWIRE clock input.
CPout25OutputInternal VCO charge pump access point to connect to a 2 nd order loop filter.
CPoutExt30Output5-V charge pump output used in PLL mode (external VCO).
DAP0GNDThe DAP should be grounded.
DATA12InputMICROWIRE serial data input.
Fin24InputHigh frequency AC coupled input pin for an external VCO. Leave it open or AC coupled to GND if not being used.
FSK_D07InputFSK data bit 0 (FSK PIN mode) / I2S FS input (FSK I2S mode).
FSK_D16InputFSK data bit 1 (FSK PIN mode) / I2S DATA input (FSK I2S mode).
FSK_D25InputFSK data bit 2 (FSK PIN mode).
FSK_DV4InputFSK data valid input (FSK PIN mode) / I2S CLK input (FSK I2S mode).
FLout129OutputFastLock output control 1 for external switch. Output is HIGH when F1 is selected.
FLout228OutputFastLock output control 2 for external switch. Output is HIGH when F2 is selected.
GND23GNDVCO ground.
GND31GNDCharge pump ground.
GND35GNDOSCin ground.
LE13InputMICROWIRE latch enable input.
MUXout10OutputMultiplexed output that can be assigned to lock detect or readback serial data output.
NC8,14, 26NCDo not connect these pins.
OSCin34InputReference clock input.
OSCin*36InputComplementary reference clock input.
RFoutRx16OutputRF output used to drive receive mixer. Selectable open drain or push-pull output.
RFoutTx17OutputRF output used to drive transmit signal. Selectable open drain or push-pull output.
TrCtl18InputTransmit/Receive control. This pin controls the RF output port and the output frequency selection.

LMX2571NJKR Electrical Characteristics

3.15 V ≤ VCC ≤ 3.45 V, VIO = VCC, -40 °C ≤ TA ≤ 85 °C, except as specified. Typical values are at VCC = VIO = 3.3 V, VCP = 3.3 V or 5 V in synthesizer mode, VCP = 5 V in PLL mode, TA = 25 °C.

PARAMETERPARAMETERTEST CONDITIONSTEST CONDITIONSMINTYPMAXUNIT
CURRENT CONSUMPTIONCURRENT CONSUMPTIONCURRENT CONSUMPTIONCURRENT CONSUMPTIONCURRENT CONSUMPTIONCURRENT CONSUMPTIONCURRENT CONSUMPTIONCURRENT CONSUMPTION
I CCTotal current in synthesizer mode (internal VCO)Configuration A (1)39mA
I CCTotal current in synthesizer mode (internal VCO)Configuration B (2)44mA
I CCTotal current in synthesizer mode (internal VCO)Configuration C (3)Configuration C (3)46mA
I CCTotal current in synthesizer mode (internal VCO)f OUT = 480 MHz SE OSCin Configuration D (4)f OUT = 480 MHz SE OSCin Configuration D (4)51mA
I PLLTotal current in PLL mode (external VCO)Configuration E (5)9mA
I PLLTotal current in PLL mode (external VCO)Configuration F (6)Configuration F (6)15mA
I PLLTotal current in PLL mode (external VCO)Configuration G (7)Configuration G (7)21mA
I CC PDPower down currentCE = 0V or POWERDOWN bit = 1 V = 3.3 V, Push-pull outputCE = 0V or POWERDOWN bit = 1 V = 3.3 V, Push-pull output0.9mA
OSCIN REFERENCE INPUTOSCIN REFERENCE INPUTOSCIN REFERENCE INPUTOSCIN REFERENCE INPUTOSCIN REFERENCE INPUTOSCIN REFERENCE INPUTOSCIN REFERENCE INPUTOSCIN REFERENCE INPUT
f OSCinOSCin frequency rangeSingle-ended or differential inputSingle-ended or differential input10150MHz
V OSCinOSCin input voltage (8)Single-ended inputSingle-ended input1.43.3V
V OSCinOSCin input voltage (8)Differential inputDifferential input0.151.5V
CRYSTAL REFERENCE INPUTCRYSTAL REFERENCE INPUTCRYSTAL REFERENCE INPUTCRYSTAL REFERENCE INPUTCRYSTAL REFERENCE INPUTCRYSTAL REFERENCE INPUTCRYSTAL REFERENCE INPUTCRYSTAL REFERENCE INPUT
f XTALCrystal frequency rangeFundamental model, ESR < 200 ΩFundamental model, ESR < 200 Ω1040MHz
C INOSCin input capacitance1pF
MULTMULTMULTMULTMULTMULTMULTMULT
f MULTinMULT input frequencyMULT > Pre-dividerMULT > Pre-divider1030MHz
f MULToutMULT output frequencyNot supported with crystal reference inputNot supported with crystal reference input60130MHz
PLLPLLPLLPLLPLLPLLPLLPLL
fPhase detector frequencyPDPD130MHz
K PDCharge pump current (9)Programmable minimum valueInternal charge pump312.5μA
K PDCharge pump current (9)Programmable minimum value5-V charge pump625μA
K PDCharge pump current (9)Per programmable stepInternal charge pump312.5μA
K PDCharge pump current (9)Per programmable step5-V charge pump625μA
K PDCharge pump current (9)Programmable maximum valueInternal charge pump7187.5μA
K PDCharge pump current (9)Programmable maximum value5-V charge pump6875μA

LMX2571NJKR Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted) (1)

MINMAXUNIT
V CCPower supply voltage-0.33.6V
V IOIO supply voltage-0.33.6V
V INIO input voltageV CC + 0.3V
V CPCharge pump supply voltage5.25V
T JJunction temperature150°C
T STGStorage temperature-65150°C

over operating free-air temperature range (unless otherwise noted)

MINNOMMAXUNIT
V CCPower supply voltagePower supply voltage3.153.45V
V IOIO supply voltageIO supply voltageV CCV
V CPChargePLL mode (external VCO)5V
V CPChargeSynthesizer mode (internal VCO)V CC5V
T AAmbient temperatureAmbient temperature-4085°C
T JJunction temperatureJunction temperature125°C

LMX2571NJKR Thermal Information

THERMAL METRIC(1)LMX2571 WQFN (NJK) 36 PINSUNIT
R θ JAJunction-to-ambient thermal resistance32.9°C/W
R θ JC(top)Junction-to-case (top) thermal resistance14.5°C/W

LMX2571NJKR Typical Application

Use Equation 4 and Equation 6 to calculate the required FSK steps. For +10 kHz frequency deviation, the FSK step value is equal to [10000 * 16777216 / (104 * 10 6 )] * (5 * 1 / 2) = 4033. For -10 kHz frequency deviation, the FSK step value is equal to 2's complement of 4033 = 61502. Similarly, the FSK step values for ±30 kHz frequency deviation are 12099 and 53436.

All the required configuration values for F2, 928 MHz can be calculated in the similar fashion and are summarized as follows:

Table 41. Frequency Plan Summary

CONFIGURATION PARAMETERF1 (902 MHz)F2 (928 MHz)
Pre-divider11
MULT44
Post-divider11
PDF104 MHz104 MHz
VCO4510 MHz4640 MHz
N-divider21.6826923122.30769231
N integer2122
DEN00
NUM114536765162220
CHDIV155
CHDIV211
FSK_DEV04033
FSK_DEV112099
FSK_DEV261502
FSK_DEV353436

Assume here that the base charge pump current = 1250 μA, CP Gain = 1x and 3 rd order Delta Sigma Modulator without dithering is adopted in both frequency sets. The register settings are summarized as follows:

Table 42. Register Settings Summary

CONFIGURATION PARAMETERSREGISTER BITCOMMON SETTINGF1 SPECIFIC SETTINGF2 SPECIFIC SETTING
VCO calibrationFCAL_EN1 = Enabled
Lock detectSDO_LE_SEL1 = Lock detect output
Lock detectLD_EN1 = Enabled
OSCin buffer typeIPBUF_SE_DIFF_SEL0 = SE input buffer
DitheringDITHERING0 = Disabled
Charge pump gainCP_GAIN1 = 1x
Base charge pump currentCP_IUP8 = 1250 μA
Base charge pump currentCP_IDN8 = 1250 μA
MULT settling timeMULT_WAIT520 = 20 μs
Output buffer typeOUTBUF_RX_TYPE1 = Push pull
Output buffer typeOUTBUF_TX_TYPE1 = Push pull
Output buffer auto muteOUTBUF_AUTOMUTE0 = Disabled
TrCtl pin polarityRXTX_POL0 = Active LOW = TX
TX RX switching modeRXTX_CTRL1 = TrCtl pin control
Enable F1 F2 initializationF1F2_MODE1 = Enabled
F1 F2 switching modeF1F2_CTRL1 = Control by TrCtl pin
Pre-dividerPLL_R_PRE_F11
Pre-dividerPLL_R_PRE_F21
MULT multiplierMULT_F14
MULT multiplierMULT_F24

Table 42. Register Settings Summary (continued)

CONFIGURATION PARAMETERSREGISTER BITCOMMON SETTINGF1 SPECIFIC SETTINGF2 SPECIFIC SETTING
Post-dividerPLL_R_F1
PLL_R_F2
11
ΔΣ modulator orderFRAC_ORDER_F1
FRAC_ORDER_F2
3 = 3 rd order3 = 3 rd order
PFD delayPFD_DELAY_F1
PFD_DELAY_F2
5 = 8 clock cycles5 = 8 clock cycles
CHDIV1 dividerCHDIV1_F1
CHDIV1_F2
1 = Divide by 51 = Divide by 5
CHDIV2 dividerCHDIV2_F1
CHDIV2_F2
0 = Divide by 10 = Divide by 1
Internal 3 rd pole loop filterLF_R3_F1
LF_R3_F2
4 = 800 Ω4 = 800 Ω
Internal 4 th pole loop filterLF_R4_F1
LF_R4_F2
4 = 800 Ω4 = 800 Ω
Output port selectionOUTBUF_TX_EN_F1
OUTBUF_RX_EN_F2
1 = TX port enabled1 = RX port enabled
Output power controlOUTBUF_TX_PWR_F1
OUTBUF_RX_PWR_F2
66
FSK modeFSK_MODE_SEL1 FSK_MODE_SEL000 = FSK PIN mode
FSK levelFSK_LEVEL2 = 4FSK
Enable FSK modulationFSK_EN_F11 = Enabled
FSK deviation at 00FSK_DEV0_F14033 = +10 kHz
FSK deviation at 01FSK_DEV1_F112099 = +30 kHz
FSK deviation at 10FSK_DEV2_F161502 = -10 kHz
FSK deviation at 11FSK_DEV3_F153436 = -30 kHz
Fractional denominatorPLL_DEN_F1[23:16]
PLL_DEN_F1[15:0]
PLL_DEN_F2[23:16]
PLL_DEN_F2[15:0]
0
0
0
0
Fractional numeratorPLL_NUM_F1[23:16]
PLL_NUM_F1[15:0]
PLL_NUM_F2[23:16]
PLL_NUM_F2[15:0]
174
50412
78
50412
N integerPLL_N_F1
PLL_N_F2
2122
PrescalerPLL_N_PRE_F1
PLL_N_PRE_F2
0 = Divide by 20 = Divide by 2

Table 42. Register Settings Summary (continued)

Variants on the same datasheet

These parts have exact links to the same datasheet. They are candidates to compare, not verified drop-in replacements; check package, pinout and electrical limits.

Part NumberManufacturerPackage
LMX2571Texas InstrumentsWQFN-36 6x6mm
LMX2571NJKTTexas Instruments36-WFQFN Exposed Pad

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