HT32F523XX

32-Bit Arm Cortex-M0+ Microcontroller

The HT32F523XX is a 32-bit arm cortex-m0+ microcontroller from Holtek. View the full HT32F523XX datasheet below including electrical characteristics, absolute maximum ratings.

Manufacturer

Holtek

Overview

Part: HT32F52342/HT32F52352 — Holtek Type: 32-Bit Arm Cortex-M0+ Microcontroller Description: High performance, low power consumption 32-bit microcontrollers based around an Arm Cortex-M0+ processor core, operating at up to 48 MHz with up to 128 KB Flash, 16 KB SRAM, and a 1 Msps ADC.

Operating Conditions:

Supply voltage: 2.0 V to 3.6 V
Operating temperature: -40 to +85 °C (suffix-dependent — see Table 6 for grade-specific ranges)
Max operating frequency: 48 MHz

Absolute Maximum Ratings:

Max supply voltage: 4.0 V
Max junction/storage temperature: 150 °C

Key Specs:

Core: 32-bit Arm Cortex-M0+
Max CPU frequency: 48 MHz
Flash memory: Up to 128 KB
SRAM: 16 KB
ADC resolution: 12-bit
ADC sampling rate: 1 Msps
Internal HSI accuracy: ±2 % (at 3.3V, 25 °C)
I/O sink/source current: ±8 mA (per pin)

Features:

Single-cycle multiplication
Integrated Nested Vectored Interrupt Controller (NVIC)
24-bit SysTick timer
Multiple boot modes
Flash accelerator with In System Programming (ISP) and In Application Programming (IAP)
Supply supervisor: POR/PDR, BOD, LVD
Integrated 1.5 V LDO regulator
V BAT battery power supply for RTC and backup registers
Four power saving modes: Sleep, Deep-Sleep1, Deep-Sleep2, Power-Down
Up to 16 EXTI lines with configurable trigger source and type
All GPIO pins can be selected as EXTI trigger source

Applications:

White goods application control
Power monitors
Alarm systems
Consumer products
Handheld equipment
Data logging applications
Motor control

Package:

33-pin QFN (4mm × 4mm)
48-pin LQFP (7mm × 7mm)
64-pin LQFP (7mm × 7mm)

Pin Configuration

Package	Package	Package			AF2				Alternate Function Mapping	Alternate Function Mapping	Alternate Function Mapping	Alternate Function Mapping					AF15
64	48	33	AF0 System	AF1 GPIO	ADC	AF3 CMP	AF4 MCTM	AF5 SPI	AF6 USART	AF7 I 2 C	AF8 SCI	AF9 EBI	AF10 I 2 S	AF12 N/A	AF13 SCTM	AF14 N/A	System
1	1	1	PA0		ADC_ IN0		GT1_ CH0	SPI1_ SCK	USR0_ RTS	I2C1_ SCL	SCI0_ CLK		I2S_ WS
2	2	2	PA1		ADC_ IN1		GT1_ CH1	SPI1_ MOSI	USR0_ CTS	I2C1_ SDA	SCI0_ DIO		I2S_ BCLK
3	3	3	PA2		ADC_ IN2		GT1_ CH2	SPI1_ MISO	USR0_ TX				I2S_ SDO
4	4	4	PA3		ADC_ IN3		GT1_ CH3	SPI1_ SEL	USR0_ RX				I2S_ SDI
5	5	5	PA4		ADC_ IN4		GT0_ CH0	SPI0_ SCK	USR1_ TX	I2C0_ SCL	SCI1_ CLK
6	6	6	PA5		ADC_ IN5		GT0_ CH1	SPI0_ MOSI	USR1_ RX	I2C0_ SDA	SCI1_ DIO
7	7		PA6		ADC_ IN6		GT0_ CH2	SPI0_ MISO	USR1_ RTS		SCI1_ DET
8	8		PA7		ADC_ IN7		GT0_ CH3	SPI0_ SEL	USR1_ CTS			I2S_	MCLK
9			VDD_4
10			VSS_4
11	9		PC4		ADC_ IN8		GT0_ CH0	SPI1_ SEL	UR0_ TX	I2C1_ SCL		EBI_ A19			SCTM0
12	10		PC5		ADC_ IN9		GT0_ CH1	SPI1_ SCK	UR0_ RX	I2C1_ SDA		EBI_ A20			SCTM1
13			PC8		ADC_ IN10		GT0_ CH2	SPI1_ MOSI				EBI_ A0
14			PC9		ADC_ IN11		GT0_ CH3	SPI1_ MISO				EBI_ A1
15	11	7	PC6				MT_ CH2		USR0_ TX	I2C0_ SCL
15	11	7	USBDM
16	12	8	USBDP
16	12	8	PC7				MT_ CH2N		USR0_ RX	I2C0_ SDA
17	13	9	CLDO
18	14	10	VDD_1
19 20	15 16	11 12	VSS_1 nRST
21	17		VBAT
22	18	13	X32KIN	PB10
23	19	14	X32KOUT	PB11
24	20	15	RTCOUT	PB12													WAKE- UP
25			PD0							I2C0_ SDA		EBI_ A18	I2S_ SDI		SCTM0
26	21	16	XTALIN	PB13
27	22	17	XTALOUT	PB14
28	23		PB15				MT_ CH0	SPI0_ SEL	USR1_ TX	I2C1_ SCL		EBI_ A16	I2S_ MCLK
29	24		PC0				MT_ CH0N	SPI0_ SCK	USR1_ RX	I2C1_ SDA		EBI_ A17
30			PC10				GT1_ CH0	SPI1_ SEL				EBI_ AD13	I2S_ WS
31			PC11				GT1_ CH1	SPI1_ SCK				EBI_ AD14	I2S_ BCLK
32			PC12				GT1_ CH2	SPI1_ MOSI	UR1_ TX	I2C0_ SCL		EBI_ AD15	I2S_ SDO
33			PC13				GT1_ CH3	SPI1_ MISO	UR1_ RX	I2C0_ SDA		EBI_ CS3	I2S_ SDI
Package	Package	Package			AF2				Alternate Function Mapping	Alternate Function Mapping	Alternate Function Mapping	Alternate Function Mapping			AF13		AF15
64	48		AF0	AF1		AF3	AF4	AF5	AF6	AF7	AF8	AF9	AF10	AF11	SCTM	AF14	System
LQFP 34	LQFP 25	33 QFN	System Default PA8	GPIO	ADC	CMP	MCTM /GPTM	SPI	USART /UART USR0_ TX	I 2 C	SCI SCI1_ CLK	EBI	I 2 S I2S_ MCLK	N/A		N/A	Other
35	26	18	PA9 _BOOT					SPI0_ MOSI			SCI1_ DIO	EBI_ A1	I2S_ WS				CKOUT
36	27		PA10				MT_ CH1		USR0_ RX		SCI0_ DET
37	28		PA11				MT_ CH1N	SPI0_ MISO			SCI1_ DET	EBI_ A0	I2S_ MCLK		SCTM0
38	29	19	SWCLK	PA12
39	30	20	SWDIO	PA13
40	31	21	PA14				MT_ CH0	SPI1_ SEL	USR1_ TX	I2C1_ SCL	SCI0_ CLK	EBI_ AD0
41	32	22	PA15				MT_ CH0N	SPI1_ SCK	USR1_ RX	I2C1_ SDA	SCI0_ DIO	EBI_ AD1			SCTM1
42			VDD_2
43			VSS_2
44	33	23	PB0				MT_ CH1	SPI1_ MOSI	USR0_ TX	I2C0_ SCL		EBI_ AD2
45	34	24	PB1				MT_ CH1N	SPI1_ MISO	USR0_ RX	I2C0_ SDA		EBI_ AD3
46			PD1				MT_ CH2		USR1_ RTS		SCI0_ CLK	EBI_ AD10
47			PD2				MT_ CH2N		USR1_ CTS		SCI0_ DIO	EBI_ AD11
48	35 36	33	PD3 VDD_2 VSS_2				MT_ CH3				SCI0_ DET	EBI_ AD12
49	37	25	PB2				MT_ CH2	SPI0_ SEL	UR0_ TX			EBI_ AD4
50	38	26	PB3				MT_ CH2N	SPI0_ SCK	UR0_ RX			EBI_ AD5			SCTM1 SCTM0
51	39	27	PB4				MT_ BRK MT_	SPI0_ MOSI SPI0_	UR1_ TX UR1_			EBI_ AD6 EBI_
53			PC14				MT_ CH3			I2C0_ SCL		EBI_ AD8
54			PC15							I2C0_ SDA		EBI_ AD9			SCTM1
55			VDD_3
56 57	41		VSS_3 PC1			CN0	MT_ CH0	SPI1_ SEL	UR1_ TX			EBI_ OE	I2S_ MCLK
58	42		PC2			CP0	MT_ CH0N	SPI1_ SCK				EBI_ CS0
59	43		PC3			COUT0		SPI1_ MOSI	UR1_ RX			EBI_ WE
60	44		PB6			CN1	MT_ CH2	SPI1_ MISO	UR0_ TX		SCI1_ CLK	EBI_ ALE	I2S_ BCLK
	45	29	PB7			CP1	MT_ CH2N			I2C1_ SCL	SCI1_ DET	EBI_ CS1	I2S_ SDO
61 62	46	30	PB8			COUT1	MT_ CH3		UR0_ RX	I2C1_ SDA	SCI1_ DIO	EBI_ CS2	I2S_ SDI
63 64	47 48	31 32	VDDA VSSA

Electrical Characteristics

Table 18. ADC Characteristics

TA = 25 °C, unless otherwise specified.

Symbol	Parameter	Conditions	Min.	Typ.	Max.	Unit
V DDA	Operating Voltage	-	2.5	3.3	3.6	V
V ADCIN	A/D Converter Input Voltage Range	-	0	-	V REF+	V
V REF+	A/D Converter Reference Voltage	-	-	V DDA	V DDA	V
I ADC	Current Consumption	V DDA = 3.3 V	-	1	TBD	mA
I ADC_DN	Power Down Current Consumption	V DDA = 3.3 V	-	-	0.1	μA
f ADC	A/D Converter Clock	-	0.7	-	16	MHz
f S	Sampling Rate	-	0.05	-	1	Msps
t DL	Data Latency	-	-	12.5	-	1/f ADC Cycles
t S&H	Sampling & Hold Time	-	-	3.5	-	1/f ADC Cycles
t ADCCONV	A/D Converter Conversion Time	ADST[7:0] = 2	-	16	-	1/f ADC Cycles
R I	Input Sampling Switch Resistance	-	-	-	1	kΩ
C I	Input Sampling Capacitance	No pin/pad capacitance included	-	16	-	pF
t SU	Startup Time	-	-	-	1	μs
N	Resolution	-	-	12	-	bits
INL	Integral Non-linearity Error	f S = 750 ksps, V DDA = 3.3 V	-	±2	±5	LSB
DNL	Differential Non-linearity Error	f S = 750 ksps, V DDA = 3.3 V	-	±1		LSB
E O	Offset Error	-	-	-	±10	LSB
E G	Gain Error	-	-	-	±10	LSB

Note: 1. Data based on characterization results only, not tested in production.

Due to the A/D Converter input channel and GPIO pin-shared function design limitation, the VDDA supply power of the A/D Converter has to be equal to the VDD supply power of the MCU in the application circuit.

The figure below shows the equivalent circuit of the A/D Converter Sample-and-Hold input stage where C I is the storage capacitor, RI is the resistance of the sampling switch and RS is the output impedance of the signal source VS. Normally the sampling phase duration is approximately, 3.5/fADC. The capacitance, CI, must be charged within this time frame and it must be ensured that the voltage at its terminals becomes sufficiently close to V S for accuracy. To guarantee this, RS is not allowed to have an arbitrarily large value.

Figure 7. ADC Sampling Network Model

The worst case occurs when the extremities of the input range (0 V and VREF) are sampled consecutively. In this situation a sampling error below ¼ LSB is ensured by using the following equation:

Where fADC is the ADC clock frequency and N is the ADC resolution (N = 12 in this case). A safe margin should be considered due to the pin/pad parasitic capacitances, which are not accounted for in this simple model.

If, in a system where the A/D Converter is used, there are no rail-to-rail input voltage variations between consecutive sampling phases, RS may be larger than the value indicated by the equation above.

Absolute Maximum Ratings

The following table shows the absolute maximum ratings of the device. These are stress ratings only. Stresses beyond absolute maximum ratings may cause permanent damage to the device. Note that the device is not guaranteed to operate properly at the maximum ratings. Exposure to the absolute maximum rating conditions for extended periods may affect device reliability.

Package Information

Note that the package information provided here is for consultation purposes only. As this information may be updated at regular intervals users are reminded to consult the Holtek website for the latest version of the Package Information.

Additional supplementary information with regard to packaging is listed below. Click on the relevant section to be transferred to the relevant website page.

Package Information (include Outline Dimensions, Product Tape and Reel Specifications)
The Operation Instruction of Packing Materials
Carton information

Related Variants

The following components are covered by the same datasheet.

Part Number	Manufacturer	Package
HT32F52342	Holtek	—
HT32F52352	Holtek	QFN-33 (4mm x 4mm)

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