FM21X102K501PXG
The FM21X102K501PXG is an electronic component from Prosperity Dielectrics. View the full FM21X102K501PXG datasheet below including key specifications, electrical characteristics, absolute maximum ratings.
Manufacturer
Prosperity Dielectrics
Category
Ceramic Capacitors
Package
0805 (2012 Metric)
Lifecycle
Active
Key Specifications
| Parameter | Value |
|---|---|
| Applications | SMPS Filtering |
| Capacitance | 1000 pF |
| Mounting Type | Surface Mount, MLCC |
| Operating Temperature | -55°C ~ 125°C |
| Package / Case | 0805 (2012 Metric) |
| RoHS | Compliant |
| Size / Dimension | 0.079" L x 0.049" W (2.00mm x 1.25mm) |
| Temperature Coefficient | X7R |
| Thickness (Max) | 0.035" (0.90mm) |
| Tolerance | ±10% |
| Voltage Rating | 500V |
Overview
Part: EFP01 Energy Friendly PMIC Family — Silicon Labs
Type: Power Management IC (PMIC)
Description: The EFP01 Energy Friendly Power Management IC (PMIC) is an extremely flexible, highly efficient, multi-output power management IC, providing complete system power and primary cell battery Coulomb counting for EFM32 and EFR32 devices, operating over a wide input voltage range (0.8 to 5.5 V) with up to 94% efficiency and quiescent current as low as 300 nA.
Operating Conditions:
- Supply voltage: 0.8 V to 5.5 V
- Operating temperature: -40 to 100 °C (-G grade devices)
- VIO input voltage range: 1.7 V to 5.5 V
Absolute Maximum Ratings:
- Max supply voltage: 5.5 V (on VDDB, VBOOST, VOUT, VIO pins)
- Max storage temperature: 150 °C
Key Specs:
- Quiescent current (EM2, single output enabled): 300 nA
- Peak efficiency: 94%
- VOA Output Voltage: 1.7 V to 5.2 V
- VOB Output Voltage: 0.8 V to 3.3 V (EFP0101/03/06/09/11 variants)
- VOC Output Voltage: 1.7 V to 3.3 V
- Digital IO internal pull-up resistor (I2C SDA, SCL, IRQn): 3.7 kΩ (typ)
- Bootup time (VDDB rising to I2C ready): 1200 μs (typ)
- Power-on reset threshold (falling): 1.58 V to 1.68 V
Features:
- Provides 4 supply outputs: One Buck/Boost DC-DC Converter, One Buck-only DC-DC Converter + LDO, One LDO, One Switched Output
- Lossless Coulomb Counter
- Fully configurable I2C
- Direct Mode supports fast transitions between energy modes
- IRQ pin to notify host processor
- Ultra-low EM2 Quiescent Current (150 nA with no outputs enabled, 300 nA with a single output enabled)
- Programmable inrush current
- Short-circuit tolerant outputs
- Under-voltage lock-out (UVLO) circuitry
- Over-temperature monitoring and IRQ assertion
Applications:
- IoT Sensors and End Devices
- Metering
- Home and Building Automation and Security
- Health and Wellness
- Wearables
- Smart Accessories
- Human Interface Devices
Package:
- QFN20 (3x3 mm)
Features
- Provides 4 supply outputs:
- One Buck/Boost DC-DC Converter
- One Buck-only DC-DC Converter + LDO
- One LDO
- One Switched Output
- Up to 94% efficiency
Electrical Characteristics
Unless stated otherwise, all electrical parameters in all tables are specified under the following conditions:
- Typical values are based on T J =25 °C and V DDB =V IO =3.3V and VOA=VOB=VOC=1.8V, by production test and/or technology characterization.
- Unless stated otherwise, minimum and maximum values represent the worst conditions across supply voltage, process variation, and operating temperature.
- Energy mode (EM0/EM2/EM4) programming is defined in Table 3.8 Energy Modes Overview on page 22
- EM0: BIAS_SW.BIAS0=7, EM_CRSREG_CTRL.EM_STSEL=0
- EM2: BIAS_SW.BIAS2=1, EM_CRSREG_CTRL.EM_STSEL=2
- EM4: EM_CRSREG_CTRL.EM_STSEL=3
- Test board components:
- LDCDC = 2.2 μH (Samsung CIG22H2R2MAE)
- CIN = COUT = 10 μF (Murata GRM31CR71A106KA01)
Absolute Maximum Ratings
Stresses above those listed below may cause permanent damage to the device. This is a stress rating only and functional operation of the devices at those or any other conditions above those indicated in the operation listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. For more information on the available quality and reliability data, see the Quality and Reliability Monitor Report at https://www.silabs.com/about-us/corporate-responsibility/commitment-toquality.
Table 5.1. Absolute Maximum Ratings
| Parameter | Symbol | Test Condition | Min | Typ | Max | Unit |
|---|---|---|---|---|---|---|
| Storage temperature range | T STG | -50 | - | 150 | °C | |
| DC voltage on input supply pins VDDA 1 | V VDDA | -0.3 | - | 2.0 | V | |
| DC voltage on input supply pins VDDB 1 | V VDDB_DC | -0.3 | - | 5.5 | V | |
| Transient voltage on input supply pin VDDB 1 | V VDDB_TRN | t < 30 μs, duty cycle < 0.01% | - | - | 6.5 | V |
| DC voltage connected through inductor to LA2 pin in boost configurations. 1 | V VBOOST | -0.3 | - | 5.5 | V | |
| Voltage on output supply pins: VOA, VOB, VOC, VOA_SW | V OUT | -0.3 | - | 5.5 | V | |
| DC voltage on VIO supply pin | V VIO | -0.3 | - | 5.5 | V | |
| DC voltage on any I/O pin | V DIGPIN | -0.3 | - | V VIO +0.3 | V | |
| On-chip power dissipation 2 | P DIS | 2-layer PCB, THETA JA = 81.2 °C/W, T AMBIENT = 25 °C | - | - | 923 | mW |
| On-chip power dissipation 2 | P DIS | 4-layer PCB, THETA JA = 66.0 °C/W, T AMBIENT = 25 °C | - | - | 1136 | mW |
| Operating Junction tempera- ture | T J | -G grade devices | -40 | - | 105 | °C |
-
Note that there is no reverse battery insertion protection implemented on-chip. Applications that may be susceptible to a reverse battery insertion should incorporate external protection circuitry.
-
Max on-chip power dissipation is given by: P MAX = (100 °C - T AMBIENT ) / THETA JA
Thermal Information
Table 5.2. Thermal Characteristic
| Parameter | Symbol | Test Condition | Min | Typ | Max | Unit |
|---|---|---|---|---|---|---|
| Thermal impedance, junc- tion-to-ambient QFN20 (3x3mm) | THETA JA | 2 layer PCB, Natural Convection 1 | - | 81.2 | - | °C/W |
| Thermal impedance, junc- tion-to-ambient QFN20 (3x3mm) | THETA JA | 4 layer PCB, Natural Convection 1 | - | 66 | - | °C/W |
| Thermal impedance, junc- tion-to-board QFN20 (3x3mm) | THETA JB | 2 layer PCB, Natural Convection 1 | - | 37.9 | - | °C/W |
| Thermal impedance, junc- tion-to-board QFN20 (3x3mm) | THETA JB | 4 layer PCB, Natural Convection 1 | - | 27 | - | °C/W |
| Thermal impedance, junc- tion-to-case QFN20 (3x3mm) | THETA JC | 2 layer PCB, Natural Convection 1 | - | 46.5 | - | °C/W |
| Thermal impedance, junc- tion-to-case QFN20 (3x3mm) | THETA JC | 4 layer PCB, Natural Convection 1 | - | 34.6 | - | °C/W |
| Junction-to-top thermal char- acterization parameter QFN20 (3x3mm) | PSI JT | 2 layer PCB, Natural Convection 1 | - | 2.6 | - | °C/W |
| Junction-to-top thermal char- acterization parameter QFN20 (3x3mm) | PSI JT | 4 layer PCB, Natural Convection 1 | - | 1.9 | - | °C/W |
| Junction-to-bottom thermal characterization parameter QFN20 (3x3mm) | PSI JB | 2 layer PCB, Natural Convection 1 | - | 39.1 | - | °C/W |
| Junction-to-bottom thermal characterization parameter QFN20 (3x3mm) | PSI JB | 4 layer PCB, Natural Convection 1 | - | 26.7 | - | °C/W |
- Measured according to JEDEC standard JESD51-2A Integrated Circuit Thermal Test Method Environmental Conditions - Natural Convection (Still Air).
Package Information
Figure 9.1. QFN20 Package Drawing
Table 9.1. QFN20 Package Dimensions
| Dimension | Min | Typ | Max |
|---|---|---|---|
| A | 0.80 | 0.85 | 0.90 |
| A1 | 0.00 | 0.02 | 0.05 |
| A3 | 0.20 REF | 0.20 REF | 0.20 REF |
| b | 0.18 | 0.25 | 0.30 |
| c | 0.20 | 0.25 | 0.30 |
| D | 3.00 BSC | 3.00 BSC | 3.00 BSC |
| D2 | 1.60 | 1.70 | 1.80 |
| e | 0.50 BSC | 0.50 BSC | 0.50 BSC |
| E | 3.00 BSC | 3.00 BSC | 3.00 BSC |
| E2 | 1.60 | 1.70 | 1.80 |
| f | 2.45 BSC | 2.45 BSC | 2.45 BSC |
| K | 0.20 | - | - |
| L | 0.30 | 0.40 | 0.50 |
| R | 0.09 | - | 0.15 |
| aaa | - | - | 0.15 |
| bbb | - | - | 0.10 |
| ccc | - | - | 0.08 |
| ddd | - | - | 0.10 |
| eee | - | - | 0.10 |
| ggg | - | - | 0.05 |
| Note: | Note: | Note: | Note: |
Related Variants
The following components are covered by the same datasheet.
| Part Number | Manufacturer | Package |
|---|---|---|
| EFP0101 | Silicon Labs (inferred from Simplicity Studio mention) | — |
| EFP0102 | Silicon Labs (inferred from Simplicity Studio mention) | — |
| EFP0103 | Silicon Labs (inferred from Simplicity Studio mention) | — |
| EFP0104 | Silicon Labs (inferred from Simplicity Studio mention) | — |
| EFP0106 | Silicon Labs (inferred from Simplicity Studio mention) | — |
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