DRV5053VA

Part 1: Markdown Summary

Part: DRV5053 from Texas Instruments

Type: Analog-Bipolar Hall Effect Sensor

Key Specs:

• Sensitivity options: –11 mV/mT (OA), –23 mV/mT (PA), –45 mV/mT (RA), –90 mV/mT (VA), +23 mV/mT (CA), +45 mV/mT (EA)
• Supply voltage range: 2.5 V to 38 V
• Operating temperature range: –40 to 125°C
• Output voltage range: 0.2 V to approximately 1.8 V
• Output at 0 mT magnetic field: 1 V
• Fast power-on time: 35 μs
• Output sink current: 2.3 mA
• Output source current: 300 μA

Features:

• Linear output Hall sensor
• Superior temperature stability: Sensitivity

• Linear output hall sensor
• Superior temperature stability
  • Sensitivity ±10% over temperature
• High sensitivity options:
  • –11 mV/mT (OA, see Figure 17)
  • –23 mV/mT (PA)
  • –45 mV/mT (RA)
  • –90 mV/mT (VA)
  • +23 mV/mT (CA)
  • +45 mV/mT (EA)
• Supports a wide voltage range
  • 2.5 V to 38 V
• No external regulator required
• Wide operating temperature range
  • TA = –40 to 125°C (Q, see Figure 17)
• Amplified output stage
  • 2.3-mA sink, 300-μA source
• Output voltage: 0.2 V to approximately 1.8 V
• B = 0 mT, OUT = 1 V
• Fast power-on: 35 μs
• Small package and footprint
  • Surface mount 3-pin SOT-23 (DBZ)
    • 2.92 mm × 2.37 mm
  • Through-hole 3-pin TO-92 (LPG)
    • 4.00 mm × 3.15 mm
• Protection features:
  • Reverse supply protection (up to –22 V)
  • Supports up to 40-V load dump
  • Output short-circuit protection
  • Output current limitation

• Flow Meters
• Docking Adjustment
• Vibration Correction
• Damper Controls

For additional configuration information, see Device Markings and Mechanical, Packaging, and Orderable Information.

Figure 5-1. DBZ Package 3-Pin SOT-23 Top View

Figure 5-2. LPG Package 3-Pin TO-92 Top View

over operating free-air temperature range (unless otherwise noted)

over operating free-air temperature range (unless otherwise noted)(1)

(2) Specified by design. Only tested to –20 V.

6.2 ESD Ratings

(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)

6.4 Thermal Information

| | | DRV5053 | | |---|---|---|---|---| | | THERMAL METRIC(1) | DBZ (SOT-23) | LPG (TO-92) | UNIT | | | | 3 PINS | 3 PINS | | | RθJA | Junction-to-ambient thermal resistance | 333.2 | 180 | °C/W | | RθJC(top) | Junction-to-case (top) thermal resistance | 99.9 | 98.6 | °C/W | | RθJB | Junction-to-board thermal resistance | 66.9 | 154.9 | °C/W | | ψJT | Junction-to-top characterization parameter | 4.9 | 40 | °C/W | | ψJB | Junction-to-board characterization parameter | 65.2 | 154.9 | °C/W |

6.5 Electrical Characteristics

over operating free-air temperature range (unless otherwise noted)

6.6 Switching Characteristics

over operating free-air temperature range (unless otherwise noted)

6.7 Magnetic Characteristics

over operating free-air temperature range (unless otherwise noted)

over operating free-air temperature range (unless otherwise noted)

(2) 1 mT = 10 Gauss

(3) Bandwidth describes the fastest changing magnetic field that can be detected and translated to the output.

(4) Linearity describes the change in sensitivity across the B-range. The sensitivity near BSAT is typically within 1% of the sensitivity near B = 0 mT.

6.8 Typical Characteristics

7 Detailed Description

7.1 Overview

The DRV5053 device is a chopper-stabilized Hall sensor with an analog output for magnetic sensing applications. The DRV5053 device can be powered with a supply voltage between 2.5 V and 38 V, and will survive –22 V reverse battery conditions continuously. Note that the DRV5053 device will not be operating when approximately –22 V to 2.4 V is applied to VCC (with respect to GND). In addition, the device can withstand supply voltages up to 40 V for transient durations.

The output voltage is dependent on the magnetic field perpendicular to the package. The absence of a magnetic field will result in OUT = 1 V. A magnetic field will cause the output voltage to change linearly with the magnetic field.

The field polarity is defined as follows: a south pole near the marked side of the package is a positive magnetic field. A north pole near the marked side of the package is a negative magnetic field.

For devices with a negative sensitivity (that is, DRV5053RA: –40 mV/mT), a south pole will cause the output voltage to drop below 1 V, and a north pole will cause the output to rise above 1 V.

For devices with a positive sensitivity (that is, DRV5053EA: +40 mV/mT), a south pole will cause the output voltage to rise above 1 V, and a north pole will cause the output to drop below 1 V.

7.2 Functional Block Diagram

7.3 Feature Description

7.3.1 Field Direction Definition

Figure 7-1 shows the positive magnetic field defined as a south pole near the marked side of the package.

7.3.2 Device Output

The DRV5053 device output is defined below for negative sensitivity (that is, –45 mV/mT, RA) and positive sensitivity (that is, +45 mV/mT, EA):

7.3.3 Power-On Time

After applying VCC to the DRV5053 device, ton must elapse before OUT is valid. Figure 7-4 shows Case 1 and Figure 7-5 shows Case 2. The output is defined assuming a negative sensitivity device and a constant magnetic field –BSAT < B < BSAT.

7.3.4 Output Stage

The DRV5053 output stage is capable of up to 300-μA of current source or 2.3-mA sink. For proper operation, ensure that equivalent output load ROUT > 10 kΩ.

The capacitive load directly present on the OUT pin should be less than 10 nF to ensure the internal operational amplifier is stable. If an external RC filter is added to reduce noise, it is acceptable to use a resistor ≥ 200 Ω with a capacitor ≤ 0.1 μF. For an application example, see Filtered Typical Application.

7.3.5 Protection Circuits

An analog current limit circuit limits the current through the output driver. The driver current will be clamped to IOCP.

7.3.5.1 Overcurrent Protection (OCP)

An analog current-limit circuit limits the current through the FET. The driver current is clamped to IOCP. During this clamping, the rDS(on) of the output FET is increased from the nominal value.

7.3.5.2 Load Dump Protection

The DRV5053 device operates at DC VCC conditions up to 38 V nominally, and can additionally withstand VCC = 40 V. No current-limiting series resistor is required for this protection.

7.3.5.3 Reverse Supply Protection

The DRV5053 device is protected in the event that the VCC pin and the GND pin are reversed (up to –22 V).

Note

In a reverse supply condition, the OUT pin reverse-current must not exceed the ratings specified in the Absolute Maximum Ratings.

7.4 Device Functional Modes

The DRV5053 device is active only when VCC is between 2.5 V and 38 V.

When a reverse supply condition exists, the device is inactive.

8 Application and Implementation

Note

Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI's customers are responsible for determining suitability of components for their purposes, as well as validating and testing their design implementation to confirm system functionality.

8.1 Application Information

The DRV5053 device is used in magnetic-field sensing applications.

8.2 Typical Applications

8.2.1 Typical Application With No Filter

Figure 8-1. Typical Application Schematic – No Filter

8.2.1.1 Design Requirements

For this design example, use the parameters listed in Table 8-1 as the input parameters.

Table 8-1. Design Parameters

8.2.1.2 Detailed Design Procedure

The DRV5053 has internal filtering that limits the bandwidth to at least 20 kHz. For this application no external components are required other than the C1 bypass capacitor, which is 0.01 μF minimum. If the analog output OUT is tied to a microcontroller ADC input, the equivalent load must be R > 10 kΩ and C < 10 nF.

Table 8-2. External Components

8.2.1.3 Application Curve

8.2.2 Filtered Typical Application

For lower noise on the analog output OUT, additional RC filtering can be added to further reduce the bandwidth.

Figure 8-3. Filtered Typical Application Schematic

8.2.2.1 Design Requirements

For this design example, use the parameters listed in Table 8-3 as the input parameters.

8.2.2.2 Detailed Design Procedure

In this example we will add an external RC filter in order to reduce the output bandwidth.

In order to preserve the signal at the frequencies of interest, we will conservatively select a low-pass filter bandwidth (–3-dB point) at twice the system bandwidth (10 kHz).

$20 kHz prec frac{1}{2π × R₁ × C₂} tag{1}$

If we guess R1 = 10 kΩ, then C2 < 1590 pF. So we select C2 = 1500 pF.

8.2.2.2.1 Typical Noise Versus Cutoff Frequency

RC filters are an effective way to reduce the noise present on OUT. The following shows typical noise measurements for different cutoff frequencies using the DRV5053VA.

8.2.2.3 Application Curves

8.3 Power Supply Recommendations

The DRV5053 device is designed to operate from an input voltage supply (VM) range between 2.5 V and 38 V. A 0.01-μF (minimum) ceramic capacitor rated for VCC must be placed as close to the DRV5053 device as possible.

9 Device and Documentation Support

9.1 Device Support

9.1.1 Device Nomenclature

Figure 9-1 shows a legend for reading the complete device name for the DRV5053 device.

9.1.2 Device Markings

Figure 9-3. TO-92 (LPG) Package

9.2 Receiving Notification of Documentation Updates

To receive notification of documentation updates, navigate to the device product folder on ti.com. Click on Subscribe to updates to register and receive a weekly digest of any product information that has changed. For change details, review the revision history included in any revised document.

9.3 Support Resources

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9.4 Trademarks

TI E2E™ is a trademark of Texas Instruments.

All trademarks are the property of their respective owners.

9.5 Electrostatic Discharge Caution

This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.

ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.

9.6 Glossary

TI Glossary This glossary lists and explains terms, acronyms, and definitions.

10 Mechanical, Packaging, and Orderable Information

The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation.

PACKAGING INFORMATION

www.ti.com 9-Nov-2025

(1) Status: For more details on status, see our product life cycle.

(2) Material type: When designated, preproduction parts are prototypes/experimental devices, and are not yet approved or released for full production. Testing and final process, including without limitation quality assurance, reliability performance testing, and/or process qualification, may not yet be complete, and this item is subject to further changes or possible discontinuation. If available for ordering, purchases will be subject to an additional waiver at checkout, and are intended for early internal evaluation purposes only. These items are sold without warranties of any kind.

(3) RoHS values: Yes, No, RoHS Exempt. See the TI RoHS Statement for additional information and value definition.

(4) Lead finish/Ball material: Parts may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two lines if the finish value exceeds the maximum column width.

(5) MSL rating/Peak reflow: The moisture sensitivity level ratings and peak solder (reflow) temperatures. In the event that a part has multiple moisture sensitivity ratings, only the lowest level per JEDEC standards is shown. Refer to the shipping label for the actual reflow temperature that will be used to mount the part to the printed circuit board.

(6) Part marking: There may be an additional marking, which relates to the logo, the lot trace code information, or the environmental category of the part.

Multiple part markings will be inside parentheses. Only one part marking contained in parentheses and separated by a "~" will appear on a part. If a line is indented then it is a continuation of the previous line and the two combined represent the entire part marking for that device.

over operating free-air temperature range (unless otherwise noted)

| | | DRV5053 | | |---|---|---|---|---| | | THERMAL METRIC(1) | DBZ (SOT-23) | LPG (TO-92) | UNIT | | | | 3 PINS | 3 PINS | | | RθJA | Junction-to-ambient thermal resistance | 333.2 | 180 | °C/W | | RθJC(top) | Junction-to-case (top) thermal resistance | 99.9 | 98.6 | °C/W | | RθJB | Junction-to-board thermal resistance | 66.9 | 154.9 | °C/W | | ψJT | Junction-to-top characterization parameter | 4.9 | 40 | °C/W | | ψJB | Junction-to-board characterization parameter | 65.2 | 154.9 | °C/W |