DAC8552
16-BIT, DUAL CHANNEL, ULTRA-LOW GLITCH, VOLTAGE OUTPUT DIGITAL-TO-ANALOG CONVERTER
Manufacturer
unknown
Overview
Part: DAC8552, Texas Instruments
Type: 16-BIT, DUAL CHANNEL, ULTRA-LOW GLITCH, VOLTAGE OUTPUT DIGITAL-TO-ANALOG CONVERTER
Key Specs:
- Resolution: 16-Bit
- Relative Accuracy: 4LSB
- Glitch Energy: 0.15nV-s
- MicroPower Operation: 155μA per Channel at 2.7V
- Power Supply: 2.7V to 5.5V
- Settling Time: 10 μs to ± 0.003% FSR
- Ultra-Low AC Crosstalk: –100dB Typ
- Operating Temperature Range: -40°C to +105°C
Features:
- Relative Accuracy: 4LSB
- Glitch Energy: 0.15nV-s
- MicroPower Operation: 155μA per Channel at 2.7V
- Power-On Reset to Zero-Scale
- Power Supply: 2.7V to 5.5V
- 16-Bit Monotonic Over Temperature
- Settling Time: 10 μs to ± 0.003% FSR
- Ultra-Low AC Crosstalk: –100dB Typ
- Low-Power Serial Interface with Schmitt-Triggered Inputs
- On-Chip Output Buffer Amplifier with Rail-to-Rail Operation
- Double-Buffered Input Architecture
- Simultaneous or Sequential Output Update and Power-down
- Available in a Tiny MSOP-8 Package
Applications:
- Portable Instrumentation
- Closed-Loop Servo Control
- Process Control
- Data Acquisition Systems
- Programmable Attenuation
- PC Peripherals
Package:
- MSOP-8: null
Features
- Relative Accuracy: 4LSB
- Glitch Energy: 0.15nV-s
- MicroPower Operation: 155μA per Channel at 2.7V
- Power-On Reset to Zero-Scale
- Power Supply: 2.7V to 5.5V
- 16-Bit Monotonic Over Temperature
- Settling Time: 10 μ s to ± 0.003% FSR
- Ultra-Low AC Crosstalk: –100dB Typ
- Low-Power Serial Interface with Schmitt-Triggered Inputs
- On-Chip Output Buffer Amplifier with Rail-to-Rail Operation
- Double-Buffered Input Architecture
- Simultaneous or Sequential Output Update and Power-down
- Available in a Tiny MSOP-8 Package
Applications
- Portable Instrumentation
- Closed-Loop Servo Control
- Process Control
- Data Acquisition Systems
- Programmable Attenuation
- PC Peripherals
Pin Configuration
| PIN | NAME | FUNCTION |
|---|---|---|
| 1 | VDD | Power supply input, 2.7V to 5.5V |
| 2 | VREF | Reference voltage input |
| 3 | VOUTB | Analog output voltage from DAC B |
| 4 | VOUTA | Analog output voltage from DAC A |
| 5 | SYNC | Level triggered SYNC input (active LOW). This is the frame synchronization signal for the input data. When SYNC goes LOW, it enables the input shift register and data is transferred on the falling edges of SCLK. The action specified by the 8-bit control byte and 16-bit data word is executed following the 24th falling SCLK clock edge (unless SYNC is taken HIGH before this edge, in which case the rising edge of SYNC acts as an interrupt and the write sequence is ignored by the DAC8552). Schmitt-Trigger logic input. |
| 6 | SCLK | Serial Clock Input. Data can be transferred at rates up to 30MHz at 5V. Schmitt-Trigger logic input. |
| 7 | D IN | Serial Data Input. Data is clocked into the 24-bit input shift register on the falling edge of the serial clock input. Schmitt-Trigger logic input. |
| 8 | GND | Ground reference point for all circuitry on the part. |
Electrical Characteristics
VDD = 2.7V to 5.5V, all specifications –40°C to +105°C (unless otherwise noted).
| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT |
|---|---|---|---|---|---|
| STATIC PERFORMANCE(1) | |||||
| Resolution | 16 | Bits | |||
| Relative accuracy | Measured by line passing through codes 513 and 64741 | ±4 | ±12 | LSB | |
| Differential nonlinearity | 16-bit monotonic | ±0.35 | ±1 | LSB | |
| Zero code error | Measured by line passing through codes 485 and 64741 | ±2.5 | ±12 | mV | |
| Zero code error drift | ±5 | μV/°C | |||
| Full-scale error | Measured by line passing through codes 485 and 64741 | ±0.1 | ±0.5 | % of FSR | |
| Gain error | Measured by line passing through codes 485 and 64741 | ±0.08 | ±0.2 | % of FSR | |
| Gain temperature coefficient | ±1 | ppm of FSR/°C | |||
| PSRR | Output unloaded | 0.75 | mV/V |
(1) Linearity calculated using a reduced code range of 513 to 64741. Output unloaded.
Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted). (1)
| UNIT | ||
|---|---|---|
| VDD to GND | –0.3V to 6V | |
| Digital input voltage to GND | –0.3V to VDD + 0.3V | |
| VOUTA or VOUTB to GND | –0.3V to VDD + 0.3V | |
| Operating temperature range | –40°C to +105°C | |
| Storage temperature range | –65°C to +150°C | |
| Junction temperature (TJ max) | +150°C | |
| Power dissipation | (TJ max – TA)/θJA | |
| θJA | 206°C/W | |
| Thermal impedance | θJC | 44°C/W |
(1) Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to absolute maximum conditions for extended periods may affect device reliability.
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